1 //===-- llvm/CodeGen/MachineInstr.h - MachineInstr class --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the declaration of the MachineInstr class, which is the
11 // basic representation for all target dependent machine instructions used by
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_CODEGEN_MACHINEINSTR_H
17 #define LLVM_CODEGEN_MACHINEINSTR_H
19 #include "llvm/CodeGen/MachineOperand.h"
23 class TargetInstrDescriptor;
25 template <typename T> struct ilist_traits;
26 template <typename T> struct ilist;
28 //===----------------------------------------------------------------------===//
29 /// MachineInstr - Representation of each machine instruction.
32 const TargetInstrDescriptor *TID; // Instruction descriptor.
33 unsigned short NumImplicitOps; // Number of implicit operands (which
34 // are determined at construction time).
36 std::vector<MachineOperand> Operands; // the operands
37 MachineInstr *Prev, *Next; // Links for MBB's intrusive list.
38 MachineBasicBlock *Parent; // Pointer to the owning basic block.
40 // OperandComplete - Return true if it's illegal to add a new operand
41 bool OperandsComplete() const;
43 MachineInstr(const MachineInstr&);
44 void operator=(const MachineInstr&); // DO NOT IMPLEMENT
46 // Intrusive list support
47 friend struct ilist_traits<MachineInstr>;
48 void setParent(MachineBasicBlock *P) { Parent = P; }
50 /// MachineInstr ctor - This constructor creates a dummy MachineInstr with
51 /// TID NULL and no operands.
54 /// MachineInstr ctor - This constructor create a MachineInstr and add the
55 /// implicit operands. It reserves space for number of operands specified by
56 /// TargetInstrDescriptor.
57 explicit MachineInstr(const TargetInstrDescriptor &TID, bool NoImp = false);
59 /// MachineInstr ctor - Work exactly the same as the ctor above, except that
60 /// the MachineInstr is created and added to the end of the specified basic
63 MachineInstr(MachineBasicBlock *MBB, const TargetInstrDescriptor &TID);
67 const MachineBasicBlock* getParent() const { return Parent; }
68 MachineBasicBlock* getParent() { return Parent; }
70 /// getInstrDescriptor - Returns the target instruction descriptor of this
72 const TargetInstrDescriptor *getInstrDescriptor() const { return TID; }
74 /// getOpcode - Returns the opcode of this MachineInstr.
76 int getOpcode() const;
78 /// Access to explicit operands of the instruction.
80 unsigned getNumOperands() const { return Operands.size(); }
82 const MachineOperand& getOperand(unsigned i) const {
83 assert(i < getNumOperands() && "getOperand() out of range!");
86 MachineOperand& getOperand(unsigned i) {
87 assert(i < getNumOperands() && "getOperand() out of range!");
91 /// getNumExplicitOperands - Returns the number of non-implicit operands.
93 unsigned getNumExplicitOperands() const;
95 /// isIdenticalTo - Return true if this instruction is identical to (same
96 /// opcode and same operands as) the specified instruction.
97 bool isIdenticalTo(const MachineInstr *Other) const {
98 if (Other->getOpcode() != getOpcode() ||
99 Other->getNumOperands() != getNumOperands())
101 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
102 if (!getOperand(i).isIdenticalTo(Other->getOperand(i)))
107 /// clone - Create a copy of 'this' instruction that is identical in
108 /// all ways except the the instruction has no parent, prev, or next.
109 MachineInstr* clone() const { return new MachineInstr(*this); }
111 /// removeFromParent - This method unlinks 'this' from the containing basic
112 /// block, and returns it, but does not delete it.
113 MachineInstr *removeFromParent();
115 /// eraseFromParent - This method unlinks 'this' from the containing basic
116 /// block and deletes it.
117 void eraseFromParent() {
118 delete removeFromParent();
121 /// findRegisterUseOperandIdx() - Returns the operand index that is a use of
122 /// the specific register or -1 if it is not found. It further tightening
123 /// the search criteria to a use that kills the register if isKill is true.
124 int findRegisterUseOperandIdx(unsigned Reg, bool isKill = false) const;
126 /// findRegisterDefOperand() - Returns the MachineOperand that is a def of
127 /// the specific register or NULL if it is not found.
128 MachineOperand *findRegisterDefOperand(unsigned Reg);
130 /// findFirstPredOperandIdx() - Find the index of the first operand in the
131 /// operand list that is used to represent the predicate. It returns -1 if
133 int findFirstPredOperandIdx() const;
135 /// isRegReDefinedByTwoAddr - Returns true if the Reg re-definition is due
136 /// to two addr elimination.
137 bool isRegReDefinedByTwoAddr(unsigned Reg) const;
139 /// copyKillDeadInfo - Copies kill / dead operand properties from MI.
141 void copyKillDeadInfo(const MachineInstr *MI);
143 /// copyPredicates - Copies predicate operand(s) from MI.
144 void copyPredicates(const MachineInstr *MI);
149 void print(std::ostream *OS, const TargetMachine *TM) const {
150 if (OS) print(*OS, TM);
152 void print(std::ostream &OS, const TargetMachine *TM = 0) const;
153 void print(std::ostream *OS) const { if (OS) print(*OS); }
156 //===--------------------------------------------------------------------===//
157 // Accessors to add operands when building up machine instructions.
159 void addOperand(const MachineOperand &Op) {
160 bool isImpReg = Op.isRegister() && Op.isImplicit();
161 assert((isImpReg || !OperandsComplete()) &&
162 "Trying to add an operand to a machine instr that is already done!");
163 if (isImpReg || NumImplicitOps == 0) {// This is true most of the time.
164 Operands.push_back(Op);
165 Operands.back().ParentMI = this;
167 // Insert a real operand before any implicit ones.
168 unsigned OpNo = Operands.size()-NumImplicitOps;
169 Operands.insert(Operands.begin()+OpNo, Op);
170 Operands[OpNo].ParentMI = this;
174 //===--------------------------------------------------------------------===//
175 // Accessors used to modify instructions in place.
178 /// setInstrDescriptor - Replace the instruction descriptor (thus opcode) of
179 /// the current instruction with a new one.
181 void setInstrDescriptor(const TargetInstrDescriptor &tid) { TID = &tid; }
183 /// RemoveOperand - Erase an operand from an instruction, leaving it with one
184 /// fewer operand than it started with.
186 void RemoveOperand(unsigned i) {
187 Operands.erase(Operands.begin()+i);
191 /// addImplicitDefUseOperands - Add all implicit def and use operands to
192 /// this instruction.
193 void addImplicitDefUseOperands();
196 //===----------------------------------------------------------------------===//
199 inline std::ostream& operator<<(std::ostream &OS, const MachineInstr &MI) {
204 } // End llvm namespace