1 //===-- CodeGen/MachineInstBuilder.h - Simplify creation of MIs -*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file exposes a function named BuildMI, which is useful for dramatically
11 // simplifying how MachineInstr's are created. Instead of using code like this:
13 // M = new MachineInstr(X86::ADDrr32);
14 // M->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, argVal1);
15 // M->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister, argVal2);
17 // we can now use code like this:
19 // M = BuildMI(X86::ADDrr8, 2).addReg(argVal1).addReg(argVal2);
21 //===----------------------------------------------------------------------===//
23 #ifndef LLVM_CODEGEN_MACHINEINSTRBUILDER_H
24 #define LLVM_CODEGEN_MACHINEINSTRBUILDER_H
26 #include "llvm/CodeGen/MachineBasicBlock.h"
30 class MachineInstrBuilder {
33 MachineInstrBuilder(MachineInstr *mi) : MI(mi) {}
35 /// Allow automatic conversion to the machine instruction we are working on.
37 operator MachineInstr*() const { return MI; }
39 /// addReg - Add a new virtual register operand...
41 const MachineInstrBuilder &addReg(
43 MachineOperand::UseType Ty = MachineOperand::Use) const {
44 MI->addRegOperand(RegNo, Ty);
48 /// addReg - Add an LLVM value that is to be used as a register...
50 const MachineInstrBuilder &addReg(
52 MachineOperand::UseType Ty = MachineOperand::Use) const {
53 MI->addRegOperand(V, Ty);
57 /// addReg - Add an LLVM value that is to be used as a register...
59 const MachineInstrBuilder &addCCReg(
61 MachineOperand::UseType Ty = MachineOperand::Use) const {
62 MI->addCCRegOperand(V, Ty);
66 /// addRegDef - Add an LLVM value that is to be defined as a register... this
67 /// is the same as addReg(V, MachineOperand::Def).
69 const MachineInstrBuilder &addRegDef(Value *V) const {
70 return addReg(V, MachineOperand::Def);
73 /// addPCDisp - Add an LLVM value to be treated as a PC relative
76 const MachineInstrBuilder &addPCDisp(Value *V) const {
77 MI->addPCDispOperand(V);
81 /// addMReg - Add a machine register operand...
83 const MachineInstrBuilder &addMReg(int Reg, MachineOperand::UseType Ty
84 = MachineOperand::Use) const {
85 MI->addMachineRegOperand(Reg, Ty);
89 /// addImm - Add a new immediate operand.
91 const MachineInstrBuilder &addImm(int Val) const {
92 MI->addZeroExtImmOperand(Val);
96 /// addSImm - Add a new sign extended immediate operand...
98 const MachineInstrBuilder &addSImm(int val) const {
99 MI->addSignExtImmOperand(val);
103 /// addZImm - Add a new zero extended immediate operand...
105 const MachineInstrBuilder &addZImm(unsigned Val) const {
106 MI->addZeroExtImmOperand(Val);
110 const MachineInstrBuilder &addMBB(MachineBasicBlock *MBB) const {
111 MI->addMachineBasicBlockOperand(MBB);
115 const MachineInstrBuilder &addFrameIndex(unsigned Idx) const {
116 MI->addFrameIndexOperand(Idx);
120 const MachineInstrBuilder &addConstantPoolIndex(unsigned Idx) const {
121 MI->addConstantPoolIndexOperand(Idx);
125 const MachineInstrBuilder &addGlobalAddress(GlobalValue *GV,
126 bool isPCRelative = false) const {
127 MI->addGlobalAddressOperand(GV, isPCRelative);
131 const MachineInstrBuilder &addExternalSymbol(const std::string &Name,
132 bool isPCRelative = false) const{
133 MI->addExternalSymbolOperand(Name, isPCRelative);
138 /// BuildMI - Builder interface. Specify how to create the initial instruction
139 /// itself. NumOperands is the number of operands to the machine instruction to
140 /// allow for memory efficient representation of machine instructions.
142 inline MachineInstrBuilder BuildMI(int Opcode, unsigned NumOperands) {
143 return MachineInstrBuilder(new MachineInstr(Opcode, NumOperands, true, true));
146 /// BuildMI - This version of the builder also sets up the first "operand" as a
147 /// destination virtual register. NumOperands is the number of additional add*
148 /// calls that are expected, it does not include the destination register.
150 inline MachineInstrBuilder BuildMI(
151 int Opcode, unsigned NumOperands,
153 MachineOperand::UseType useType = MachineOperand::Def) {
154 return MachineInstrBuilder(new MachineInstr(Opcode, NumOperands+1,
155 true, true)).addReg(DestReg, useType);
159 /// BuildMI - Insert the instruction before a specified location in the basic
161 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
162 MachineBasicBlock::iterator I,
163 int Opcode, unsigned NumOperands,
165 MachineInstr *MI = new MachineInstr(Opcode, NumOperands+1, true, true);
167 return MachineInstrBuilder(MI).addReg(DestReg, MachineOperand::Def);
170 /// BMI - A special BuildMI variant that takes an iterator to insert the
171 /// instruction at as well as a basic block.
172 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
173 MachineBasicBlock::iterator I,
174 int Opcode, unsigned NumOperands) {
175 MachineInstr *MI = new MachineInstr(Opcode, NumOperands, true, true);
177 return MachineInstrBuilder(MI);
180 /// BuildMI - This version of the builder inserts the built MachineInstr into
181 /// the specified MachineBasicBlock.
183 inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, int Opcode,
184 unsigned NumOperands) {
185 return BuildMI(*BB, BB->end(), Opcode, NumOperands);
188 /// BuildMI - This version of the builder inserts the built MachineInstr into
189 /// the specified MachineBasicBlock, and also sets up the first "operand" as a
190 /// destination virtual register. NumOperands is the number of additional add*
191 /// calls that are expected, it does not include the destination register.
193 inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, int Opcode,
194 unsigned NumOperands, unsigned DestReg) {
195 return BuildMI(*BB, BB->end(), Opcode, NumOperands, DestReg);
198 } // End llvm namespace