1 //===-- CodeGen/MachineInstBuilder.h - Simplify creation of MIs -*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file exposes a function named BuildMI, which is useful for dramatically
11 // simplifying how MachineInstr's are created. It allows use of code like this:
13 // M = BuildMI(X86::ADDrr8, 2).addReg(argVal1).addReg(argVal2);
15 //===----------------------------------------------------------------------===//
17 #ifndef LLVM_CODEGEN_MACHINEINSTRBUILDER_H
18 #define LLVM_CODEGEN_MACHINEINSTRBUILDER_H
20 #include "llvm/CodeGen/MachineFunction.h"
21 #include "llvm/Support/ErrorHandling.h"
38 DefineNoRead = Define | Undef,
39 ImplicitDefine = Implicit | Define,
40 ImplicitKill = Implicit | Kill
44 class MachineInstrBuilder {
47 MachineInstrBuilder() : MI(0) {}
48 explicit MachineInstrBuilder(MachineInstr *mi) : MI(mi) {}
50 /// Allow automatic conversion to the machine instruction we are working on.
52 operator MachineInstr*() const { return MI; }
53 MachineInstr *operator->() const { return MI; }
54 operator MachineBasicBlock::iterator() const { return MI; }
56 /// addReg - Add a new virtual register operand...
59 MachineInstrBuilder &addReg(unsigned RegNo, unsigned flags = 0,
60 unsigned SubReg = 0) const {
61 assert((flags & 0x1) == 0 &&
62 "Passing in 'true' to addReg is forbidden! Use enums instead.");
63 MI->addOperand(MachineOperand::CreateReg(RegNo,
64 flags & RegState::Define,
65 flags & RegState::Implicit,
66 flags & RegState::Kill,
67 flags & RegState::Dead,
68 flags & RegState::Undef,
69 flags & RegState::EarlyClobber,
71 flags & RegState::Debug,
72 flags & RegState::InternalRead));
76 /// addImm - Add a new immediate operand.
78 const MachineInstrBuilder &addImm(int64_t Val) const {
79 MI->addOperand(MachineOperand::CreateImm(Val));
83 const MachineInstrBuilder &addCImm(const ConstantInt *Val) const {
84 MI->addOperand(MachineOperand::CreateCImm(Val));
88 const MachineInstrBuilder &addFPImm(const ConstantFP *Val) const {
89 MI->addOperand(MachineOperand::CreateFPImm(Val));
93 const MachineInstrBuilder &addMBB(MachineBasicBlock *MBB,
94 unsigned char TargetFlags = 0) const {
95 MI->addOperand(MachineOperand::CreateMBB(MBB, TargetFlags));
99 const MachineInstrBuilder &addFrameIndex(int Idx) const {
100 MI->addOperand(MachineOperand::CreateFI(Idx));
104 const MachineInstrBuilder &addConstantPoolIndex(unsigned Idx,
106 unsigned char TargetFlags = 0) const {
107 MI->addOperand(MachineOperand::CreateCPI(Idx, Offset, TargetFlags));
111 const MachineInstrBuilder &addTargetIndex(unsigned Idx, int64_t Offset = 0,
112 unsigned char TargetFlags = 0) const {
113 MI->addOperand(MachineOperand::CreateTargetIndex(Idx, Offset, TargetFlags));
117 const MachineInstrBuilder &addJumpTableIndex(unsigned Idx,
118 unsigned char TargetFlags = 0) const {
119 MI->addOperand(MachineOperand::CreateJTI(Idx, TargetFlags));
123 const MachineInstrBuilder &addGlobalAddress(const GlobalValue *GV,
125 unsigned char TargetFlags = 0) const {
126 MI->addOperand(MachineOperand::CreateGA(GV, Offset, TargetFlags));
130 const MachineInstrBuilder &addExternalSymbol(const char *FnName,
131 unsigned char TargetFlags = 0) const {
132 MI->addOperand(MachineOperand::CreateES(FnName, TargetFlags));
136 const MachineInstrBuilder &addRegMask(const uint32_t *Mask) const {
137 MI->addOperand(MachineOperand::CreateRegMask(Mask));
141 const MachineInstrBuilder &addMemOperand(MachineMemOperand *MMO) const {
142 MI->addMemOperand(*MI->getParent()->getParent(), MMO);
146 const MachineInstrBuilder &setMemRefs(MachineInstr::mmo_iterator b,
147 MachineInstr::mmo_iterator e) const {
148 MI->setMemRefs(b, e);
153 const MachineInstrBuilder &addOperand(const MachineOperand &MO) const {
158 const MachineInstrBuilder &addMetadata(const MDNode *MD) const {
159 MI->addOperand(MachineOperand::CreateMetadata(MD));
163 const MachineInstrBuilder &addSym(MCSymbol *Sym) const {
164 MI->addOperand(MachineOperand::CreateMCSymbol(Sym));
168 const MachineInstrBuilder &setMIFlags(unsigned Flags) const {
173 const MachineInstrBuilder &setMIFlag(MachineInstr::MIFlag Flag) const {
178 // Add a displacement from an existing MachineOperand with an added offset.
179 const MachineInstrBuilder &addDisp(const MachineOperand &Disp, int64_t off,
180 unsigned char TargetFlags = 0) const {
181 switch (Disp.getType()) {
183 llvm_unreachable("Unhandled operand type in addDisp()");
184 case MachineOperand::MO_Immediate:
185 return addImm(Disp.getImm() + off);
186 case MachineOperand::MO_GlobalAddress: {
187 // If caller specifies new TargetFlags then use it, otherwise the
188 // default behavior is to copy the target flags from the existing
189 // MachineOperand. This means if the caller wants to clear the
190 // target flags it needs to do so explicitly.
192 return addGlobalAddress(Disp.getGlobal(), Disp.getOffset() + off,
194 return addGlobalAddress(Disp.getGlobal(), Disp.getOffset() + off,
195 Disp.getTargetFlags());
201 /// BuildMI - Builder interface. Specify how to create the initial instruction
204 inline MachineInstrBuilder BuildMI(MachineFunction &MF,
206 const MCInstrDesc &MCID) {
207 return MachineInstrBuilder(MF.CreateMachineInstr(MCID, DL));
210 /// BuildMI - This version of the builder sets up the first operand as a
211 /// destination virtual register.
213 inline MachineInstrBuilder BuildMI(MachineFunction &MF,
215 const MCInstrDesc &MCID,
217 return MachineInstrBuilder(MF.CreateMachineInstr(MCID, DL))
218 .addReg(DestReg, RegState::Define);
221 /// BuildMI - This version of the builder inserts the newly-built
222 /// instruction before the given position in the given MachineBasicBlock, and
223 /// sets up the first operand as a destination virtual register.
225 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
226 MachineBasicBlock::iterator I,
228 const MCInstrDesc &MCID,
230 MachineInstr *MI = BB.getParent()->CreateMachineInstr(MCID, DL);
232 return MachineInstrBuilder(MI).addReg(DestReg, RegState::Define);
235 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
236 MachineBasicBlock::instr_iterator I,
238 const MCInstrDesc &MCID,
240 MachineInstr *MI = BB.getParent()->CreateMachineInstr(MCID, DL);
242 return MachineInstrBuilder(MI).addReg(DestReg, RegState::Define);
245 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
248 const MCInstrDesc &MCID,
250 if (I->isInsideBundle()) {
251 MachineBasicBlock::instr_iterator MII = I;
252 return BuildMI(BB, MII, DL, MCID, DestReg);
255 MachineBasicBlock::iterator MII = I;
256 return BuildMI(BB, MII, DL, MCID, DestReg);
259 /// BuildMI - This version of the builder inserts the newly-built
260 /// instruction before the given position in the given MachineBasicBlock, and
261 /// does NOT take a destination register.
263 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
264 MachineBasicBlock::iterator I,
266 const MCInstrDesc &MCID) {
267 MachineInstr *MI = BB.getParent()->CreateMachineInstr(MCID, DL);
269 return MachineInstrBuilder(MI);
272 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
273 MachineBasicBlock::instr_iterator I,
275 const MCInstrDesc &MCID) {
276 MachineInstr *MI = BB.getParent()->CreateMachineInstr(MCID, DL);
278 return MachineInstrBuilder(MI);
281 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
284 const MCInstrDesc &MCID) {
285 if (I->isInsideBundle()) {
286 MachineBasicBlock::instr_iterator MII = I;
287 return BuildMI(BB, MII, DL, MCID);
290 MachineBasicBlock::iterator MII = I;
291 return BuildMI(BB, MII, DL, MCID);
294 /// BuildMI - This version of the builder inserts the newly-built
295 /// instruction at the end of the given MachineBasicBlock, and does NOT take a
296 /// destination register.
298 inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB,
300 const MCInstrDesc &MCID) {
301 return BuildMI(*BB, BB->end(), DL, MCID);
304 /// BuildMI - This version of the builder inserts the newly-built
305 /// instruction at the end of the given MachineBasicBlock, and sets up the first
306 /// operand as a destination virtual register.
308 inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB,
310 const MCInstrDesc &MCID,
312 return BuildMI(*BB, BB->end(), DL, MCID, DestReg);
315 inline unsigned getDefRegState(bool B) {
316 return B ? RegState::Define : 0;
318 inline unsigned getImplRegState(bool B) {
319 return B ? RegState::Implicit : 0;
321 inline unsigned getKillRegState(bool B) {
322 return B ? RegState::Kill : 0;
324 inline unsigned getDeadRegState(bool B) {
325 return B ? RegState::Dead : 0;
327 inline unsigned getUndefRegState(bool B) {
328 return B ? RegState::Undef : 0;
330 inline unsigned getInternalReadRegState(bool B) {
331 return B ? RegState::InternalRead : 0;
334 } // End llvm namespace