1 //===-- CodeGen/MachineInstBuilder.h - Simplify creation of MIs -*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file exposes a function named BuildMI, which is useful for dramatically
11 // simplifying how MachineInstr's are created. It allows use of code like this:
13 // M = BuildMI(X86::ADDrr8, 2).addReg(argVal1).addReg(argVal2);
15 //===----------------------------------------------------------------------===//
17 #ifndef LLVM_CODEGEN_MACHINEINSTRBUILDER_H
18 #define LLVM_CODEGEN_MACHINEINSTRBUILDER_H
20 #include "llvm/CodeGen/MachineFunction.h"
21 #include "llvm/Support/ErrorHandling.h"
25 class TargetInstrDesc;
37 ImplicitDefine = Implicit | Define,
38 ImplicitKill = Implicit | Kill
42 class MachineInstrBuilder {
45 MachineInstrBuilder() : MI(0) {}
46 explicit MachineInstrBuilder(MachineInstr *mi) : MI(mi) {}
48 /// Allow automatic conversion to the machine instruction we are working on.
50 operator MachineInstr*() const { return MI; }
51 MachineInstr *operator->() const { return MI; }
52 operator MachineBasicBlock::iterator() const { return MI; }
54 /// addReg - Add a new virtual register operand...
57 MachineInstrBuilder &addReg(unsigned RegNo, unsigned flags = 0,
58 unsigned SubReg = 0) const {
59 assert((flags & 0x1) == 0 &&
60 "Passing in 'true' to addReg is forbidden! Use enums instead.");
61 MI->addOperand(MachineOperand::CreateReg(RegNo,
62 flags & RegState::Define,
63 flags & RegState::Implicit,
64 flags & RegState::Kill,
65 flags & RegState::Dead,
66 flags & RegState::Undef,
67 flags & RegState::EarlyClobber,
69 flags & RegState::Debug));
73 /// addImm - Add a new immediate operand.
75 const MachineInstrBuilder &addImm(int64_t Val) const {
76 MI->addOperand(MachineOperand::CreateImm(Val));
80 const MachineInstrBuilder &addFPImm(const ConstantFP *Val) const {
81 MI->addOperand(MachineOperand::CreateFPImm(Val));
85 const MachineInstrBuilder &addMBB(MachineBasicBlock *MBB,
86 unsigned char TargetFlags = 0) const {
87 MI->addOperand(MachineOperand::CreateMBB(MBB, TargetFlags));
91 const MachineInstrBuilder &addFrameIndex(unsigned Idx) const {
92 MI->addOperand(MachineOperand::CreateFI(Idx));
96 const MachineInstrBuilder &addConstantPoolIndex(unsigned Idx,
98 unsigned char TargetFlags = 0) const {
99 MI->addOperand(MachineOperand::CreateCPI(Idx, Offset, TargetFlags));
103 const MachineInstrBuilder &addJumpTableIndex(unsigned Idx,
104 unsigned char TargetFlags = 0) const {
105 MI->addOperand(MachineOperand::CreateJTI(Idx, TargetFlags));
109 const MachineInstrBuilder &addGlobalAddress(const GlobalValue *GV,
111 unsigned char TargetFlags = 0) const {
112 MI->addOperand(MachineOperand::CreateGA(GV, Offset, TargetFlags));
116 const MachineInstrBuilder &addExternalSymbol(const char *FnName,
117 unsigned char TargetFlags = 0) const {
118 MI->addOperand(MachineOperand::CreateES(FnName, TargetFlags));
122 const MachineInstrBuilder &addMemOperand(MachineMemOperand *MMO) const {
123 MI->addMemOperand(*MI->getParent()->getParent(), MMO);
127 const MachineInstrBuilder &setMemRefs(MachineInstr::mmo_iterator b,
128 MachineInstr::mmo_iterator e) const {
129 MI->setMemRefs(b, e);
134 const MachineInstrBuilder &addOperand(const MachineOperand &MO) const {
139 const MachineInstrBuilder &addMetadata(const MDNode *MD) const {
140 MI->addOperand(MachineOperand::CreateMetadata(MD));
144 const MachineInstrBuilder &addSym(MCSymbol *Sym) const {
145 MI->addOperand(MachineOperand::CreateMCSymbol(Sym));
149 const MachineInstrBuilder &setMIFlags(unsigned Flags) const {
154 const MachineInstrBuilder &setMIFlag(MachineInstr::MIFlag Flag) const {
159 // Add a displacement from an existing MachineOperand with an added offset.
160 const MachineInstrBuilder &addDisp(const MachineOperand &Disp,
162 switch (Disp.getType()) {
164 llvm_unreachable("Unhandled operand type in addDisp()");
165 case MachineOperand::MO_Immediate:
166 return addImm(Disp.getImm() + off);
167 case MachineOperand::MO_GlobalAddress:
168 return addGlobalAddress(Disp.getGlobal(), Disp.getOffset() + off);
173 /// BuildMI - Builder interface. Specify how to create the initial instruction
176 inline MachineInstrBuilder BuildMI(MachineFunction &MF,
178 const TargetInstrDesc &TID) {
179 return MachineInstrBuilder(MF.CreateMachineInstr(TID, DL));
182 /// BuildMI - This version of the builder sets up the first operand as a
183 /// destination virtual register.
185 inline MachineInstrBuilder BuildMI(MachineFunction &MF,
187 const TargetInstrDesc &TID,
189 return MachineInstrBuilder(MF.CreateMachineInstr(TID, DL))
190 .addReg(DestReg, RegState::Define);
193 /// BuildMI - This version of the builder inserts the newly-built
194 /// instruction before the given position in the given MachineBasicBlock, and
195 /// sets up the first operand as a destination virtual register.
197 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
198 MachineBasicBlock::iterator I,
200 const TargetInstrDesc &TID,
202 MachineInstr *MI = BB.getParent()->CreateMachineInstr(TID, DL);
204 return MachineInstrBuilder(MI).addReg(DestReg, RegState::Define);
207 /// BuildMI - This version of the builder inserts the newly-built
208 /// instruction before the given position in the given MachineBasicBlock, and
209 /// does NOT take a destination register.
211 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
212 MachineBasicBlock::iterator I,
214 const TargetInstrDesc &TID) {
215 MachineInstr *MI = BB.getParent()->CreateMachineInstr(TID, DL);
217 return MachineInstrBuilder(MI);
220 /// BuildMI - This version of the builder inserts the newly-built
221 /// instruction at the end of the given MachineBasicBlock, and does NOT take a
222 /// destination register.
224 inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB,
226 const TargetInstrDesc &TID) {
227 return BuildMI(*BB, BB->end(), DL, TID);
230 /// BuildMI - This version of the builder inserts the newly-built
231 /// instruction at the end of the given MachineBasicBlock, and sets up the first
232 /// operand as a destination virtual register.
234 inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB,
236 const TargetInstrDesc &TID,
238 return BuildMI(*BB, BB->end(), DL, TID, DestReg);
241 inline unsigned getDefRegState(bool B) {
242 return B ? RegState::Define : 0;
244 inline unsigned getImplRegState(bool B) {
245 return B ? RegState::Implicit : 0;
247 inline unsigned getKillRegState(bool B) {
248 return B ? RegState::Kill : 0;
250 inline unsigned getDeadRegState(bool B) {
251 return B ? RegState::Dead : 0;
253 inline unsigned getUndefRegState(bool B) {
254 return B ? RegState::Undef : 0;
257 } // End llvm namespace