1 //===-- CodeGen/MachineInstBuilder.h - Simplify creation of MIs -*- C++ -*-===//
3 // This file exposes a function named BuildMI, which is useful for dramatically
4 // simplifying how MachineInstr's are created. Instead of using code like this:
6 // M = new MachineInstr(X86::ADDrr32);
7 // M->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, argVal1);
8 // M->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister, argVal2);
10 // we can now use code like this:
12 // M = BuildMI(X86::ADDrr8, 2).addReg(argVal1).addReg(argVal2);
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_CODEGEN_MACHINEINSTRBUILDER_H
17 #define LLVM_CODEGEN_MACHINEINSTRBUILDER_H
19 #include "llvm/CodeGen/MachineInstr.h"
21 struct MachineInstrBuilder {
24 MachineInstrBuilder(MachineInstr *mi) : MI(mi) {}
26 /// Allow automatic conversion to the machine instruction we are working on.
28 operator MachineInstr*() const { return MI; }
30 /// addReg - Add a new virtual register operand...
32 const MachineInstrBuilder &addReg(int RegNo,
33 MOTy::UseType Ty = MOTy::Use) const {
34 MI->addRegOperand(RegNo, Ty);
38 /// addReg - Add an LLVM value that is to be used as a register...
40 const MachineInstrBuilder &addReg(Value *V,
41 MOTy::UseType Ty = MOTy::Use) const {
42 MI->addRegOperand(V, Ty);
46 /// addClobber - Assert that this MI is going to clobber a specific
47 /// register. Useful for instructions that always clobber certain hard regs.
48 /// (Same as addReg(RegNo, true) but shorter and more obvious).
50 const MachineInstrBuilder &addClobber(int RegNo) const {
51 MI->addRegOperand(RegNo, MOTy::Def);
55 /// addPCDisp - Add an LLVM value to be treated as a PC relative
58 const MachineInstrBuilder &addPCDisp(Value *V) const {
59 MI->addPCDispOperand(V);
63 /// addMReg - Add a machine register operand...
65 const MachineInstrBuilder &addMReg(int Reg,
66 MOTy::UseType Ty = MOTy::Use) const {
67 MI->addMachineRegOperand(Reg, Ty);
71 /// addSImm - Add a new sign extended immediate operand...
73 const MachineInstrBuilder &addSImm(int64_t val) const {
74 MI->addSignExtImmOperand(val);
78 /// addZImm - Add a new zero extended immediate operand...
80 const MachineInstrBuilder &addZImm(int64_t Val) const {
81 MI->addZeroExtImmOperand(Val);
85 const MachineInstrBuilder &addMBB(MachineBasicBlock *MBB) const {
86 MI->addMachineBasicBlockOperand(MBB);
90 const MachineInstrBuilder &addFrameIndex(unsigned Idx) const {
91 MI->addFrameIndexOperand(Idx);
96 /// BuildMI - Builder interface. Specify how to create the initial instruction
97 /// itself. NumOperands is the number of operands to the machine instruction to
98 /// allow for memory efficient representation of machine instructions.
100 inline MachineInstrBuilder BuildMI(MachineOpCode Opcode, unsigned NumOperands) {
101 return MachineInstrBuilder(new MachineInstr(Opcode, NumOperands, true, true));
104 /// BuildMI - This version of the builder also sets up the first "operand" as a
105 /// destination virtual register. NumOperands is the number of additional add*
106 /// calls that are expected, it does not include the destination register.
108 inline MachineInstrBuilder BuildMI(MachineOpCode Opcode, unsigned NumOperands,
110 return MachineInstrBuilder(new MachineInstr(Opcode, NumOperands+1,
111 true, true)).addReg(DestReg, MOTy::Def);
115 /// BuildMI - This version of the builder inserts the built MachineInstr into
116 /// the specified MachineBasicBlock.
118 inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, MachineOpCode Opcode,
119 unsigned NumOperands) {
120 return MachineInstrBuilder(new MachineInstr(BB, Opcode, NumOperands));
123 /// BuildMI - This version of the builder inserts the built MachineInstr into
124 /// the specified MachineBasicBlock, and also sets up the first "operand" as a
125 /// destination virtual register. NumOperands is the number of additional add*
126 /// calls that are expected, it does not include the destination register.
128 inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, MachineOpCode Opcode,
129 unsigned NumOperands, unsigned DestReg) {
130 return MachineInstrBuilder(new MachineInstr(BB, Opcode,
131 NumOperands+1)).addReg(DestReg,