1 //===-- llvm/CodeGen/MachineOperand.h - MachineOperand class ----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the declaration of the MachineOperand class.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_CODEGEN_MACHINEOPERAND_H
15 #define LLVM_CODEGEN_MACHINEOPERAND_H
17 #include "llvm/ADT/Hashing.h"
18 #include "llvm/Support/DataTypes.h"
27 class MachineBasicBlock;
29 class MachineRegisterInfo;
32 class TargetRegisterInfo;
36 /// MachineOperand class - Representation of each machine instruction operand.
38 class MachineOperand {
40 enum MachineOperandType {
41 MO_Register, ///< Register operand.
42 MO_Immediate, ///< Immediate operand
43 MO_CImmediate, ///< Immediate >64bit operand
44 MO_FPImmediate, ///< Floating-point immediate operand
45 MO_MachineBasicBlock, ///< MachineBasicBlock reference
46 MO_FrameIndex, ///< Abstract Stack Frame Index
47 MO_ConstantPoolIndex, ///< Address of indexed Constant in Constant Pool
48 MO_JumpTableIndex, ///< Address of indexed Jump Table for switch
49 MO_ExternalSymbol, ///< Name of external global symbol
50 MO_GlobalAddress, ///< Address of a global value
51 MO_BlockAddress, ///< Address of a basic block
52 MO_RegisterMask, ///< Mask of preserved registers.
53 MO_Metadata, ///< Metadata reference (for debug info)
54 MO_MCSymbol ///< MCSymbol reference (for debug/eh info)
58 /// OpKind - Specify what kind of operand this is. This discriminates the
60 unsigned char OpKind; // MachineOperandType
62 /// SubReg - Subregister number, only valid for MO_Register. A value of 0
63 /// indicates the MO_Register has no subReg.
66 /// TargetFlags - This is a set of target-specific operand flags.
67 unsigned char TargetFlags;
69 /// IsDef/IsImp/IsKill/IsDead flags - These are only valid for MO_Register
72 /// IsDef - True if this is a def, false if this is a use of the register.
76 /// IsImp - True if this is an implicit def or use, false if it is explicit.
80 /// IsKill - True if this instruction is the last use of the register on this
81 /// path through the function. This is only valid on uses of registers.
84 /// IsDead - True if this register is never used by a subsequent instruction.
85 /// This is only valid on definitions of registers.
88 /// IsUndef - True if this register operand reads an "undef" value, i.e. the
89 /// read value doesn't matter. This flag can be set on both use and def
90 /// operands. On a sub-register def operand, it refers to the part of the
91 /// register that isn't written. On a full-register def operand, it is a
92 /// noop. See readsReg().
94 /// This is only valid on registers.
96 /// Note that an instruction may have multiple <undef> operands referring to
97 /// the same register. In that case, the instruction may depend on those
98 /// operands reading the same dont-care value. For example:
100 /// %vreg1<def> = XOR %vreg2<undef>, %vreg2<undef>
102 /// Any register can be used for %vreg2, and its value doesn't matter, but
103 /// the two operands must be the same register.
107 /// IsInternalRead - True if this operand reads a value that was defined
108 /// inside the same instruction or bundle. This flag can be set on both use
109 /// and def operands. On a sub-register def operand, it refers to the part
110 /// of the register that isn't written. On a full-register def operand, it
113 /// When this flag is set, the instruction bundle must contain at least one
114 /// other def of the register. If multiple instructions in the bundle define
115 /// the register, the meaning is target-defined.
116 bool IsInternalRead : 1;
118 /// IsEarlyClobber - True if this MO_Register 'def' operand is written to
119 /// by the MachineInstr before all input registers are read. This is used to
120 /// model the GCC inline asm '&' constraint modifier.
121 bool IsEarlyClobber : 1;
123 /// IsDebug - True if this MO_Register 'use' operand is in a debug pseudo,
124 /// not a real instruction. Such uses should be ignored during codegen.
127 /// SmallContents - This really should be part of the Contents union, but
128 /// lives out here so we can get a better packed struct.
129 /// MO_Register: Register number.
130 /// OffsetedInfo: Low bits of offset.
132 unsigned RegNo; // For MO_Register.
133 unsigned OffsetLo; // Matches Contents.OffsetedInfo.OffsetHi.
136 /// ParentMI - This is the instruction that this operand is embedded into.
137 /// This is valid for all operand types, when the operand is in an instr.
138 MachineInstr *ParentMI;
140 /// Contents union - This contains the payload for the various operand types.
142 MachineBasicBlock *MBB; // For MO_MachineBasicBlock.
143 const ConstantFP *CFP; // For MO_FPImmediate.
144 const ConstantInt *CI; // For MO_CImmediate. Integers > 64bit.
145 int64_t ImmVal; // For MO_Immediate.
146 const uint32_t *RegMask; // For MO_RegisterMask.
147 const MDNode *MD; // For MO_Metadata.
148 MCSymbol *Sym; // For MO_MCSymbol
150 struct { // For MO_Register.
151 // Register number is in SmallContents.RegNo.
152 MachineOperand **Prev; // Access list for register.
153 MachineOperand *Next;
156 /// OffsetedInfo - This struct contains the offset and an object identifier.
157 /// this represent the object as with an optional offset from it.
160 int Index; // For MO_*Index - The index itself.
161 const char *SymbolName; // For MO_ExternalSymbol.
162 const GlobalValue *GV; // For MO_GlobalAddress.
163 const BlockAddress *BA; // For MO_BlockAddress.
165 // Low bits of offset are in SmallContents.OffsetLo.
166 int OffsetHi; // An offset from the object, high 32 bits.
170 explicit MachineOperand(MachineOperandType K) : OpKind(K), ParentMI(0) {
174 /// getType - Returns the MachineOperandType for this operand.
176 MachineOperandType getType() const { return (MachineOperandType)OpKind; }
178 unsigned char getTargetFlags() const { return TargetFlags; }
179 void setTargetFlags(unsigned char F) { TargetFlags = F; }
180 void addTargetFlag(unsigned char F) { TargetFlags |= F; }
183 /// getParent - Return the instruction that this operand belongs to.
185 MachineInstr *getParent() { return ParentMI; }
186 const MachineInstr *getParent() const { return ParentMI; }
188 /// clearParent - Reset the parent pointer.
190 /// The MachineOperand copy constructor also copies ParentMI, expecting the
191 /// original to be deleted. If a MachineOperand is ever stored outside a
192 /// MachineInstr, the parent pointer must be cleared.
194 /// Never call clearParent() on an operand in a MachineInstr.
196 void clearParent() { ParentMI = 0; }
198 void print(raw_ostream &os, const TargetMachine *TM = 0) const;
200 //===--------------------------------------------------------------------===//
201 // Accessors that tell you what kind of MachineOperand you're looking at.
202 //===--------------------------------------------------------------------===//
204 /// isReg - Tests if this is a MO_Register operand.
205 bool isReg() const { return OpKind == MO_Register; }
206 /// isImm - Tests if this is a MO_Immediate operand.
207 bool isImm() const { return OpKind == MO_Immediate; }
208 /// isCImm - Test if t his is a MO_CImmediate operand.
209 bool isCImm() const { return OpKind == MO_CImmediate; }
210 /// isFPImm - Tests if this is a MO_FPImmediate operand.
211 bool isFPImm() const { return OpKind == MO_FPImmediate; }
212 /// isMBB - Tests if this is a MO_MachineBasicBlock operand.
213 bool isMBB() const { return OpKind == MO_MachineBasicBlock; }
214 /// isFI - Tests if this is a MO_FrameIndex operand.
215 bool isFI() const { return OpKind == MO_FrameIndex; }
216 /// isCPI - Tests if this is a MO_ConstantPoolIndex operand.
217 bool isCPI() const { return OpKind == MO_ConstantPoolIndex; }
218 /// isJTI - Tests if this is a MO_JumpTableIndex operand.
219 bool isJTI() const { return OpKind == MO_JumpTableIndex; }
220 /// isGlobal - Tests if this is a MO_GlobalAddress operand.
221 bool isGlobal() const { return OpKind == MO_GlobalAddress; }
222 /// isSymbol - Tests if this is a MO_ExternalSymbol operand.
223 bool isSymbol() const { return OpKind == MO_ExternalSymbol; }
224 /// isBlockAddress - Tests if this is a MO_BlockAddress operand.
225 bool isBlockAddress() const { return OpKind == MO_BlockAddress; }
226 /// isRegMask - Tests if this is a MO_RegisterMask operand.
227 bool isRegMask() const { return OpKind == MO_RegisterMask; }
228 /// isMetadata - Tests if this is a MO_Metadata operand.
229 bool isMetadata() const { return OpKind == MO_Metadata; }
230 bool isMCSymbol() const { return OpKind == MO_MCSymbol; }
233 //===--------------------------------------------------------------------===//
234 // Accessors for Register Operands
235 //===--------------------------------------------------------------------===//
237 /// getReg - Returns the register number.
238 unsigned getReg() const {
239 assert(isReg() && "This is not a register operand!");
240 return SmallContents.RegNo;
243 unsigned getSubReg() const {
244 assert(isReg() && "Wrong MachineOperand accessor");
245 return (unsigned)SubReg;
249 assert(isReg() && "Wrong MachineOperand accessor");
254 assert(isReg() && "Wrong MachineOperand accessor");
258 bool isImplicit() const {
259 assert(isReg() && "Wrong MachineOperand accessor");
263 bool isDead() const {
264 assert(isReg() && "Wrong MachineOperand accessor");
268 bool isKill() const {
269 assert(isReg() && "Wrong MachineOperand accessor");
273 bool isUndef() const {
274 assert(isReg() && "Wrong MachineOperand accessor");
278 bool isInternalRead() const {
279 assert(isReg() && "Wrong MachineOperand accessor");
280 return IsInternalRead;
283 bool isEarlyClobber() const {
284 assert(isReg() && "Wrong MachineOperand accessor");
285 return IsEarlyClobber;
288 bool isDebug() const {
289 assert(isReg() && "Wrong MachineOperand accessor");
293 /// readsReg - Returns true if this operand reads the previous value of its
294 /// register. A use operand with the <undef> flag set doesn't read its
295 /// register. A sub-register def implicitly reads the other parts of the
296 /// register being redefined unless the <undef> flag is set.
298 /// This refers to reading the register value from before the current
299 /// instruction or bundle. Internal bundle reads are not included.
300 bool readsReg() const {
301 assert(isReg() && "Wrong MachineOperand accessor");
302 return !isUndef() && !isInternalRead() && (isUse() || getSubReg());
305 /// getNextOperandForReg - Return the next MachineOperand in the linked list
306 /// of operands that use or define the same register.
307 /// Don't call this function directly, see the def-use iterators in
308 /// MachineRegisterInfo instead.
309 MachineOperand *getNextOperandForReg() const {
310 assert(isReg() && "This is not a register operand!");
311 return Contents.Reg.Next;
314 //===--------------------------------------------------------------------===//
315 // Mutators for Register Operands
316 //===--------------------------------------------------------------------===//
318 /// Change the register this operand corresponds to.
320 void setReg(unsigned Reg);
322 void setSubReg(unsigned subReg) {
323 assert(isReg() && "Wrong MachineOperand accessor");
324 SubReg = (unsigned char)subReg;
327 /// substVirtReg - Substitute the current register with the virtual
328 /// subregister Reg:SubReg. Take any existing SubReg index into account,
329 /// using TargetRegisterInfo to compose the subreg indices if necessary.
330 /// Reg must be a virtual register, SubIdx can be 0.
332 void substVirtReg(unsigned Reg, unsigned SubIdx, const TargetRegisterInfo&);
334 /// substPhysReg - Substitute the current register with the physical register
335 /// Reg, taking any existing SubReg into account. For instance,
336 /// substPhysReg(%EAX) will change %reg1024:sub_8bit to %AL.
338 void substPhysReg(unsigned Reg, const TargetRegisterInfo&);
340 void setIsUse(bool Val = true) {
341 assert(isReg() && "Wrong MachineOperand accessor");
342 assert((Val || !isDebug()) && "Marking a debug operation as def");
346 void setIsDef(bool Val = true) {
347 assert(isReg() && "Wrong MachineOperand accessor");
348 assert((!Val || !isDebug()) && "Marking a debug operation as def");
352 void setImplicit(bool Val = true) {
353 assert(isReg() && "Wrong MachineOperand accessor");
357 void setIsKill(bool Val = true) {
358 assert(isReg() && !IsDef && "Wrong MachineOperand accessor");
359 assert((!Val || !isDebug()) && "Marking a debug operation as kill");
363 void setIsDead(bool Val = true) {
364 assert(isReg() && IsDef && "Wrong MachineOperand accessor");
368 void setIsUndef(bool Val = true) {
369 assert(isReg() && "Wrong MachineOperand accessor");
373 void setIsInternalRead(bool Val = true) {
374 assert(isReg() && "Wrong MachineOperand accessor");
375 IsInternalRead = Val;
378 void setIsEarlyClobber(bool Val = true) {
379 assert(isReg() && IsDef && "Wrong MachineOperand accessor");
380 IsEarlyClobber = Val;
383 void setIsDebug(bool Val = true) {
384 assert(isReg() && IsDef && "Wrong MachineOperand accessor");
388 //===--------------------------------------------------------------------===//
389 // Accessors for various operand types.
390 //===--------------------------------------------------------------------===//
392 int64_t getImm() const {
393 assert(isImm() && "Wrong MachineOperand accessor");
394 return Contents.ImmVal;
397 const ConstantInt *getCImm() const {
398 assert(isCImm() && "Wrong MachineOperand accessor");
402 const ConstantFP *getFPImm() const {
403 assert(isFPImm() && "Wrong MachineOperand accessor");
407 MachineBasicBlock *getMBB() const {
408 assert(isMBB() && "Wrong MachineOperand accessor");
412 int getIndex() const {
413 assert((isFI() || isCPI() || isJTI()) &&
414 "Wrong MachineOperand accessor");
415 return Contents.OffsetedInfo.Val.Index;
418 const GlobalValue *getGlobal() const {
419 assert(isGlobal() && "Wrong MachineOperand accessor");
420 return Contents.OffsetedInfo.Val.GV;
423 const BlockAddress *getBlockAddress() const {
424 assert(isBlockAddress() && "Wrong MachineOperand accessor");
425 return Contents.OffsetedInfo.Val.BA;
428 MCSymbol *getMCSymbol() const {
429 assert(isMCSymbol() && "Wrong MachineOperand accessor");
433 /// getOffset - Return the offset from the symbol in this operand. This always
434 /// returns 0 for ExternalSymbol operands.
435 int64_t getOffset() const {
436 assert((isGlobal() || isSymbol() || isCPI() || isBlockAddress()) &&
437 "Wrong MachineOperand accessor");
438 return (int64_t(Contents.OffsetedInfo.OffsetHi) << 32) |
439 SmallContents.OffsetLo;
442 const char *getSymbolName() const {
443 assert(isSymbol() && "Wrong MachineOperand accessor");
444 return Contents.OffsetedInfo.Val.SymbolName;
447 /// clobbersPhysReg - Returns true if this RegMask clobbers PhysReg.
448 /// It is sometimes necessary to detach the register mask pointer from its
449 /// machine operand. This static method can be used for such detached bit
451 static bool clobbersPhysReg(const uint32_t *RegMask, unsigned PhysReg) {
452 // See TargetRegisterInfo.h.
453 assert(PhysReg < (1u << 30) && "Not a physical register");
454 return !(RegMask[PhysReg / 32] & (1u << PhysReg % 32));
457 /// clobbersPhysReg - Returns true if this RegMask operand clobbers PhysReg.
458 bool clobbersPhysReg(unsigned PhysReg) const {
459 return clobbersPhysReg(getRegMask(), PhysReg);
462 /// getRegMask - Returns a bit mask of registers preserved by this RegMask
464 const uint32_t *getRegMask() const {
465 assert(isRegMask() && "Wrong MachineOperand accessor");
466 return Contents.RegMask;
469 const MDNode *getMetadata() const {
470 assert(isMetadata() && "Wrong MachineOperand accessor");
474 //===--------------------------------------------------------------------===//
475 // Mutators for various operand types.
476 //===--------------------------------------------------------------------===//
478 void setImm(int64_t immVal) {
479 assert(isImm() && "Wrong MachineOperand mutator");
480 Contents.ImmVal = immVal;
483 void setOffset(int64_t Offset) {
484 assert((isGlobal() || isSymbol() || isCPI() || isBlockAddress()) &&
485 "Wrong MachineOperand accessor");
486 SmallContents.OffsetLo = unsigned(Offset);
487 Contents.OffsetedInfo.OffsetHi = int(Offset >> 32);
490 void setIndex(int Idx) {
491 assert((isFI() || isCPI() || isJTI()) &&
492 "Wrong MachineOperand accessor");
493 Contents.OffsetedInfo.Val.Index = Idx;
496 void setMBB(MachineBasicBlock *MBB) {
497 assert(isMBB() && "Wrong MachineOperand accessor");
501 //===--------------------------------------------------------------------===//
503 //===--------------------------------------------------------------------===//
505 /// isIdenticalTo - Return true if this operand is identical to the specified
506 /// operand. Note: This method ignores isKill and isDead properties.
507 bool isIdenticalTo(const MachineOperand &Other) const;
509 /// \brief MachineOperand hash_value overload.
511 /// Note that this includes the same information in the hash that
512 /// isIdenticalTo uses for comparison. It is thus suited for use in hash
513 /// tables which use that function for equality comparisons only.
514 friend hash_code hash_value(const MachineOperand &MO);
516 /// ChangeToImmediate - Replace this operand with a new immediate operand of
517 /// the specified value. If an operand is known to be an immediate already,
518 /// the setImm method should be used.
519 void ChangeToImmediate(int64_t ImmVal);
521 /// ChangeToRegister - Replace this operand with a new register operand of
522 /// the specified value. If an operand is known to be an register already,
523 /// the setReg method should be used.
524 void ChangeToRegister(unsigned Reg, bool isDef, bool isImp = false,
525 bool isKill = false, bool isDead = false,
526 bool isUndef = false, bool isDebug = false);
528 //===--------------------------------------------------------------------===//
529 // Construction methods.
530 //===--------------------------------------------------------------------===//
532 static MachineOperand CreateImm(int64_t Val) {
533 MachineOperand Op(MachineOperand::MO_Immediate);
538 static MachineOperand CreateCImm(const ConstantInt *CI) {
539 MachineOperand Op(MachineOperand::MO_CImmediate);
544 static MachineOperand CreateFPImm(const ConstantFP *CFP) {
545 MachineOperand Op(MachineOperand::MO_FPImmediate);
546 Op.Contents.CFP = CFP;
550 static MachineOperand CreateReg(unsigned Reg, bool isDef, bool isImp = false,
551 bool isKill = false, bool isDead = false,
552 bool isUndef = false,
553 bool isEarlyClobber = false,
555 bool isDebug = false,
556 bool isInternalRead = false) {
557 MachineOperand Op(MachineOperand::MO_Register);
562 Op.IsUndef = isUndef;
563 Op.IsInternalRead = isInternalRead;
564 Op.IsEarlyClobber = isEarlyClobber;
565 Op.IsDebug = isDebug;
566 Op.SmallContents.RegNo = Reg;
567 Op.Contents.Reg.Prev = 0;
568 Op.Contents.Reg.Next = 0;
572 static MachineOperand CreateMBB(MachineBasicBlock *MBB,
573 unsigned char TargetFlags = 0) {
574 MachineOperand Op(MachineOperand::MO_MachineBasicBlock);
576 Op.setTargetFlags(TargetFlags);
579 static MachineOperand CreateFI(int Idx) {
580 MachineOperand Op(MachineOperand::MO_FrameIndex);
584 static MachineOperand CreateCPI(unsigned Idx, int Offset,
585 unsigned char TargetFlags = 0) {
586 MachineOperand Op(MachineOperand::MO_ConstantPoolIndex);
588 Op.setOffset(Offset);
589 Op.setTargetFlags(TargetFlags);
592 static MachineOperand CreateJTI(unsigned Idx,
593 unsigned char TargetFlags = 0) {
594 MachineOperand Op(MachineOperand::MO_JumpTableIndex);
596 Op.setTargetFlags(TargetFlags);
599 static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset,
600 unsigned char TargetFlags = 0) {
601 MachineOperand Op(MachineOperand::MO_GlobalAddress);
602 Op.Contents.OffsetedInfo.Val.GV = GV;
603 Op.setOffset(Offset);
604 Op.setTargetFlags(TargetFlags);
607 static MachineOperand CreateES(const char *SymName,
608 unsigned char TargetFlags = 0) {
609 MachineOperand Op(MachineOperand::MO_ExternalSymbol);
610 Op.Contents.OffsetedInfo.Val.SymbolName = SymName;
611 Op.setOffset(0); // Offset is always 0.
612 Op.setTargetFlags(TargetFlags);
615 static MachineOperand CreateBA(const BlockAddress *BA,
616 unsigned char TargetFlags = 0) {
617 MachineOperand Op(MachineOperand::MO_BlockAddress);
618 Op.Contents.OffsetedInfo.Val.BA = BA;
619 Op.setOffset(0); // Offset is always 0.
620 Op.setTargetFlags(TargetFlags);
623 /// CreateRegMask - Creates a register mask operand referencing Mask. The
624 /// operand does not take ownership of the memory referenced by Mask, it must
625 /// remain valid for the lifetime of the operand.
627 /// A RegMask operand represents a set of non-clobbered physical registers on
628 /// an instruction that clobbers many registers, typically a call. The bit
629 /// mask has a bit set for each physreg that is preserved by this
630 /// instruction, as described in the documentation for
631 /// TargetRegisterInfo::getCallPreservedMask().
633 /// Any physreg with a 0 bit in the mask is clobbered by the instruction.
635 static MachineOperand CreateRegMask(const uint32_t *Mask) {
636 assert(Mask && "Missing register mask");
637 MachineOperand Op(MachineOperand::MO_RegisterMask);
638 Op.Contents.RegMask = Mask;
641 static MachineOperand CreateMetadata(const MDNode *Meta) {
642 MachineOperand Op(MachineOperand::MO_Metadata);
643 Op.Contents.MD = Meta;
647 static MachineOperand CreateMCSymbol(MCSymbol *Sym) {
648 MachineOperand Op(MachineOperand::MO_MCSymbol);
649 Op.Contents.Sym = Sym;
653 friend class MachineInstr;
654 friend class MachineRegisterInfo;
656 //===--------------------------------------------------------------------===//
657 // Methods for handling register use/def lists.
658 //===--------------------------------------------------------------------===//
660 /// isOnRegUseList - Return true if this operand is on a register use/def list
661 /// or false if not. This can only be called for register operands that are
662 /// part of a machine instruction.
663 bool isOnRegUseList() const {
664 assert(isReg() && "Can only add reg operand to use lists");
665 return Contents.Reg.Prev != 0;
668 /// AddRegOperandToRegInfo - Add this register operand to the specified
669 /// MachineRegisterInfo. If it is null, then the next/prev fields should be
670 /// explicitly nulled out.
671 void AddRegOperandToRegInfo(MachineRegisterInfo *RegInfo);
673 /// RemoveRegOperandFromRegInfo - Remove this register operand from the
674 /// MachineRegisterInfo it is linked with.
675 void RemoveRegOperandFromRegInfo();
678 inline raw_ostream &operator<<(raw_ostream &OS, const MachineOperand& MO) {
683 } // End llvm namespace