1 //===-- llvm/CodeGen/MachineOperand.h - MachineOperand class ----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the declaration of the MachineOperand class.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_CODEGEN_MACHINEOPERAND_H
15 #define LLVM_CODEGEN_MACHINEOPERAND_H
17 #include "llvm/Support/DataTypes.h"
26 class MachineBasicBlock;
28 class MachineRegisterInfo;
31 class TargetRegisterInfo;
36 /// MachineOperand class - Representation of each machine instruction operand.
38 /// This class isn't a POD type because it has a private constructor, but its
39 /// destructor must be trivial. Functions like MachineInstr::addOperand(),
40 /// MachineRegisterInfo::moveOperands(), and MF::DeleteMachineInstr() depend on
41 /// not having to call the MachineOperand destructor.
43 class MachineOperand {
45 enum MachineOperandType {
46 MO_Register, ///< Register operand.
47 MO_Immediate, ///< Immediate operand
48 MO_CImmediate, ///< Immediate >64bit operand
49 MO_FPImmediate, ///< Floating-point immediate operand
50 MO_MachineBasicBlock, ///< MachineBasicBlock reference
51 MO_FrameIndex, ///< Abstract Stack Frame Index
52 MO_ConstantPoolIndex, ///< Address of indexed Constant in Constant Pool
53 MO_TargetIndex, ///< Target-dependent index+offset operand.
54 MO_JumpTableIndex, ///< Address of indexed Jump Table for switch
55 MO_ExternalSymbol, ///< Name of external global symbol
56 MO_GlobalAddress, ///< Address of a global value
57 MO_BlockAddress, ///< Address of a basic block
58 MO_RegisterMask, ///< Mask of preserved registers.
59 MO_RegisterLiveOut, ///< Mask of live-out registers.
60 MO_Metadata, ///< Metadata reference (for debug info)
61 MO_MCSymbol ///< MCSymbol reference (for debug/eh info)
65 /// OpKind - Specify what kind of operand this is. This discriminates the
67 unsigned char OpKind; // MachineOperandType
69 /// Subregister number for MO_Register. A value of 0 indicates the
70 /// MO_Register has no subReg.
72 /// For all other kinds of operands, this field holds target-specific flags.
73 unsigned SubReg_TargetFlags : 12;
75 /// TiedTo - Non-zero when this register operand is tied to another register
76 /// operand. The encoding of this field is described in the block comment
77 /// before MachineInstr::tieOperands().
78 unsigned char TiedTo : 4;
80 /// IsDef/IsImp/IsKill/IsDead flags - These are only valid for MO_Register
83 /// IsDef - True if this is a def, false if this is a use of the register.
87 /// IsImp - True if this is an implicit def or use, false if it is explicit.
91 /// IsKill - True if this instruction is the last use of the register on this
92 /// path through the function. This is only valid on uses of registers.
95 /// IsDead - True if this register is never used by a subsequent instruction.
96 /// This is only valid on definitions of registers.
99 /// IsUndef - True if this register operand reads an "undef" value, i.e. the
100 /// read value doesn't matter. This flag can be set on both use and def
101 /// operands. On a sub-register def operand, it refers to the part of the
102 /// register that isn't written. On a full-register def operand, it is a
103 /// noop. See readsReg().
105 /// This is only valid on registers.
107 /// Note that an instruction may have multiple <undef> operands referring to
108 /// the same register. In that case, the instruction may depend on those
109 /// operands reading the same dont-care value. For example:
111 /// %vreg1<def> = XOR %vreg2<undef>, %vreg2<undef>
113 /// Any register can be used for %vreg2, and its value doesn't matter, but
114 /// the two operands must be the same register.
118 /// IsInternalRead - True if this operand reads a value that was defined
119 /// inside the same instruction or bundle. This flag can be set on both use
120 /// and def operands. On a sub-register def operand, it refers to the part
121 /// of the register that isn't written. On a full-register def operand, it
124 /// When this flag is set, the instruction bundle must contain at least one
125 /// other def of the register. If multiple instructions in the bundle define
126 /// the register, the meaning is target-defined.
127 bool IsInternalRead : 1;
129 /// IsEarlyClobber - True if this MO_Register 'def' operand is written to
130 /// by the MachineInstr before all input registers are read. This is used to
131 /// model the GCC inline asm '&' constraint modifier.
132 bool IsEarlyClobber : 1;
134 /// IsDebug - True if this MO_Register 'use' operand is in a debug pseudo,
135 /// not a real instruction. Such uses should be ignored during codegen.
138 /// SmallContents - This really should be part of the Contents union, but
139 /// lives out here so we can get a better packed struct.
140 /// MO_Register: Register number.
141 /// OffsetedInfo: Low bits of offset.
143 unsigned RegNo; // For MO_Register.
144 unsigned OffsetLo; // Matches Contents.OffsetedInfo.OffsetHi.
147 /// ParentMI - This is the instruction that this operand is embedded into.
148 /// This is valid for all operand types, when the operand is in an instr.
149 MachineInstr *ParentMI;
151 /// Contents union - This contains the payload for the various operand types.
153 MachineBasicBlock *MBB; // For MO_MachineBasicBlock.
154 const ConstantFP *CFP; // For MO_FPImmediate.
155 const ConstantInt *CI; // For MO_CImmediate. Integers > 64bit.
156 int64_t ImmVal; // For MO_Immediate.
157 const uint32_t *RegMask; // For MO_RegisterMask and MO_RegisterLiveOut.
158 const MDNode *MD; // For MO_Metadata.
159 MCSymbol *Sym; // For MO_MCSymbol
161 struct { // For MO_Register.
162 // Register number is in SmallContents.RegNo.
163 MachineOperand *Prev; // Access list for register. See MRI.
164 MachineOperand *Next;
167 /// OffsetedInfo - This struct contains the offset and an object identifier.
168 /// this represent the object as with an optional offset from it.
171 int Index; // For MO_*Index - The index itself.
172 const char *SymbolName; // For MO_ExternalSymbol.
173 const GlobalValue *GV; // For MO_GlobalAddress.
174 const BlockAddress *BA; // For MO_BlockAddress.
176 // Low bits of offset are in SmallContents.OffsetLo.
177 int OffsetHi; // An offset from the object, high 32 bits.
181 explicit MachineOperand(MachineOperandType K)
182 : OpKind(K), SubReg_TargetFlags(0), ParentMI(0) {}
184 /// getType - Returns the MachineOperandType for this operand.
186 MachineOperandType getType() const { return (MachineOperandType)OpKind; }
188 unsigned getTargetFlags() const {
189 return isReg() ? 0 : SubReg_TargetFlags;
191 void setTargetFlags(unsigned F) {
192 assert(!isReg() && "Register operands can't have target flags");
193 SubReg_TargetFlags = F;
194 assert(SubReg_TargetFlags == F && "Target flags out of range");
196 void addTargetFlag(unsigned F) {
197 assert(!isReg() && "Register operands can't have target flags");
198 SubReg_TargetFlags |= F;
199 assert((SubReg_TargetFlags & F) && "Target flags out of range");
203 /// getParent - Return the instruction that this operand belongs to.
205 MachineInstr *getParent() { return ParentMI; }
206 const MachineInstr *getParent() const { return ParentMI; }
208 /// clearParent - Reset the parent pointer.
210 /// The MachineOperand copy constructor also copies ParentMI, expecting the
211 /// original to be deleted. If a MachineOperand is ever stored outside a
212 /// MachineInstr, the parent pointer must be cleared.
214 /// Never call clearParent() on an operand in a MachineInstr.
216 void clearParent() { ParentMI = 0; }
218 void print(raw_ostream &os, const TargetMachine *TM = 0) const;
220 //===--------------------------------------------------------------------===//
221 // Accessors that tell you what kind of MachineOperand you're looking at.
222 //===--------------------------------------------------------------------===//
224 /// isReg - Tests if this is a MO_Register operand.
225 bool isReg() const { return OpKind == MO_Register; }
226 /// isImm - Tests if this is a MO_Immediate operand.
227 bool isImm() const { return OpKind == MO_Immediate; }
228 /// isCImm - Test if t his is a MO_CImmediate operand.
229 bool isCImm() const { return OpKind == MO_CImmediate; }
230 /// isFPImm - Tests if this is a MO_FPImmediate operand.
231 bool isFPImm() const { return OpKind == MO_FPImmediate; }
232 /// isMBB - Tests if this is a MO_MachineBasicBlock operand.
233 bool isMBB() const { return OpKind == MO_MachineBasicBlock; }
234 /// isFI - Tests if this is a MO_FrameIndex operand.
235 bool isFI() const { return OpKind == MO_FrameIndex; }
236 /// isCPI - Tests if this is a MO_ConstantPoolIndex operand.
237 bool isCPI() const { return OpKind == MO_ConstantPoolIndex; }
238 /// isTargetIndex - Tests if this is a MO_TargetIndex operand.
239 bool isTargetIndex() const { return OpKind == MO_TargetIndex; }
240 /// isJTI - Tests if this is a MO_JumpTableIndex operand.
241 bool isJTI() const { return OpKind == MO_JumpTableIndex; }
242 /// isGlobal - Tests if this is a MO_GlobalAddress operand.
243 bool isGlobal() const { return OpKind == MO_GlobalAddress; }
244 /// isSymbol - Tests if this is a MO_ExternalSymbol operand.
245 bool isSymbol() const { return OpKind == MO_ExternalSymbol; }
246 /// isBlockAddress - Tests if this is a MO_BlockAddress operand.
247 bool isBlockAddress() const { return OpKind == MO_BlockAddress; }
248 /// isRegMask - Tests if this is a MO_RegisterMask operand.
249 bool isRegMask() const { return OpKind == MO_RegisterMask; }
250 /// isRegLiveOut - Tests if this is a MO_RegisterLiveOut operand.
251 bool isRegLiveOut() const { return OpKind == MO_RegisterLiveOut; }
252 /// isMetadata - Tests if this is a MO_Metadata operand.
253 bool isMetadata() const { return OpKind == MO_Metadata; }
254 bool isMCSymbol() const { return OpKind == MO_MCSymbol; }
257 //===--------------------------------------------------------------------===//
258 // Accessors for Register Operands
259 //===--------------------------------------------------------------------===//
261 /// getReg - Returns the register number.
262 unsigned getReg() const {
263 assert(isReg() && "This is not a register operand!");
264 return SmallContents.RegNo;
267 unsigned getSubReg() const {
268 assert(isReg() && "Wrong MachineOperand accessor");
269 return SubReg_TargetFlags;
273 assert(isReg() && "Wrong MachineOperand accessor");
278 assert(isReg() && "Wrong MachineOperand accessor");
282 bool isImplicit() const {
283 assert(isReg() && "Wrong MachineOperand accessor");
287 bool isDead() const {
288 assert(isReg() && "Wrong MachineOperand accessor");
292 bool isKill() const {
293 assert(isReg() && "Wrong MachineOperand accessor");
297 bool isUndef() const {
298 assert(isReg() && "Wrong MachineOperand accessor");
302 bool isInternalRead() const {
303 assert(isReg() && "Wrong MachineOperand accessor");
304 return IsInternalRead;
307 bool isEarlyClobber() const {
308 assert(isReg() && "Wrong MachineOperand accessor");
309 return IsEarlyClobber;
312 bool isTied() const {
313 assert(isReg() && "Wrong MachineOperand accessor");
317 bool isDebug() const {
318 assert(isReg() && "Wrong MachineOperand accessor");
322 /// readsReg - Returns true if this operand reads the previous value of its
323 /// register. A use operand with the <undef> flag set doesn't read its
324 /// register. A sub-register def implicitly reads the other parts of the
325 /// register being redefined unless the <undef> flag is set.
327 /// This refers to reading the register value from before the current
328 /// instruction or bundle. Internal bundle reads are not included.
329 bool readsReg() const {
330 assert(isReg() && "Wrong MachineOperand accessor");
331 return !isUndef() && !isInternalRead() && (isUse() || getSubReg());
334 //===--------------------------------------------------------------------===//
335 // Mutators for Register Operands
336 //===--------------------------------------------------------------------===//
338 /// Change the register this operand corresponds to.
340 void setReg(unsigned Reg);
342 void setSubReg(unsigned subReg) {
343 assert(isReg() && "Wrong MachineOperand accessor");
344 SubReg_TargetFlags = subReg;
345 assert(SubReg_TargetFlags == subReg && "SubReg out of range");
348 /// substVirtReg - Substitute the current register with the virtual
349 /// subregister Reg:SubReg. Take any existing SubReg index into account,
350 /// using TargetRegisterInfo to compose the subreg indices if necessary.
351 /// Reg must be a virtual register, SubIdx can be 0.
353 void substVirtReg(unsigned Reg, unsigned SubIdx, const TargetRegisterInfo&);
355 /// substPhysReg - Substitute the current register with the physical register
356 /// Reg, taking any existing SubReg into account. For instance,
357 /// substPhysReg(%EAX) will change %reg1024:sub_8bit to %AL.
359 void substPhysReg(unsigned Reg, const TargetRegisterInfo&);
361 void setIsUse(bool Val = true) { setIsDef(!Val); }
363 void setIsDef(bool Val = true);
365 void setImplicit(bool Val = true) {
366 assert(isReg() && "Wrong MachineOperand accessor");
370 void setIsKill(bool Val = true) {
371 assert(isReg() && !IsDef && "Wrong MachineOperand accessor");
372 assert((!Val || !isDebug()) && "Marking a debug operation as kill");
376 void setIsDead(bool Val = true) {
377 assert(isReg() && IsDef && "Wrong MachineOperand accessor");
381 void setIsUndef(bool Val = true) {
382 assert(isReg() && "Wrong MachineOperand accessor");
386 void setIsInternalRead(bool Val = true) {
387 assert(isReg() && "Wrong MachineOperand accessor");
388 IsInternalRead = Val;
391 void setIsEarlyClobber(bool Val = true) {
392 assert(isReg() && IsDef && "Wrong MachineOperand accessor");
393 IsEarlyClobber = Val;
396 void setIsDebug(bool Val = true) {
397 assert(isReg() && !IsDef && "Wrong MachineOperand accessor");
401 //===--------------------------------------------------------------------===//
402 // Accessors for various operand types.
403 //===--------------------------------------------------------------------===//
405 int64_t getImm() const {
406 assert(isImm() && "Wrong MachineOperand accessor");
407 return Contents.ImmVal;
410 const ConstantInt *getCImm() const {
411 assert(isCImm() && "Wrong MachineOperand accessor");
415 const ConstantFP *getFPImm() const {
416 assert(isFPImm() && "Wrong MachineOperand accessor");
420 MachineBasicBlock *getMBB() const {
421 assert(isMBB() && "Wrong MachineOperand accessor");
425 int getIndex() const {
426 assert((isFI() || isCPI() || isTargetIndex() || isJTI()) &&
427 "Wrong MachineOperand accessor");
428 return Contents.OffsetedInfo.Val.Index;
431 const GlobalValue *getGlobal() const {
432 assert(isGlobal() && "Wrong MachineOperand accessor");
433 return Contents.OffsetedInfo.Val.GV;
436 const BlockAddress *getBlockAddress() const {
437 assert(isBlockAddress() && "Wrong MachineOperand accessor");
438 return Contents.OffsetedInfo.Val.BA;
441 MCSymbol *getMCSymbol() const {
442 assert(isMCSymbol() && "Wrong MachineOperand accessor");
446 /// getOffset - Return the offset from the symbol in this operand. This always
447 /// returns 0 for ExternalSymbol operands.
448 int64_t getOffset() const {
449 assert((isGlobal() || isSymbol() || isCPI() || isTargetIndex() ||
450 isBlockAddress()) && "Wrong MachineOperand accessor");
451 return int64_t(uint64_t(Contents.OffsetedInfo.OffsetHi) << 32) |
452 SmallContents.OffsetLo;
455 const char *getSymbolName() const {
456 assert(isSymbol() && "Wrong MachineOperand accessor");
457 return Contents.OffsetedInfo.Val.SymbolName;
460 /// clobbersPhysReg - Returns true if this RegMask clobbers PhysReg.
461 /// It is sometimes necessary to detach the register mask pointer from its
462 /// machine operand. This static method can be used for such detached bit
464 static bool clobbersPhysReg(const uint32_t *RegMask, unsigned PhysReg) {
465 // See TargetRegisterInfo.h.
466 assert(PhysReg < (1u << 30) && "Not a physical register");
467 return !(RegMask[PhysReg / 32] & (1u << PhysReg % 32));
470 /// clobbersPhysReg - Returns true if this RegMask operand clobbers PhysReg.
471 bool clobbersPhysReg(unsigned PhysReg) const {
472 return clobbersPhysReg(getRegMask(), PhysReg);
475 /// getRegMask - Returns a bit mask of registers preserved by this RegMask
477 const uint32_t *getRegMask() const {
478 assert(isRegMask() && "Wrong MachineOperand accessor");
479 return Contents.RegMask;
482 /// getRegLiveOut - Returns a bit mask of live-out registers.
483 const uint32_t *getRegLiveOut() const {
484 assert(isRegLiveOut() && "Wrong MachineOperand accessor");
485 return Contents.RegMask;
488 const MDNode *getMetadata() const {
489 assert(isMetadata() && "Wrong MachineOperand accessor");
493 //===--------------------------------------------------------------------===//
494 // Mutators for various operand types.
495 //===--------------------------------------------------------------------===//
497 void setImm(int64_t immVal) {
498 assert(isImm() && "Wrong MachineOperand mutator");
499 Contents.ImmVal = immVal;
502 void setOffset(int64_t Offset) {
503 assert((isGlobal() || isSymbol() || isCPI() || isTargetIndex() ||
504 isBlockAddress()) && "Wrong MachineOperand accessor");
505 SmallContents.OffsetLo = unsigned(Offset);
506 Contents.OffsetedInfo.OffsetHi = int(Offset >> 32);
509 void setIndex(int Idx) {
510 assert((isFI() || isCPI() || isTargetIndex() || isJTI()) &&
511 "Wrong MachineOperand accessor");
512 Contents.OffsetedInfo.Val.Index = Idx;
515 void setMBB(MachineBasicBlock *MBB) {
516 assert(isMBB() && "Wrong MachineOperand accessor");
520 //===--------------------------------------------------------------------===//
522 //===--------------------------------------------------------------------===//
524 /// isIdenticalTo - Return true if this operand is identical to the specified
525 /// operand. Note: This method ignores isKill and isDead properties.
526 bool isIdenticalTo(const MachineOperand &Other) const;
528 /// \brief MachineOperand hash_value overload.
530 /// Note that this includes the same information in the hash that
531 /// isIdenticalTo uses for comparison. It is thus suited for use in hash
532 /// tables which use that function for equality comparisons only.
533 friend hash_code hash_value(const MachineOperand &MO);
535 /// ChangeToImmediate - Replace this operand with a new immediate operand of
536 /// the specified value. If an operand is known to be an immediate already,
537 /// the setImm method should be used.
538 void ChangeToImmediate(int64_t ImmVal);
540 /// ChangeToRegister - Replace this operand with a new register operand of
541 /// the specified value. If an operand is known to be an register already,
542 /// the setReg method should be used.
543 void ChangeToRegister(unsigned Reg, bool isDef, bool isImp = false,
544 bool isKill = false, bool isDead = false,
545 bool isUndef = false, bool isDebug = false);
547 //===--------------------------------------------------------------------===//
548 // Construction methods.
549 //===--------------------------------------------------------------------===//
551 static MachineOperand CreateImm(int64_t Val) {
552 MachineOperand Op(MachineOperand::MO_Immediate);
557 static MachineOperand CreateCImm(const ConstantInt *CI) {
558 MachineOperand Op(MachineOperand::MO_CImmediate);
563 static MachineOperand CreateFPImm(const ConstantFP *CFP) {
564 MachineOperand Op(MachineOperand::MO_FPImmediate);
565 Op.Contents.CFP = CFP;
569 static MachineOperand CreateReg(unsigned Reg, bool isDef, bool isImp = false,
570 bool isKill = false, bool isDead = false,
571 bool isUndef = false,
572 bool isEarlyClobber = false,
574 bool isDebug = false,
575 bool isInternalRead = false) {
576 assert(!(isDead && !isDef) && "Dead flag on non-def");
577 assert(!(isKill && isDef) && "Kill flag on def");
578 MachineOperand Op(MachineOperand::MO_Register);
583 Op.IsUndef = isUndef;
584 Op.IsInternalRead = isInternalRead;
585 Op.IsEarlyClobber = isEarlyClobber;
587 Op.IsDebug = isDebug;
588 Op.SmallContents.RegNo = Reg;
589 Op.Contents.Reg.Prev = 0;
590 Op.Contents.Reg.Next = 0;
591 Op.setSubReg(SubReg);
594 static MachineOperand CreateMBB(MachineBasicBlock *MBB,
595 unsigned char TargetFlags = 0) {
596 MachineOperand Op(MachineOperand::MO_MachineBasicBlock);
598 Op.setTargetFlags(TargetFlags);
601 static MachineOperand CreateFI(int Idx) {
602 MachineOperand Op(MachineOperand::MO_FrameIndex);
606 static MachineOperand CreateCPI(unsigned Idx, int Offset,
607 unsigned char TargetFlags = 0) {
608 MachineOperand Op(MachineOperand::MO_ConstantPoolIndex);
610 Op.setOffset(Offset);
611 Op.setTargetFlags(TargetFlags);
614 static MachineOperand CreateTargetIndex(unsigned Idx, int64_t Offset,
615 unsigned char TargetFlags = 0) {
616 MachineOperand Op(MachineOperand::MO_TargetIndex);
618 Op.setOffset(Offset);
619 Op.setTargetFlags(TargetFlags);
622 static MachineOperand CreateJTI(unsigned Idx,
623 unsigned char TargetFlags = 0) {
624 MachineOperand Op(MachineOperand::MO_JumpTableIndex);
626 Op.setTargetFlags(TargetFlags);
629 static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset,
630 unsigned char TargetFlags = 0) {
631 MachineOperand Op(MachineOperand::MO_GlobalAddress);
632 Op.Contents.OffsetedInfo.Val.GV = GV;
633 Op.setOffset(Offset);
634 Op.setTargetFlags(TargetFlags);
637 static MachineOperand CreateES(const char *SymName,
638 unsigned char TargetFlags = 0) {
639 MachineOperand Op(MachineOperand::MO_ExternalSymbol);
640 Op.Contents.OffsetedInfo.Val.SymbolName = SymName;
641 Op.setOffset(0); // Offset is always 0.
642 Op.setTargetFlags(TargetFlags);
645 static MachineOperand CreateBA(const BlockAddress *BA, int64_t Offset,
646 unsigned char TargetFlags = 0) {
647 MachineOperand Op(MachineOperand::MO_BlockAddress);
648 Op.Contents.OffsetedInfo.Val.BA = BA;
649 Op.setOffset(Offset);
650 Op.setTargetFlags(TargetFlags);
653 /// CreateRegMask - Creates a register mask operand referencing Mask. The
654 /// operand does not take ownership of the memory referenced by Mask, it must
655 /// remain valid for the lifetime of the operand.
657 /// A RegMask operand represents a set of non-clobbered physical registers on
658 /// an instruction that clobbers many registers, typically a call. The bit
659 /// mask has a bit set for each physreg that is preserved by this
660 /// instruction, as described in the documentation for
661 /// TargetRegisterInfo::getCallPreservedMask().
663 /// Any physreg with a 0 bit in the mask is clobbered by the instruction.
665 static MachineOperand CreateRegMask(const uint32_t *Mask) {
666 assert(Mask && "Missing register mask");
667 MachineOperand Op(MachineOperand::MO_RegisterMask);
668 Op.Contents.RegMask = Mask;
671 static MachineOperand CreateRegLiveOut(const uint32_t *Mask) {
672 assert(Mask && "Missing live-out register mask");
673 MachineOperand Op(MachineOperand::MO_RegisterLiveOut);
674 Op.Contents.RegMask = Mask;
677 static MachineOperand CreateMetadata(const MDNode *Meta) {
678 MachineOperand Op(MachineOperand::MO_Metadata);
679 Op.Contents.MD = Meta;
683 static MachineOperand CreateMCSymbol(MCSymbol *Sym) {
684 MachineOperand Op(MachineOperand::MO_MCSymbol);
685 Op.Contents.Sym = Sym;
689 friend class MachineInstr;
690 friend class MachineRegisterInfo;
692 //===--------------------------------------------------------------------===//
693 // Methods for handling register use/def lists.
694 //===--------------------------------------------------------------------===//
696 /// isOnRegUseList - Return true if this operand is on a register use/def list
697 /// or false if not. This can only be called for register operands that are
698 /// part of a machine instruction.
699 bool isOnRegUseList() const {
700 assert(isReg() && "Can only add reg operand to use lists");
701 return Contents.Reg.Prev != 0;
705 inline raw_ostream &operator<<(raw_ostream &OS, const MachineOperand& MO) {
710 // See friend declaration above. This additional declaration is required in
711 // order to compile LLVM with IBM xlC compiler.
712 hash_code hash_value(const MachineOperand &MO);
713 } // End llvm namespace