1 //===-- llvm/CodeGen/MachineOperand.h - MachineOperand class ----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the declaration of the MachineOperand class.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_CODEGEN_MACHINEOPERAND_H
15 #define LLVM_CODEGEN_MACHINEOPERAND_H
17 #include "llvm/Support/DataTypes.h"
26 class MachineBasicBlock;
28 class MachineRegisterInfo;
31 class TargetRegisterInfo;
36 /// MachineOperand class - Representation of each machine instruction operand.
38 /// This class isn't a POD type because it has a private constructor, but its
39 /// destructor must be trivial. Functions like MachineInstr::addOperand(),
40 /// MachineRegisterInfo::moveOperands(), and MF::DeleteMachineInstr() depend on
41 /// not having to call the MachineOperand destructor.
43 class MachineOperand {
45 enum MachineOperandType : unsigned char {
46 MO_Register, ///< Register operand.
47 MO_Immediate, ///< Immediate operand
48 MO_CImmediate, ///< Immediate >64bit operand
49 MO_FPImmediate, ///< Floating-point immediate operand
50 MO_MachineBasicBlock, ///< MachineBasicBlock reference
51 MO_FrameIndex, ///< Abstract Stack Frame Index
52 MO_ConstantPoolIndex, ///< Address of indexed Constant in Constant Pool
53 MO_TargetIndex, ///< Target-dependent index+offset operand.
54 MO_JumpTableIndex, ///< Address of indexed Jump Table for switch
55 MO_ExternalSymbol, ///< Name of external global symbol
56 MO_GlobalAddress, ///< Address of a global value
57 MO_BlockAddress, ///< Address of a basic block
58 MO_RegisterMask, ///< Mask of preserved registers.
59 MO_RegisterLiveOut, ///< Mask of live-out registers.
60 MO_Metadata, ///< Metadata reference (for debug info)
61 MO_MCSymbol, ///< MCSymbol reference (for debug/eh info)
62 MO_CFIIndex ///< MCCFIInstruction index.
66 /// OpKind - Specify what kind of operand this is. This discriminates the
68 MachineOperandType OpKind;
70 /// Subregister number for MO_Register. A value of 0 indicates the
71 /// MO_Register has no subReg.
73 /// For all other kinds of operands, this field holds target-specific flags.
74 unsigned SubReg_TargetFlags : 12;
76 /// TiedTo - Non-zero when this register operand is tied to another register
77 /// operand. The encoding of this field is described in the block comment
78 /// before MachineInstr::tieOperands().
79 unsigned char TiedTo : 4;
81 /// IsDef/IsImp/IsKill/IsDead flags - These are only valid for MO_Register
84 /// IsDef - True if this is a def, false if this is a use of the register.
88 /// IsImp - True if this is an implicit def or use, false if it is explicit.
92 /// IsKill - True if this instruction is the last use of the register on this
93 /// path through the function. This is only valid on uses of registers.
96 /// IsDead - True if this register is never used by a subsequent instruction.
97 /// This is only valid on definitions of registers.
100 /// IsUndef - True if this register operand reads an "undef" value, i.e. the
101 /// read value doesn't matter. This flag can be set on both use and def
102 /// operands. On a sub-register def operand, it refers to the part of the
103 /// register that isn't written. On a full-register def operand, it is a
104 /// noop. See readsReg().
106 /// This is only valid on registers.
108 /// Note that an instruction may have multiple <undef> operands referring to
109 /// the same register. In that case, the instruction may depend on those
110 /// operands reading the same dont-care value. For example:
112 /// %vreg1<def> = XOR %vreg2<undef>, %vreg2<undef>
114 /// Any register can be used for %vreg2, and its value doesn't matter, but
115 /// the two operands must be the same register.
119 /// IsInternalRead - True if this operand reads a value that was defined
120 /// inside the same instruction or bundle. This flag can be set on both use
121 /// and def operands. On a sub-register def operand, it refers to the part
122 /// of the register that isn't written. On a full-register def operand, it
125 /// When this flag is set, the instruction bundle must contain at least one
126 /// other def of the register. If multiple instructions in the bundle define
127 /// the register, the meaning is target-defined.
128 bool IsInternalRead : 1;
130 /// IsEarlyClobber - True if this MO_Register 'def' operand is written to
131 /// by the MachineInstr before all input registers are read. This is used to
132 /// model the GCC inline asm '&' constraint modifier.
133 bool IsEarlyClobber : 1;
135 /// IsDebug - True if this MO_Register 'use' operand is in a debug pseudo,
136 /// not a real instruction. Such uses should be ignored during codegen.
139 /// SmallContents - This really should be part of the Contents union, but
140 /// lives out here so we can get a better packed struct.
141 /// MO_Register: Register number.
142 /// OffsetedInfo: Low bits of offset.
144 unsigned RegNo; // For MO_Register.
145 unsigned OffsetLo; // Matches Contents.OffsetedInfo.OffsetHi.
148 /// ParentMI - This is the instruction that this operand is embedded into.
149 /// This is valid for all operand types, when the operand is in an instr.
150 MachineInstr *ParentMI;
152 /// Contents union - This contains the payload for the various operand types.
154 MachineBasicBlock *MBB; // For MO_MachineBasicBlock.
155 const ConstantFP *CFP; // For MO_FPImmediate.
156 const ConstantInt *CI; // For MO_CImmediate. Integers > 64bit.
157 int64_t ImmVal; // For MO_Immediate.
158 const uint32_t *RegMask; // For MO_RegisterMask and MO_RegisterLiveOut.
159 const MDNode *MD; // For MO_Metadata.
160 MCSymbol *Sym; // For MO_MCSymbol.
161 unsigned CFIIndex; // For MO_CFI.
163 struct { // For MO_Register.
164 // Register number is in SmallContents.RegNo.
165 MachineOperand *Prev; // Access list for register. See MRI.
166 MachineOperand *Next;
169 /// OffsetedInfo - This struct contains the offset and an object identifier.
170 /// this represent the object as with an optional offset from it.
173 int Index; // For MO_*Index - The index itself.
174 const char *SymbolName; // For MO_ExternalSymbol.
175 const GlobalValue *GV; // For MO_GlobalAddress.
176 const BlockAddress *BA; // For MO_BlockAddress.
178 // Low bits of offset are in SmallContents.OffsetLo.
179 int OffsetHi; // An offset from the object, high 32 bits.
183 explicit MachineOperand(MachineOperandType K)
184 : OpKind(K), SubReg_TargetFlags(0), ParentMI(nullptr) {}
186 /// getType - Returns the MachineOperandType for this operand.
188 MachineOperandType getType() const { return (MachineOperandType)OpKind; }
190 unsigned getTargetFlags() const {
191 return isReg() ? 0 : SubReg_TargetFlags;
193 void setTargetFlags(unsigned F) {
194 assert(!isReg() && "Register operands can't have target flags");
195 SubReg_TargetFlags = F;
196 assert(SubReg_TargetFlags == F && "Target flags out of range");
198 void addTargetFlag(unsigned F) {
199 assert(!isReg() && "Register operands can't have target flags");
200 SubReg_TargetFlags |= F;
201 assert((SubReg_TargetFlags & F) && "Target flags out of range");
205 /// getParent - Return the instruction that this operand belongs to.
207 MachineInstr *getParent() { return ParentMI; }
208 const MachineInstr *getParent() const { return ParentMI; }
210 /// clearParent - Reset the parent pointer.
212 /// The MachineOperand copy constructor also copies ParentMI, expecting the
213 /// original to be deleted. If a MachineOperand is ever stored outside a
214 /// MachineInstr, the parent pointer must be cleared.
216 /// Never call clearParent() on an operand in a MachineInstr.
218 void clearParent() { ParentMI = nullptr; }
220 void print(raw_ostream &os, const TargetMachine *TM = nullptr) const;
222 //===--------------------------------------------------------------------===//
223 // Accessors that tell you what kind of MachineOperand you're looking at.
224 //===--------------------------------------------------------------------===//
226 /// isReg - Tests if this is a MO_Register operand.
227 bool isReg() const { return OpKind == MO_Register; }
228 /// isImm - Tests if this is a MO_Immediate operand.
229 bool isImm() const { return OpKind == MO_Immediate; }
230 /// isCImm - Test if this is a MO_CImmediate operand.
231 bool isCImm() const { return OpKind == MO_CImmediate; }
232 /// isFPImm - Tests if this is a MO_FPImmediate operand.
233 bool isFPImm() const { return OpKind == MO_FPImmediate; }
234 /// isMBB - Tests if this is a MO_MachineBasicBlock operand.
235 bool isMBB() const { return OpKind == MO_MachineBasicBlock; }
236 /// isFI - Tests if this is a MO_FrameIndex operand.
237 bool isFI() const { return OpKind == MO_FrameIndex; }
238 /// isCPI - Tests if this is a MO_ConstantPoolIndex operand.
239 bool isCPI() const { return OpKind == MO_ConstantPoolIndex; }
240 /// isTargetIndex - Tests if this is a MO_TargetIndex operand.
241 bool isTargetIndex() const { return OpKind == MO_TargetIndex; }
242 /// isJTI - Tests if this is a MO_JumpTableIndex operand.
243 bool isJTI() const { return OpKind == MO_JumpTableIndex; }
244 /// isGlobal - Tests if this is a MO_GlobalAddress operand.
245 bool isGlobal() const { return OpKind == MO_GlobalAddress; }
246 /// isSymbol - Tests if this is a MO_ExternalSymbol operand.
247 bool isSymbol() const { return OpKind == MO_ExternalSymbol; }
248 /// isBlockAddress - Tests if this is a MO_BlockAddress operand.
249 bool isBlockAddress() const { return OpKind == MO_BlockAddress; }
250 /// isRegMask - Tests if this is a MO_RegisterMask operand.
251 bool isRegMask() const { return OpKind == MO_RegisterMask; }
252 /// isRegLiveOut - Tests if this is a MO_RegisterLiveOut operand.
253 bool isRegLiveOut() const { return OpKind == MO_RegisterLiveOut; }
254 /// isMetadata - Tests if this is a MO_Metadata operand.
255 bool isMetadata() const { return OpKind == MO_Metadata; }
256 bool isMCSymbol() const { return OpKind == MO_MCSymbol; }
257 bool isCFIIndex() const { return OpKind == MO_CFIIndex; }
259 //===--------------------------------------------------------------------===//
260 // Accessors for Register Operands
261 //===--------------------------------------------------------------------===//
263 /// getReg - Returns the register number.
264 unsigned getReg() const {
265 assert(isReg() && "This is not a register operand!");
266 return SmallContents.RegNo;
269 unsigned getSubReg() const {
270 assert(isReg() && "Wrong MachineOperand accessor");
271 return SubReg_TargetFlags;
275 assert(isReg() && "Wrong MachineOperand accessor");
280 assert(isReg() && "Wrong MachineOperand accessor");
284 bool isImplicit() const {
285 assert(isReg() && "Wrong MachineOperand accessor");
289 bool isDead() const {
290 assert(isReg() && "Wrong MachineOperand accessor");
294 bool isKill() const {
295 assert(isReg() && "Wrong MachineOperand accessor");
299 bool isUndef() const {
300 assert(isReg() && "Wrong MachineOperand accessor");
304 bool isInternalRead() const {
305 assert(isReg() && "Wrong MachineOperand accessor");
306 return IsInternalRead;
309 bool isEarlyClobber() const {
310 assert(isReg() && "Wrong MachineOperand accessor");
311 return IsEarlyClobber;
314 bool isTied() const {
315 assert(isReg() && "Wrong MachineOperand accessor");
319 bool isDebug() const {
320 assert(isReg() && "Wrong MachineOperand accessor");
324 /// readsReg - Returns true if this operand reads the previous value of its
325 /// register. A use operand with the <undef> flag set doesn't read its
326 /// register. A sub-register def implicitly reads the other parts of the
327 /// register being redefined unless the <undef> flag is set.
329 /// This refers to reading the register value from before the current
330 /// instruction or bundle. Internal bundle reads are not included.
331 bool readsReg() const {
332 assert(isReg() && "Wrong MachineOperand accessor");
333 return !isUndef() && !isInternalRead() && (isUse() || getSubReg());
336 //===--------------------------------------------------------------------===//
337 // Mutators for Register Operands
338 //===--------------------------------------------------------------------===//
340 /// Change the register this operand corresponds to.
342 void setReg(unsigned Reg);
344 void setSubReg(unsigned subReg) {
345 assert(isReg() && "Wrong MachineOperand accessor");
346 SubReg_TargetFlags = subReg;
347 assert(SubReg_TargetFlags == subReg && "SubReg out of range");
350 /// substVirtReg - Substitute the current register with the virtual
351 /// subregister Reg:SubReg. Take any existing SubReg index into account,
352 /// using TargetRegisterInfo to compose the subreg indices if necessary.
353 /// Reg must be a virtual register, SubIdx can be 0.
355 void substVirtReg(unsigned Reg, unsigned SubIdx, const TargetRegisterInfo&);
357 /// substPhysReg - Substitute the current register with the physical register
358 /// Reg, taking any existing SubReg into account. For instance,
359 /// substPhysReg(%EAX) will change %reg1024:sub_8bit to %AL.
361 void substPhysReg(unsigned Reg, const TargetRegisterInfo&);
363 void setIsUse(bool Val = true) { setIsDef(!Val); }
365 void setIsDef(bool Val = true);
367 void setImplicit(bool Val = true) {
368 assert(isReg() && "Wrong MachineOperand accessor");
372 void setIsKill(bool Val = true) {
373 assert(isReg() && !IsDef && "Wrong MachineOperand accessor");
374 assert((!Val || !isDebug()) && "Marking a debug operation as kill");
378 void setIsDead(bool Val = true) {
379 assert(isReg() && IsDef && "Wrong MachineOperand accessor");
383 void setIsUndef(bool Val = true) {
384 assert(isReg() && "Wrong MachineOperand accessor");
388 void setIsInternalRead(bool Val = true) {
389 assert(isReg() && "Wrong MachineOperand accessor");
390 IsInternalRead = Val;
393 void setIsEarlyClobber(bool Val = true) {
394 assert(isReg() && IsDef && "Wrong MachineOperand accessor");
395 IsEarlyClobber = Val;
398 void setIsDebug(bool Val = true) {
399 assert(isReg() && !IsDef && "Wrong MachineOperand accessor");
403 //===--------------------------------------------------------------------===//
404 // Accessors for various operand types.
405 //===--------------------------------------------------------------------===//
407 int64_t getImm() const {
408 assert(isImm() && "Wrong MachineOperand accessor");
409 return Contents.ImmVal;
412 const ConstantInt *getCImm() const {
413 assert(isCImm() && "Wrong MachineOperand accessor");
417 const ConstantFP *getFPImm() const {
418 assert(isFPImm() && "Wrong MachineOperand accessor");
422 MachineBasicBlock *getMBB() const {
423 assert(isMBB() && "Wrong MachineOperand accessor");
427 int getIndex() const {
428 assert((isFI() || isCPI() || isTargetIndex() || isJTI()) &&
429 "Wrong MachineOperand accessor");
430 return Contents.OffsetedInfo.Val.Index;
433 const GlobalValue *getGlobal() const {
434 assert(isGlobal() && "Wrong MachineOperand accessor");
435 return Contents.OffsetedInfo.Val.GV;
438 const BlockAddress *getBlockAddress() const {
439 assert(isBlockAddress() && "Wrong MachineOperand accessor");
440 return Contents.OffsetedInfo.Val.BA;
443 MCSymbol *getMCSymbol() const {
444 assert(isMCSymbol() && "Wrong MachineOperand accessor");
448 unsigned getCFIIndex() const {
449 assert(isCFIIndex() && "Wrong MachineOperand accessor");
450 return Contents.CFIIndex;
453 /// getOffset - Return the offset from the symbol in this operand. This always
454 /// returns 0 for ExternalSymbol operands.
455 int64_t getOffset() const {
456 assert((isGlobal() || isSymbol() || isCPI() || isTargetIndex() ||
457 isBlockAddress()) && "Wrong MachineOperand accessor");
458 return int64_t(uint64_t(Contents.OffsetedInfo.OffsetHi) << 32) |
459 SmallContents.OffsetLo;
462 const char *getSymbolName() const {
463 assert(isSymbol() && "Wrong MachineOperand accessor");
464 return Contents.OffsetedInfo.Val.SymbolName;
467 /// clobbersPhysReg - Returns true if this RegMask clobbers PhysReg.
468 /// It is sometimes necessary to detach the register mask pointer from its
469 /// machine operand. This static method can be used for such detached bit
471 static bool clobbersPhysReg(const uint32_t *RegMask, unsigned PhysReg) {
472 // See TargetRegisterInfo.h.
473 assert(PhysReg < (1u << 30) && "Not a physical register");
474 return !(RegMask[PhysReg / 32] & (1u << PhysReg % 32));
477 /// clobbersPhysReg - Returns true if this RegMask operand clobbers PhysReg.
478 bool clobbersPhysReg(unsigned PhysReg) const {
479 return clobbersPhysReg(getRegMask(), PhysReg);
482 /// getRegMask - Returns a bit mask of registers preserved by this RegMask
484 const uint32_t *getRegMask() const {
485 assert(isRegMask() && "Wrong MachineOperand accessor");
486 return Contents.RegMask;
489 /// getRegLiveOut - Returns a bit mask of live-out registers.
490 const uint32_t *getRegLiveOut() const {
491 assert(isRegLiveOut() && "Wrong MachineOperand accessor");
492 return Contents.RegMask;
495 const MDNode *getMetadata() const {
496 assert(isMetadata() && "Wrong MachineOperand accessor");
500 //===--------------------------------------------------------------------===//
501 // Mutators for various operand types.
502 //===--------------------------------------------------------------------===//
504 void setImm(int64_t immVal) {
505 assert(isImm() && "Wrong MachineOperand mutator");
506 Contents.ImmVal = immVal;
509 void setFPImm(const ConstantFP *CFP) {
510 assert(isFPImm() && "Wrong MachineOperand mutator");
514 void setOffset(int64_t Offset) {
515 assert((isGlobal() || isSymbol() || isCPI() || isTargetIndex() ||
516 isBlockAddress()) && "Wrong MachineOperand accessor");
517 SmallContents.OffsetLo = unsigned(Offset);
518 Contents.OffsetedInfo.OffsetHi = int(Offset >> 32);
521 void setIndex(int Idx) {
522 assert((isFI() || isCPI() || isTargetIndex() || isJTI()) &&
523 "Wrong MachineOperand accessor");
524 Contents.OffsetedInfo.Val.Index = Idx;
527 void setMBB(MachineBasicBlock *MBB) {
528 assert(isMBB() && "Wrong MachineOperand accessor");
532 //===--------------------------------------------------------------------===//
534 //===--------------------------------------------------------------------===//
536 /// isIdenticalTo - Return true if this operand is identical to the specified
537 /// operand. Note: This method ignores isKill and isDead properties.
538 bool isIdenticalTo(const MachineOperand &Other) const;
540 /// \brief MachineOperand hash_value overload.
542 /// Note that this includes the same information in the hash that
543 /// isIdenticalTo uses for comparison. It is thus suited for use in hash
544 /// tables which use that function for equality comparisons only.
545 friend hash_code hash_value(const MachineOperand &MO);
547 /// ChangeToImmediate - Replace this operand with a new immediate operand of
548 /// the specified value. If an operand is known to be an immediate already,
549 /// the setImm method should be used.
550 void ChangeToImmediate(int64_t ImmVal);
552 /// ChangeToFPImmediate - Replace this operand with a new FP immediate operand
553 /// of the specified value. If an operand is known to be an FP immediate
554 /// already, the setFPImm method should be used.
555 void ChangeToFPImmediate(const ConstantFP *FPImm);
557 /// ChangeToRegister - Replace this operand with a new register operand of
558 /// the specified value. If an operand is known to be an register already,
559 /// the setReg method should be used.
560 void ChangeToRegister(unsigned Reg, bool isDef, bool isImp = false,
561 bool isKill = false, bool isDead = false,
562 bool isUndef = false, bool isDebug = false);
564 //===--------------------------------------------------------------------===//
565 // Construction methods.
566 //===--------------------------------------------------------------------===//
568 static MachineOperand CreateImm(int64_t Val) {
569 MachineOperand Op(MachineOperand::MO_Immediate);
574 static MachineOperand CreateCImm(const ConstantInt *CI) {
575 MachineOperand Op(MachineOperand::MO_CImmediate);
580 static MachineOperand CreateFPImm(const ConstantFP *CFP) {
581 MachineOperand Op(MachineOperand::MO_FPImmediate);
582 Op.Contents.CFP = CFP;
586 static MachineOperand CreateReg(unsigned Reg, bool isDef, bool isImp = false,
587 bool isKill = false, bool isDead = false,
588 bool isUndef = false,
589 bool isEarlyClobber = false,
591 bool isDebug = false,
592 bool isInternalRead = false) {
593 assert(!(isDead && !isDef) && "Dead flag on non-def");
594 assert(!(isKill && isDef) && "Kill flag on def");
595 MachineOperand Op(MachineOperand::MO_Register);
600 Op.IsUndef = isUndef;
601 Op.IsInternalRead = isInternalRead;
602 Op.IsEarlyClobber = isEarlyClobber;
604 Op.IsDebug = isDebug;
605 Op.SmallContents.RegNo = Reg;
606 Op.Contents.Reg.Prev = nullptr;
607 Op.Contents.Reg.Next = nullptr;
608 Op.setSubReg(SubReg);
611 static MachineOperand CreateMBB(MachineBasicBlock *MBB,
612 unsigned char TargetFlags = 0) {
613 MachineOperand Op(MachineOperand::MO_MachineBasicBlock);
615 Op.setTargetFlags(TargetFlags);
618 static MachineOperand CreateFI(int Idx) {
619 MachineOperand Op(MachineOperand::MO_FrameIndex);
623 static MachineOperand CreateCPI(unsigned Idx, int Offset,
624 unsigned char TargetFlags = 0) {
625 MachineOperand Op(MachineOperand::MO_ConstantPoolIndex);
627 Op.setOffset(Offset);
628 Op.setTargetFlags(TargetFlags);
631 static MachineOperand CreateTargetIndex(unsigned Idx, int64_t Offset,
632 unsigned char TargetFlags = 0) {
633 MachineOperand Op(MachineOperand::MO_TargetIndex);
635 Op.setOffset(Offset);
636 Op.setTargetFlags(TargetFlags);
639 static MachineOperand CreateJTI(unsigned Idx,
640 unsigned char TargetFlags = 0) {
641 MachineOperand Op(MachineOperand::MO_JumpTableIndex);
643 Op.setTargetFlags(TargetFlags);
646 static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset,
647 unsigned char TargetFlags = 0) {
648 MachineOperand Op(MachineOperand::MO_GlobalAddress);
649 Op.Contents.OffsetedInfo.Val.GV = GV;
650 Op.setOffset(Offset);
651 Op.setTargetFlags(TargetFlags);
654 static MachineOperand CreateES(const char *SymName,
655 unsigned char TargetFlags = 0) {
656 MachineOperand Op(MachineOperand::MO_ExternalSymbol);
657 Op.Contents.OffsetedInfo.Val.SymbolName = SymName;
658 Op.setOffset(0); // Offset is always 0.
659 Op.setTargetFlags(TargetFlags);
662 static MachineOperand CreateBA(const BlockAddress *BA, int64_t Offset,
663 unsigned char TargetFlags = 0) {
664 MachineOperand Op(MachineOperand::MO_BlockAddress);
665 Op.Contents.OffsetedInfo.Val.BA = BA;
666 Op.setOffset(Offset);
667 Op.setTargetFlags(TargetFlags);
670 /// CreateRegMask - Creates a register mask operand referencing Mask. The
671 /// operand does not take ownership of the memory referenced by Mask, it must
672 /// remain valid for the lifetime of the operand.
674 /// A RegMask operand represents a set of non-clobbered physical registers on
675 /// an instruction that clobbers many registers, typically a call. The bit
676 /// mask has a bit set for each physreg that is preserved by this
677 /// instruction, as described in the documentation for
678 /// TargetRegisterInfo::getCallPreservedMask().
680 /// Any physreg with a 0 bit in the mask is clobbered by the instruction.
682 static MachineOperand CreateRegMask(const uint32_t *Mask) {
683 assert(Mask && "Missing register mask");
684 MachineOperand Op(MachineOperand::MO_RegisterMask);
685 Op.Contents.RegMask = Mask;
688 static MachineOperand CreateRegLiveOut(const uint32_t *Mask) {
689 assert(Mask && "Missing live-out register mask");
690 MachineOperand Op(MachineOperand::MO_RegisterLiveOut);
691 Op.Contents.RegMask = Mask;
694 static MachineOperand CreateMetadata(const MDNode *Meta) {
695 MachineOperand Op(MachineOperand::MO_Metadata);
696 Op.Contents.MD = Meta;
700 static MachineOperand CreateMCSymbol(MCSymbol *Sym) {
701 MachineOperand Op(MachineOperand::MO_MCSymbol);
702 Op.Contents.Sym = Sym;
706 static MachineOperand CreateCFIIndex(unsigned CFIIndex) {
707 MachineOperand Op(MachineOperand::MO_CFIIndex);
708 Op.Contents.CFIIndex = CFIIndex;
712 friend class MachineInstr;
713 friend class MachineRegisterInfo;
715 void removeRegFromUses();
717 //===--------------------------------------------------------------------===//
718 // Methods for handling register use/def lists.
719 //===--------------------------------------------------------------------===//
721 /// isOnRegUseList - Return true if this operand is on a register use/def list
722 /// or false if not. This can only be called for register operands that are
723 /// part of a machine instruction.
724 bool isOnRegUseList() const {
725 assert(isReg() && "Can only add reg operand to use lists");
726 return Contents.Reg.Prev != nullptr;
730 inline raw_ostream &operator<<(raw_ostream &OS, const MachineOperand& MO) {
731 MO.print(OS, nullptr);
735 // See friend declaration above. This additional declaration is required in
736 // order to compile LLVM with IBM xlC compiler.
737 hash_code hash_value(const MachineOperand &MO);
738 } // End llvm namespace