1 //===-- llvm/CodeGen/MachineOperand.h - MachineOperand class ----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the declaration of the MachineOperand class.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_CODEGEN_MACHINEOPERAND_H
15 #define LLVM_CODEGEN_MACHINEOPERAND_H
17 #include "llvm/ADT/Hashing.h"
18 #include "llvm/Support/DataTypes.h"
27 class MachineBasicBlock;
29 class MachineRegisterInfo;
32 class TargetRegisterInfo;
36 /// MachineOperand class - Representation of each machine instruction operand.
38 class MachineOperand {
40 enum MachineOperandType {
41 MO_Register, ///< Register operand.
42 MO_Immediate, ///< Immediate operand
43 MO_CImmediate, ///< Immediate >64bit operand
44 MO_FPImmediate, ///< Floating-point immediate operand
45 MO_MachineBasicBlock, ///< MachineBasicBlock reference
46 MO_FrameIndex, ///< Abstract Stack Frame Index
47 MO_ConstantPoolIndex, ///< Address of indexed Constant in Constant Pool
48 MO_TargetIndex, ///< Target-dependent index+offset operand.
49 MO_JumpTableIndex, ///< Address of indexed Jump Table for switch
50 MO_ExternalSymbol, ///< Name of external global symbol
51 MO_GlobalAddress, ///< Address of a global value
52 MO_BlockAddress, ///< Address of a basic block
53 MO_RegisterMask, ///< Mask of preserved registers.
54 MO_Metadata, ///< Metadata reference (for debug info)
55 MO_MCSymbol ///< MCSymbol reference (for debug/eh info)
59 /// OpKind - Specify what kind of operand this is. This discriminates the
61 unsigned char OpKind; // MachineOperandType
63 /// SubReg - Subregister number, only valid for MO_Register. A value of 0
64 /// indicates the MO_Register has no subReg.
67 /// TargetFlags - This is a set of target-specific operand flags.
68 unsigned char TargetFlags;
70 /// IsDef/IsImp/IsKill/IsDead flags - These are only valid for MO_Register
73 /// IsDef - True if this is a def, false if this is a use of the register.
77 /// IsImp - True if this is an implicit def or use, false if it is explicit.
81 /// IsKill - True if this instruction is the last use of the register on this
82 /// path through the function. This is only valid on uses of registers.
85 /// IsDead - True if this register is never used by a subsequent instruction.
86 /// This is only valid on definitions of registers.
89 /// IsUndef - True if this register operand reads an "undef" value, i.e. the
90 /// read value doesn't matter. This flag can be set on both use and def
91 /// operands. On a sub-register def operand, it refers to the part of the
92 /// register that isn't written. On a full-register def operand, it is a
93 /// noop. See readsReg().
95 /// This is only valid on registers.
97 /// Note that an instruction may have multiple <undef> operands referring to
98 /// the same register. In that case, the instruction may depend on those
99 /// operands reading the same dont-care value. For example:
101 /// %vreg1<def> = XOR %vreg2<undef>, %vreg2<undef>
103 /// Any register can be used for %vreg2, and its value doesn't matter, but
104 /// the two operands must be the same register.
108 /// IsInternalRead - True if this operand reads a value that was defined
109 /// inside the same instruction or bundle. This flag can be set on both use
110 /// and def operands. On a sub-register def operand, it refers to the part
111 /// of the register that isn't written. On a full-register def operand, it
114 /// When this flag is set, the instruction bundle must contain at least one
115 /// other def of the register. If multiple instructions in the bundle define
116 /// the register, the meaning is target-defined.
117 bool IsInternalRead : 1;
119 /// IsEarlyClobber - True if this MO_Register 'def' operand is written to
120 /// by the MachineInstr before all input registers are read. This is used to
121 /// model the GCC inline asm '&' constraint modifier.
122 bool IsEarlyClobber : 1;
124 /// IsDebug - True if this MO_Register 'use' operand is in a debug pseudo,
125 /// not a real instruction. Such uses should be ignored during codegen.
128 /// SmallContents - This really should be part of the Contents union, but
129 /// lives out here so we can get a better packed struct.
130 /// MO_Register: Register number.
131 /// OffsetedInfo: Low bits of offset.
133 unsigned RegNo; // For MO_Register.
134 unsigned OffsetLo; // Matches Contents.OffsetedInfo.OffsetHi.
137 /// ParentMI - This is the instruction that this operand is embedded into.
138 /// This is valid for all operand types, when the operand is in an instr.
139 MachineInstr *ParentMI;
141 /// Contents union - This contains the payload for the various operand types.
143 MachineBasicBlock *MBB; // For MO_MachineBasicBlock.
144 const ConstantFP *CFP; // For MO_FPImmediate.
145 const ConstantInt *CI; // For MO_CImmediate. Integers > 64bit.
146 int64_t ImmVal; // For MO_Immediate.
147 const uint32_t *RegMask; // For MO_RegisterMask.
148 const MDNode *MD; // For MO_Metadata.
149 MCSymbol *Sym; // For MO_MCSymbol
151 struct { // For MO_Register.
152 // Register number is in SmallContents.RegNo.
153 MachineOperand *Prev; // Access list for register. See MRI.
154 MachineOperand *Next;
157 /// OffsetedInfo - This struct contains the offset and an object identifier.
158 /// this represent the object as with an optional offset from it.
161 int Index; // For MO_*Index - The index itself.
162 const char *SymbolName; // For MO_ExternalSymbol.
163 const GlobalValue *GV; // For MO_GlobalAddress.
164 const BlockAddress *BA; // For MO_BlockAddress.
166 // Low bits of offset are in SmallContents.OffsetLo.
167 int OffsetHi; // An offset from the object, high 32 bits.
171 explicit MachineOperand(MachineOperandType K) : OpKind(K), ParentMI(0) {
175 /// getType - Returns the MachineOperandType for this operand.
177 MachineOperandType getType() const { return (MachineOperandType)OpKind; }
179 unsigned char getTargetFlags() const { return TargetFlags; }
180 void setTargetFlags(unsigned char F) { TargetFlags = F; }
181 void addTargetFlag(unsigned char F) { TargetFlags |= F; }
184 /// getParent - Return the instruction that this operand belongs to.
186 MachineInstr *getParent() { return ParentMI; }
187 const MachineInstr *getParent() const { return ParentMI; }
189 /// clearParent - Reset the parent pointer.
191 /// The MachineOperand copy constructor also copies ParentMI, expecting the
192 /// original to be deleted. If a MachineOperand is ever stored outside a
193 /// MachineInstr, the parent pointer must be cleared.
195 /// Never call clearParent() on an operand in a MachineInstr.
197 void clearParent() { ParentMI = 0; }
199 void print(raw_ostream &os, const TargetMachine *TM = 0) const;
201 //===--------------------------------------------------------------------===//
202 // Accessors that tell you what kind of MachineOperand you're looking at.
203 //===--------------------------------------------------------------------===//
205 /// isReg - Tests if this is a MO_Register operand.
206 bool isReg() const { return OpKind == MO_Register; }
207 /// isImm - Tests if this is a MO_Immediate operand.
208 bool isImm() const { return OpKind == MO_Immediate; }
209 /// isCImm - Test if t his is a MO_CImmediate operand.
210 bool isCImm() const { return OpKind == MO_CImmediate; }
211 /// isFPImm - Tests if this is a MO_FPImmediate operand.
212 bool isFPImm() const { return OpKind == MO_FPImmediate; }
213 /// isMBB - Tests if this is a MO_MachineBasicBlock operand.
214 bool isMBB() const { return OpKind == MO_MachineBasicBlock; }
215 /// isFI - Tests if this is a MO_FrameIndex operand.
216 bool isFI() const { return OpKind == MO_FrameIndex; }
217 /// isCPI - Tests if this is a MO_ConstantPoolIndex operand.
218 bool isCPI() const { return OpKind == MO_ConstantPoolIndex; }
219 /// isTargetIndex - Tests if this is a MO_TargetIndex operand.
220 bool isTargetIndex() const { return OpKind == MO_TargetIndex; }
221 /// isJTI - Tests if this is a MO_JumpTableIndex operand.
222 bool isJTI() const { return OpKind == MO_JumpTableIndex; }
223 /// isGlobal - Tests if this is a MO_GlobalAddress operand.
224 bool isGlobal() const { return OpKind == MO_GlobalAddress; }
225 /// isSymbol - Tests if this is a MO_ExternalSymbol operand.
226 bool isSymbol() const { return OpKind == MO_ExternalSymbol; }
227 /// isBlockAddress - Tests if this is a MO_BlockAddress operand.
228 bool isBlockAddress() const { return OpKind == MO_BlockAddress; }
229 /// isRegMask - Tests if this is a MO_RegisterMask operand.
230 bool isRegMask() const { return OpKind == MO_RegisterMask; }
231 /// isMetadata - Tests if this is a MO_Metadata operand.
232 bool isMetadata() const { return OpKind == MO_Metadata; }
233 bool isMCSymbol() const { return OpKind == MO_MCSymbol; }
236 //===--------------------------------------------------------------------===//
237 // Accessors for Register Operands
238 //===--------------------------------------------------------------------===//
240 /// getReg - Returns the register number.
241 unsigned getReg() const {
242 assert(isReg() && "This is not a register operand!");
243 return SmallContents.RegNo;
246 unsigned getSubReg() const {
247 assert(isReg() && "Wrong MachineOperand accessor");
248 return (unsigned)SubReg;
252 assert(isReg() && "Wrong MachineOperand accessor");
257 assert(isReg() && "Wrong MachineOperand accessor");
261 bool isImplicit() const {
262 assert(isReg() && "Wrong MachineOperand accessor");
266 bool isDead() const {
267 assert(isReg() && "Wrong MachineOperand accessor");
271 bool isKill() const {
272 assert(isReg() && "Wrong MachineOperand accessor");
276 bool isUndef() const {
277 assert(isReg() && "Wrong MachineOperand accessor");
281 bool isInternalRead() const {
282 assert(isReg() && "Wrong MachineOperand accessor");
283 return IsInternalRead;
286 bool isEarlyClobber() const {
287 assert(isReg() && "Wrong MachineOperand accessor");
288 return IsEarlyClobber;
291 bool isDebug() const {
292 assert(isReg() && "Wrong MachineOperand accessor");
296 /// readsReg - Returns true if this operand reads the previous value of its
297 /// register. A use operand with the <undef> flag set doesn't read its
298 /// register. A sub-register def implicitly reads the other parts of the
299 /// register being redefined unless the <undef> flag is set.
301 /// This refers to reading the register value from before the current
302 /// instruction or bundle. Internal bundle reads are not included.
303 bool readsReg() const {
304 assert(isReg() && "Wrong MachineOperand accessor");
305 return !isUndef() && !isInternalRead() && (isUse() || getSubReg());
308 //===--------------------------------------------------------------------===//
309 // Mutators for Register Operands
310 //===--------------------------------------------------------------------===//
312 /// Change the register this operand corresponds to.
314 void setReg(unsigned Reg);
316 void setSubReg(unsigned subReg) {
317 assert(isReg() && "Wrong MachineOperand accessor");
318 SubReg = (unsigned char)subReg;
321 /// substVirtReg - Substitute the current register with the virtual
322 /// subregister Reg:SubReg. Take any existing SubReg index into account,
323 /// using TargetRegisterInfo to compose the subreg indices if necessary.
324 /// Reg must be a virtual register, SubIdx can be 0.
326 void substVirtReg(unsigned Reg, unsigned SubIdx, const TargetRegisterInfo&);
328 /// substPhysReg - Substitute the current register with the physical register
329 /// Reg, taking any existing SubReg into account. For instance,
330 /// substPhysReg(%EAX) will change %reg1024:sub_8bit to %AL.
332 void substPhysReg(unsigned Reg, const TargetRegisterInfo&);
334 void setIsUse(bool Val = true) {
335 assert(isReg() && "Wrong MachineOperand accessor");
336 assert((Val || !isDebug()) && "Marking a debug operation as def");
340 void setIsDef(bool Val = true) {
341 assert(isReg() && "Wrong MachineOperand accessor");
342 assert((!Val || !isDebug()) && "Marking a debug operation as def");
346 void setImplicit(bool Val = true) {
347 assert(isReg() && "Wrong MachineOperand accessor");
351 void setIsKill(bool Val = true) {
352 assert(isReg() && !IsDef && "Wrong MachineOperand accessor");
353 assert((!Val || !isDebug()) && "Marking a debug operation as kill");
357 void setIsDead(bool Val = true) {
358 assert(isReg() && IsDef && "Wrong MachineOperand accessor");
362 void setIsUndef(bool Val = true) {
363 assert(isReg() && "Wrong MachineOperand accessor");
367 void setIsInternalRead(bool Val = true) {
368 assert(isReg() && "Wrong MachineOperand accessor");
369 IsInternalRead = Val;
372 void setIsEarlyClobber(bool Val = true) {
373 assert(isReg() && IsDef && "Wrong MachineOperand accessor");
374 IsEarlyClobber = Val;
377 void setIsDebug(bool Val = true) {
378 assert(isReg() && IsDef && "Wrong MachineOperand accessor");
382 //===--------------------------------------------------------------------===//
383 // Accessors for various operand types.
384 //===--------------------------------------------------------------------===//
386 int64_t getImm() const {
387 assert(isImm() && "Wrong MachineOperand accessor");
388 return Contents.ImmVal;
391 const ConstantInt *getCImm() const {
392 assert(isCImm() && "Wrong MachineOperand accessor");
396 const ConstantFP *getFPImm() const {
397 assert(isFPImm() && "Wrong MachineOperand accessor");
401 MachineBasicBlock *getMBB() const {
402 assert(isMBB() && "Wrong MachineOperand accessor");
406 int getIndex() const {
407 assert((isFI() || isCPI() || isTargetIndex() || isJTI()) &&
408 "Wrong MachineOperand accessor");
409 return Contents.OffsetedInfo.Val.Index;
412 const GlobalValue *getGlobal() const {
413 assert(isGlobal() && "Wrong MachineOperand accessor");
414 return Contents.OffsetedInfo.Val.GV;
417 const BlockAddress *getBlockAddress() const {
418 assert(isBlockAddress() && "Wrong MachineOperand accessor");
419 return Contents.OffsetedInfo.Val.BA;
422 MCSymbol *getMCSymbol() const {
423 assert(isMCSymbol() && "Wrong MachineOperand accessor");
427 /// getOffset - Return the offset from the symbol in this operand. This always
428 /// returns 0 for ExternalSymbol operands.
429 int64_t getOffset() const {
430 assert((isGlobal() || isSymbol() || isCPI() || isTargetIndex() ||
431 isBlockAddress()) && "Wrong MachineOperand accessor");
432 return (int64_t(Contents.OffsetedInfo.OffsetHi) << 32) |
433 SmallContents.OffsetLo;
436 const char *getSymbolName() const {
437 assert(isSymbol() && "Wrong MachineOperand accessor");
438 return Contents.OffsetedInfo.Val.SymbolName;
441 /// clobbersPhysReg - Returns true if this RegMask clobbers PhysReg.
442 /// It is sometimes necessary to detach the register mask pointer from its
443 /// machine operand. This static method can be used for such detached bit
445 static bool clobbersPhysReg(const uint32_t *RegMask, unsigned PhysReg) {
446 // See TargetRegisterInfo.h.
447 assert(PhysReg < (1u << 30) && "Not a physical register");
448 return !(RegMask[PhysReg / 32] & (1u << PhysReg % 32));
451 /// clobbersPhysReg - Returns true if this RegMask operand clobbers PhysReg.
452 bool clobbersPhysReg(unsigned PhysReg) const {
453 return clobbersPhysReg(getRegMask(), PhysReg);
456 /// getRegMask - Returns a bit mask of registers preserved by this RegMask
458 const uint32_t *getRegMask() const {
459 assert(isRegMask() && "Wrong MachineOperand accessor");
460 return Contents.RegMask;
463 const MDNode *getMetadata() const {
464 assert(isMetadata() && "Wrong MachineOperand accessor");
468 //===--------------------------------------------------------------------===//
469 // Mutators for various operand types.
470 //===--------------------------------------------------------------------===//
472 void setImm(int64_t immVal) {
473 assert(isImm() && "Wrong MachineOperand mutator");
474 Contents.ImmVal = immVal;
477 void setOffset(int64_t Offset) {
478 assert((isGlobal() || isSymbol() || isCPI() || isTargetIndex() ||
479 isBlockAddress()) && "Wrong MachineOperand accessor");
480 SmallContents.OffsetLo = unsigned(Offset);
481 Contents.OffsetedInfo.OffsetHi = int(Offset >> 32);
484 void setIndex(int Idx) {
485 assert((isFI() || isCPI() || isTargetIndex() || isJTI()) &&
486 "Wrong MachineOperand accessor");
487 Contents.OffsetedInfo.Val.Index = Idx;
490 void setMBB(MachineBasicBlock *MBB) {
491 assert(isMBB() && "Wrong MachineOperand accessor");
495 //===--------------------------------------------------------------------===//
497 //===--------------------------------------------------------------------===//
499 /// isIdenticalTo - Return true if this operand is identical to the specified
500 /// operand. Note: This method ignores isKill and isDead properties.
501 bool isIdenticalTo(const MachineOperand &Other) const;
503 /// \brief MachineOperand hash_value overload.
505 /// Note that this includes the same information in the hash that
506 /// isIdenticalTo uses for comparison. It is thus suited for use in hash
507 /// tables which use that function for equality comparisons only.
508 friend hash_code hash_value(const MachineOperand &MO);
510 /// ChangeToImmediate - Replace this operand with a new immediate operand of
511 /// the specified value. If an operand is known to be an immediate already,
512 /// the setImm method should be used.
513 void ChangeToImmediate(int64_t ImmVal);
515 /// ChangeToRegister - Replace this operand with a new register operand of
516 /// the specified value. If an operand is known to be an register already,
517 /// the setReg method should be used.
518 void ChangeToRegister(unsigned Reg, bool isDef, bool isImp = false,
519 bool isKill = false, bool isDead = false,
520 bool isUndef = false, bool isDebug = false);
522 //===--------------------------------------------------------------------===//
523 // Construction methods.
524 //===--------------------------------------------------------------------===//
526 static MachineOperand CreateImm(int64_t Val) {
527 MachineOperand Op(MachineOperand::MO_Immediate);
532 static MachineOperand CreateCImm(const ConstantInt *CI) {
533 MachineOperand Op(MachineOperand::MO_CImmediate);
538 static MachineOperand CreateFPImm(const ConstantFP *CFP) {
539 MachineOperand Op(MachineOperand::MO_FPImmediate);
540 Op.Contents.CFP = CFP;
544 static MachineOperand CreateReg(unsigned Reg, bool isDef, bool isImp = false,
545 bool isKill = false, bool isDead = false,
546 bool isUndef = false,
547 bool isEarlyClobber = false,
549 bool isDebug = false,
550 bool isInternalRead = false) {
551 MachineOperand Op(MachineOperand::MO_Register);
556 Op.IsUndef = isUndef;
557 Op.IsInternalRead = isInternalRead;
558 Op.IsEarlyClobber = isEarlyClobber;
559 Op.IsDebug = isDebug;
560 Op.SmallContents.RegNo = Reg;
561 Op.Contents.Reg.Prev = 0;
562 Op.Contents.Reg.Next = 0;
566 static MachineOperand CreateMBB(MachineBasicBlock *MBB,
567 unsigned char TargetFlags = 0) {
568 MachineOperand Op(MachineOperand::MO_MachineBasicBlock);
570 Op.setTargetFlags(TargetFlags);
573 static MachineOperand CreateFI(int Idx) {
574 MachineOperand Op(MachineOperand::MO_FrameIndex);
578 static MachineOperand CreateCPI(unsigned Idx, int Offset,
579 unsigned char TargetFlags = 0) {
580 MachineOperand Op(MachineOperand::MO_ConstantPoolIndex);
582 Op.setOffset(Offset);
583 Op.setTargetFlags(TargetFlags);
586 static MachineOperand CreateTargetIndex(unsigned Idx, int64_t Offset,
587 unsigned char TargetFlags = 0) {
588 MachineOperand Op(MachineOperand::MO_TargetIndex);
590 Op.setOffset(Offset);
591 Op.setTargetFlags(TargetFlags);
594 static MachineOperand CreateJTI(unsigned Idx,
595 unsigned char TargetFlags = 0) {
596 MachineOperand Op(MachineOperand::MO_JumpTableIndex);
598 Op.setTargetFlags(TargetFlags);
601 static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset,
602 unsigned char TargetFlags = 0) {
603 MachineOperand Op(MachineOperand::MO_GlobalAddress);
604 Op.Contents.OffsetedInfo.Val.GV = GV;
605 Op.setOffset(Offset);
606 Op.setTargetFlags(TargetFlags);
609 static MachineOperand CreateES(const char *SymName,
610 unsigned char TargetFlags = 0) {
611 MachineOperand Op(MachineOperand::MO_ExternalSymbol);
612 Op.Contents.OffsetedInfo.Val.SymbolName = SymName;
613 Op.setOffset(0); // Offset is always 0.
614 Op.setTargetFlags(TargetFlags);
617 static MachineOperand CreateBA(const BlockAddress *BA,
618 unsigned char TargetFlags = 0) {
619 MachineOperand Op(MachineOperand::MO_BlockAddress);
620 Op.Contents.OffsetedInfo.Val.BA = BA;
621 Op.setOffset(0); // Offset is always 0.
622 Op.setTargetFlags(TargetFlags);
625 /// CreateRegMask - Creates a register mask operand referencing Mask. The
626 /// operand does not take ownership of the memory referenced by Mask, it must
627 /// remain valid for the lifetime of the operand.
629 /// A RegMask operand represents a set of non-clobbered physical registers on
630 /// an instruction that clobbers many registers, typically a call. The bit
631 /// mask has a bit set for each physreg that is preserved by this
632 /// instruction, as described in the documentation for
633 /// TargetRegisterInfo::getCallPreservedMask().
635 /// Any physreg with a 0 bit in the mask is clobbered by the instruction.
637 static MachineOperand CreateRegMask(const uint32_t *Mask) {
638 assert(Mask && "Missing register mask");
639 MachineOperand Op(MachineOperand::MO_RegisterMask);
640 Op.Contents.RegMask = Mask;
643 static MachineOperand CreateMetadata(const MDNode *Meta) {
644 MachineOperand Op(MachineOperand::MO_Metadata);
645 Op.Contents.MD = Meta;
649 static MachineOperand CreateMCSymbol(MCSymbol *Sym) {
650 MachineOperand Op(MachineOperand::MO_MCSymbol);
651 Op.Contents.Sym = Sym;
655 friend class MachineInstr;
656 friend class MachineRegisterInfo;
658 //===--------------------------------------------------------------------===//
659 // Methods for handling register use/def lists.
660 //===--------------------------------------------------------------------===//
662 /// isOnRegUseList - Return true if this operand is on a register use/def list
663 /// or false if not. This can only be called for register operands that are
664 /// part of a machine instruction.
665 bool isOnRegUseList() const {
666 assert(isReg() && "Can only add reg operand to use lists");
667 return Contents.Reg.Prev != 0;
671 inline raw_ostream &operator<<(raw_ostream &OS, const MachineOperand& MO) {
676 } // End llvm namespace