1 //===-- Passes.h - Target independent code generation passes ----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines interfaces to access the target independent code generation
11 // passes provided by the LLVM backend.
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_CODEGEN_PASSES_H
16 #define LLVM_CODEGEN_PASSES_H
18 #include "llvm/Pass.h"
19 #include "llvm/Target/TargetMachine.h"
25 class MachineFunctionPass;
28 class TargetRegisterClass;
34 /// Target-Independent Code Generator Pass Configuration Options.
36 /// This is an ImmutablePass solely for the purpose of exposing CodeGen options
37 /// to the internals of other CodeGen passes.
38 class TargetPassConfig : public ImmutablePass {
42 bool Initialized; // Flagged after all passes are configured.
44 // Target Pass Options
45 // Targets provide a default setting, user flags override.
49 /// Default setting for -enable-tail-merge on this target.
53 TargetPassConfig(TargetMachine *tm, PassManagerBase &pm);
57 virtual ~TargetPassConfig();
61 /// Get the right type of TargetMachine for this target.
62 template<typename TMC> TMC &getTM() const {
63 return *static_cast<TMC*>(TM);
66 const TargetLowering *getTargetLowering() const {
67 return TM->getTargetLowering();
70 void setInitialized() { Initialized = true; }
72 CodeGenOpt::Level getOptLevel() const { return TM->getOptLevel(); }
74 void setDisableVerify(bool Disable) { setOpt(DisableVerify, Disable); }
76 bool getEnableTailMerge() const { return EnableTailMerge; }
77 void setEnableTailMerge(bool Enable) { setOpt(EnableTailMerge, Enable); }
79 /// Add common target configurable passes that perform LLVM IR to IR
80 /// transforms following machine independent optimization.
81 virtual void addIRPasses();
83 /// Add common passes that perform LLVM IR to IR transforms in preparation for
84 /// instruction selection.
85 virtual void addISelPrepare();
87 /// addInstSelector - This method should install an instruction selector pass,
88 /// which converts from LLVM code to machine instructions.
89 virtual bool addInstSelector() {
93 /// Add the complete, standard set of LLVM CodeGen passes.
94 /// Fully developed targets will not generally override this.
95 virtual void addMachinePasses();
97 // Helper to verify the analysis is really immutable.
98 void setOpt(bool &Opt, bool Val);
100 /// Methods with trivial inline returns are convenient points in the common
101 /// codegen pass pipeline where targets may insert passes. Methods with
102 /// out-of-line standard implementations are major CodeGen stages called by
103 /// addMachinePasses. Some targets may override major stages when inserting
104 /// passes is insufficient, but maintaining overriden stages is more work.
107 /// addPreISelPasses - This method should add any "last minute" LLVM->LLVM
108 /// passes (which are run just before instruction selector).
109 virtual bool addPreISel() {
113 /// addPreRegAlloc - This method may be implemented by targets that want to
114 /// run passes immediately before register allocation. This should return
115 /// true if -print-machineinstrs should print after these passes.
116 virtual bool addPreRegAlloc() {
120 /// addPostRegAlloc - This method may be implemented by targets that want
121 /// to run passes after register allocation but before prolog-epilog
122 /// insertion. This should return true if -print-machineinstrs should print
123 /// after these passes.
124 virtual bool addPostRegAlloc() {
128 /// addPreSched2 - This method may be implemented by targets that want to
129 /// run passes after prolog-epilog insertion and before the second instruction
130 /// scheduling pass. This should return true if -print-machineinstrs should
131 /// print after these passes.
132 virtual bool addPreSched2() {
136 /// addPreEmitPass - This pass may be implemented by targets that want to run
137 /// passes immediately before machine code is emitted. This should return
138 /// true if -print-machineinstrs should print out the code after the passes.
139 virtual bool addPreEmitPass() {
143 /// Utilities for targets to add passes to the pass manager.
146 /// Add a target-independent CodeGen pass at this point in the pipeline.
147 void addPass(char &ID);
149 /// printNoVerify - Add a pass to dump the machine function, if debugging is
152 void printNoVerify(const char *Banner) const;
154 /// printAndVerify - Add a pass to dump then verify the machine function, if
155 /// those steps are enabled.
157 void printAndVerify(const char *Banner) const;
161 /// List of target independent CodeGen pass IDs.
163 /// createUnreachableBlockEliminationPass - The LLVM code generator does not
164 /// work well with unreachable basic blocks (what live ranges make sense for a
165 /// block that cannot be reached?). As such, a code generator should either
166 /// not instruction select unreachable blocks, or run this pass as its
167 /// last LLVM modifying pass to clean up blocks that are not reachable from
169 FunctionPass *createUnreachableBlockEliminationPass();
171 /// MachineFunctionPrinter pass - This pass prints out the machine function to
172 /// the given stream as a debugging tool.
173 MachineFunctionPass *
174 createMachineFunctionPrinterPass(raw_ostream &OS,
175 const std::string &Banner ="");
177 /// MachineLoopInfo pass - This pass is a loop analysis pass.
179 extern char &MachineLoopInfoID;
181 /// MachineLoopRanges pass - This pass is an on-demand loop coverage
184 extern char &MachineLoopRangesID;
186 /// MachineDominators pass - This pass is a machine dominators analysis pass.
188 extern char &MachineDominatorsID;
190 /// EdgeBundles analysis - Bundle machine CFG edges.
192 extern char &EdgeBundlesID;
194 /// PHIElimination pass - This pass eliminates machine instruction PHI nodes
195 /// by inserting copy instructions. This destroys SSA information, but is the
196 /// desired input for some register allocators. This pass is "required" by
197 /// these register allocator like this: AU.addRequiredID(PHIEliminationID);
199 extern char &PHIEliminationID;
201 /// StrongPHIElimination pass - This pass eliminates machine instruction PHI
202 /// nodes by inserting copy instructions. This destroys SSA information, but
203 /// is the desired input for some register allocators. This pass is
204 /// "required" by these register allocator like this:
205 /// AU.addRequiredID(PHIEliminationID);
206 /// This pass is still in development
207 extern char &StrongPHIEliminationID;
209 /// LiveStacks pass. An analysis keeping track of the liveness of stack slots.
210 extern char &LiveStacksID;
212 /// TwoAddressInstruction pass - This pass reduces two-address instructions to
213 /// use two operands. This destroys SSA information but it is desired by
214 /// register allocators.
215 extern char &TwoAddressInstructionPassID;
217 /// RegisteCoalescer pass - This pass merges live ranges to eliminate copies.
218 extern char &RegisterCoalescerPassID;
220 /// MachineScheduler pass - This pass schedules machine instructions.
221 extern char &MachineSchedulerID;
223 /// SpillPlacement analysis. Suggest optimal placement of spill code between
226 extern char &SpillPlacementID;
228 /// UnreachableMachineBlockElimination pass - This pass removes unreachable
229 /// machine basic blocks.
230 extern char &UnreachableMachineBlockElimID;
232 /// DeadMachineInstructionElim pass - This pass removes dead machine
235 FunctionPass *createDeadMachineInstructionElimPass();
237 /// Creates a register allocator as the user specified on the command line, or
238 /// picks one that matches OptLevel.
240 FunctionPass *createRegisterAllocator(CodeGenOpt::Level OptLevel);
242 /// FastRegisterAllocation Pass - This pass register allocates as fast as
243 /// possible. It is best suited for debug code where live ranges are short.
245 FunctionPass *createFastRegisterAllocator();
247 /// BasicRegisterAllocation Pass - This pass implements a degenerate global
248 /// register allocator using the basic regalloc framework.
250 FunctionPass *createBasicRegisterAllocator();
252 /// Greedy register allocation pass - This pass implements a global register
253 /// allocator for optimized builds.
255 FunctionPass *createGreedyRegisterAllocator();
257 /// PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean
258 /// Quadratic Prograaming (PBQP) based register allocator.
260 FunctionPass *createDefaultPBQPRegisterAllocator();
262 /// PrologEpilogCodeInserter Pass - This pass inserts prolog and epilog code,
263 /// and eliminates abstract frame references.
265 FunctionPass *createPrologEpilogCodeInserter();
267 /// ExpandPostRAPseudos Pass - This pass expands pseudo instructions after
268 /// register allocation.
270 FunctionPass *createExpandPostRAPseudosPass();
272 /// createPostRAScheduler - This pass performs post register allocation
274 FunctionPass *createPostRAScheduler();
276 /// BranchFolding Pass - This pass performs machine code CFG based
277 /// optimizations to delete branches to branches, eliminate branches to
278 /// successor blocks (creating fall throughs), and eliminating branches over
280 extern char &BranchFolderPassID;
282 /// TailDuplicate Pass - Duplicate blocks with unconditional branches
283 /// into tails of their predecessors.
284 FunctionPass *createTailDuplicatePass();
286 /// IfConverter Pass - This pass performs machine code if conversion.
287 FunctionPass *createIfConverterPass();
289 /// MachineBlockPlacement Pass - This pass places basic blocks based on branch
291 FunctionPass *createMachineBlockPlacementPass();
293 /// MachineBlockPlacementStats Pass - This pass collects statistics about the
294 /// basic block placement using branch probabilities and block frequency
296 FunctionPass *createMachineBlockPlacementStatsPass();
298 /// Code Placement Pass - This pass optimize code placement and aligns loop
299 /// headers to target specific alignment boundary.
300 FunctionPass *createCodePlacementOptPass();
302 /// IntrinsicLowering Pass - Performs target-independent LLVM IR
303 /// transformations for highly portable strategies.
304 FunctionPass *createGCLoweringPass();
306 /// MachineCodeAnalysis Pass - Target-independent pass to mark safe points in
307 /// machine code. Must be added very late during code generation, just prior
308 /// to output, and importantly after all CFG transformations (such as branch
310 FunctionPass *createGCMachineCodeAnalysisPass();
312 /// Deleter Pass - Releases GC metadata.
314 FunctionPass *createGCInfoDeleter();
316 /// Creates a pass to print GC metadata.
318 FunctionPass *createGCInfoPrinter(raw_ostream &OS);
320 /// createMachineCSEPass - This pass performs global CSE on machine
322 FunctionPass *createMachineCSEPass();
324 /// createMachineLICMPass - This pass performs LICM on machine instructions.
326 FunctionPass *createMachineLICMPass(bool PreRegAlloc = true);
328 /// createMachineSinkingPass - This pass performs sinking on machine
330 FunctionPass *createMachineSinkingPass();
332 /// createMachineCopyPropagationPass - This pass performs copy propagation on
333 /// machine instructions.
334 FunctionPass *createMachineCopyPropagationPass();
336 /// createPeepholeOptimizerPass - This pass performs peephole optimizations -
337 /// like extension and comparison eliminations.
338 FunctionPass *createPeepholeOptimizerPass();
340 /// createOptimizePHIsPass - This pass optimizes machine instruction PHIs
341 /// to take advantage of opportunities created during DAG legalization.
342 FunctionPass *createOptimizePHIsPass();
344 /// createStackSlotColoringPass - This pass performs stack slot coloring.
345 FunctionPass *createStackSlotColoringPass(bool);
347 /// createStackProtectorPass - This pass adds stack protectors to functions.
348 FunctionPass *createStackProtectorPass(const TargetLowering *tli);
350 /// createMachineVerifierPass - This pass verifies cenerated machine code
351 /// instructions for correctness.
352 FunctionPass *createMachineVerifierPass(const char *Banner = 0);
354 /// createDwarfEHPass - This pass mulches exception handling code into a form
355 /// adapted to code generation. Required if using dwarf exception handling.
356 FunctionPass *createDwarfEHPass(const TargetMachine *tm);
358 /// createSjLjEHPass - This pass adapts exception handling code to use
359 /// the GCC-style builtin setjmp/longjmp (sjlj) to handling EH control flow.
360 FunctionPass *createSjLjEHPass(const TargetLowering *tli);
362 /// createLocalStackSlotAllocationPass - This pass assigns local frame
363 /// indices to stack slots relative to one another and allocates
364 /// base registers to access them when it is estimated by the target to
365 /// be out of range of normal frame pointer or stack pointer index
367 FunctionPass *createLocalStackSlotAllocationPass();
369 /// createExpandISelPseudosPass - This pass expands pseudo-instructions.
371 FunctionPass *createExpandISelPseudosPass();
373 /// createExecutionDependencyFixPass - This pass fixes execution time
374 /// problems with dependent instructions, such as switching execution
375 /// domains to match.
377 /// The pass will examine instructions using and defining registers in RC.
379 FunctionPass *createExecutionDependencyFixPass(const TargetRegisterClass *RC);
381 /// createUnpackMachineBundles - This pass unpack machine instruction bundles.
383 FunctionPass *createUnpackMachineBundlesPass();
385 /// createFinalizeMachineBundles - This pass finalize machine instruction
386 /// bundles (created earlier, e.g. during pre-RA scheduling).
388 FunctionPass *createFinalizeMachineBundlesPass();
390 } // End llvm namespace