1 //===-- Passes.h - Target independent code generation passes ----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines interfaces to access the target independent code generation
11 // passes provided by the LLVM backend.
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_CODEGEN_PASSES_H
16 #define LLVM_CODEGEN_PASSES_H
18 #include "llvm/Pass.h"
19 #include "llvm/Target/TargetMachine.h"
25 class MachineFunctionPass;
28 class TargetRegisterClass;
34 /// Target-Independent Code Generator Pass Configuration Options.
36 /// This is an ImmutablePass solely for the purpose of exposing CodeGen options
37 /// to the internals of other CodeGen passes.
38 class TargetPassConfig : public ImmutablePass {
43 // Target Pass Options
48 TargetPassConfig(TargetMachine *tm, PassManagerBase &pm);
52 virtual ~TargetPassConfig();
56 /// Get the right type of TargetMachine for this target.
57 template<typename TMC> TMC &getTM() const {
58 return *static_cast<TMC*>(TM);
61 const TargetLowering *getTargetLowering() const {
62 return TM->getTargetLowering();
65 CodeGenOpt::Level getOptLevel() const { return TM->getOptLevel(); }
67 void setDisableVerify(bool disable) { DisableVerify = disable; }
69 /// Add common target configurable passes that perform LLVM IR to IR
70 /// transforms following machine independent optimization.
71 virtual void addIRPasses();
73 /// Add common passes that perform LLVM IR to IR transforms in preparation for
74 /// instruction selection.
75 virtual void addISelPrepare();
77 /// addInstSelector - This method should install an instruction selector pass,
78 /// which converts from LLVM code to machine instructions.
79 virtual bool addInstSelector() {
83 /// Add the complete, standard set of LLVM CodeGen passes.
84 /// Fully developed targets will not generally override this.
85 virtual void addMachinePasses();
87 /// Methods with trivial inline returns are convenient points in the common
88 /// codegen pass pipeline where targets may insert passes. Methods with
89 /// out-of-line standard implementations are major CodeGen stages called by
90 /// addMachinePasses. Some targets may override major stages when inserting
91 /// passes is insufficient, but maintaining overriden stages is more work.
94 /// addPreISelPasses - This method should add any "last minute" LLVM->LLVM
95 /// passes (which are run just before instruction selector).
96 virtual bool addPreISel() {
100 /// addPreRegAlloc - This method may be implemented by targets that want to
101 /// run passes immediately before register allocation. This should return
102 /// true if -print-machineinstrs should print after these passes.
103 virtual bool addPreRegAlloc() {
107 /// addPostRegAlloc - This method may be implemented by targets that want
108 /// to run passes after register allocation but before prolog-epilog
109 /// insertion. This should return true if -print-machineinstrs should print
110 /// after these passes.
111 virtual bool addPostRegAlloc() {
115 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge
116 /// on this target. User flag overrides.
117 virtual bool getEnableTailMergeDefault() const { return true; }
119 /// addPreSched2 - This method may be implemented by targets that want to
120 /// run passes after prolog-epilog insertion and before the second instruction
121 /// scheduling pass. This should return true if -print-machineinstrs should
122 /// print after these passes.
123 virtual bool addPreSched2() {
127 /// addPreEmitPass - This pass may be implemented by targets that want to run
128 /// passes immediately before machine code is emitted. This should return
129 /// true if -print-machineinstrs should print out the code after the passes.
130 virtual bool addPreEmitPass() {
134 /// Utilities for targets to add passes to the pass manager.
137 /// Add a target-independent CodeGen pass at this point in the pipeline.
138 void addCommonPass(char &ID);
140 /// printNoVerify - Add a pass to dump the machine function, if debugging is
143 void printNoVerify(const char *Banner) const;
145 /// printAndVerify - Add a pass to dump then verify the machine function, if
146 /// those steps are enabled.
148 void printAndVerify(const char *Banner) const;
152 /// List of target independent CodeGen pass IDs.
154 /// createUnreachableBlockEliminationPass - The LLVM code generator does not
155 /// work well with unreachable basic blocks (what live ranges make sense for a
156 /// block that cannot be reached?). As such, a code generator should either
157 /// not instruction select unreachable blocks, or run this pass as its
158 /// last LLVM modifying pass to clean up blocks that are not reachable from
160 FunctionPass *createUnreachableBlockEliminationPass();
162 /// MachineFunctionPrinter pass - This pass prints out the machine function to
163 /// the given stream as a debugging tool.
164 MachineFunctionPass *
165 createMachineFunctionPrinterPass(raw_ostream &OS,
166 const std::string &Banner ="");
168 /// MachineLoopInfo pass - This pass is a loop analysis pass.
170 extern char &MachineLoopInfoID;
172 /// MachineLoopRanges pass - This pass is an on-demand loop coverage
175 extern char &MachineLoopRangesID;
177 /// MachineDominators pass - This pass is a machine dominators analysis pass.
179 extern char &MachineDominatorsID;
181 /// EdgeBundles analysis - Bundle machine CFG edges.
183 extern char &EdgeBundlesID;
185 /// PHIElimination pass - This pass eliminates machine instruction PHI nodes
186 /// by inserting copy instructions. This destroys SSA information, but is the
187 /// desired input for some register allocators. This pass is "required" by
188 /// these register allocator like this: AU.addRequiredID(PHIEliminationID);
190 extern char &PHIEliminationID;
192 /// StrongPHIElimination pass - This pass eliminates machine instruction PHI
193 /// nodes by inserting copy instructions. This destroys SSA information, but
194 /// is the desired input for some register allocators. This pass is
195 /// "required" by these register allocator like this:
196 /// AU.addRequiredID(PHIEliminationID);
197 /// This pass is still in development
198 extern char &StrongPHIEliminationID;
200 /// LiveStacks pass. An analysis keeping track of the liveness of stack slots.
201 extern char &LiveStacksID;
203 /// TwoAddressInstruction pass - This pass reduces two-address instructions to
204 /// use two operands. This destroys SSA information but it is desired by
205 /// register allocators.
206 extern char &TwoAddressInstructionPassID;
208 /// RegisteCoalescer pass - This pass merges live ranges to eliminate copies.
209 extern char &RegisterCoalescerPassID;
211 /// MachineScheduler pass - This pass schedules machine instructions.
212 extern char &MachineSchedulerID;
214 /// SpillPlacement analysis. Suggest optimal placement of spill code between
217 extern char &SpillPlacementID;
219 /// UnreachableMachineBlockElimination pass - This pass removes unreachable
220 /// machine basic blocks.
221 extern char &UnreachableMachineBlockElimID;
223 /// DeadMachineInstructionElim pass - This pass removes dead machine
226 FunctionPass *createDeadMachineInstructionElimPass();
228 /// Creates a register allocator as the user specified on the command line, or
229 /// picks one that matches OptLevel.
231 FunctionPass *createRegisterAllocator(CodeGenOpt::Level OptLevel);
233 /// FastRegisterAllocation Pass - This pass register allocates as fast as
234 /// possible. It is best suited for debug code where live ranges are short.
236 FunctionPass *createFastRegisterAllocator();
238 /// BasicRegisterAllocation Pass - This pass implements a degenerate global
239 /// register allocator using the basic regalloc framework.
241 FunctionPass *createBasicRegisterAllocator();
243 /// Greedy register allocation pass - This pass implements a global register
244 /// allocator for optimized builds.
246 FunctionPass *createGreedyRegisterAllocator();
248 /// PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean
249 /// Quadratic Prograaming (PBQP) based register allocator.
251 FunctionPass *createDefaultPBQPRegisterAllocator();
253 /// PrologEpilogCodeInserter Pass - This pass inserts prolog and epilog code,
254 /// and eliminates abstract frame references.
256 FunctionPass *createPrologEpilogCodeInserter();
258 /// ExpandPostRAPseudos Pass - This pass expands pseudo instructions after
259 /// register allocation.
261 FunctionPass *createExpandPostRAPseudosPass();
263 /// createPostRAScheduler - This pass performs post register allocation
265 FunctionPass *createPostRAScheduler(CodeGenOpt::Level OptLevel);
267 /// BranchFolding Pass - This pass performs machine code CFG based
268 /// optimizations to delete branches to branches, eliminate branches to
269 /// successor blocks (creating fall throughs), and eliminating branches over
271 FunctionPass *createBranchFoldingPass(bool DefaultEnableTailMerge);
273 /// TailDuplicate Pass - Duplicate blocks with unconditional branches
274 /// into tails of their predecessors.
275 FunctionPass *createTailDuplicatePass();
277 /// IfConverter Pass - This pass performs machine code if conversion.
278 FunctionPass *createIfConverterPass();
280 /// MachineBlockPlacement Pass - This pass places basic blocks based on branch
282 FunctionPass *createMachineBlockPlacementPass();
284 /// MachineBlockPlacementStats Pass - This pass collects statistics about the
285 /// basic block placement using branch probabilities and block frequency
287 FunctionPass *createMachineBlockPlacementStatsPass();
289 /// Code Placement Pass - This pass optimize code placement and aligns loop
290 /// headers to target specific alignment boundary.
291 FunctionPass *createCodePlacementOptPass();
293 /// IntrinsicLowering Pass - Performs target-independent LLVM IR
294 /// transformations for highly portable strategies.
295 FunctionPass *createGCLoweringPass();
297 /// MachineCodeAnalysis Pass - Target-independent pass to mark safe points in
298 /// machine code. Must be added very late during code generation, just prior
299 /// to output, and importantly after all CFG transformations (such as branch
301 FunctionPass *createGCMachineCodeAnalysisPass();
303 /// Deleter Pass - Releases GC metadata.
305 FunctionPass *createGCInfoDeleter();
307 /// Creates a pass to print GC metadata.
309 FunctionPass *createGCInfoPrinter(raw_ostream &OS);
311 /// createMachineCSEPass - This pass performs global CSE on machine
313 FunctionPass *createMachineCSEPass();
315 /// createMachineLICMPass - This pass performs LICM on machine instructions.
317 FunctionPass *createMachineLICMPass(bool PreRegAlloc = true);
319 /// createMachineSinkingPass - This pass performs sinking on machine
321 FunctionPass *createMachineSinkingPass();
323 /// createMachineCopyPropagationPass - This pass performs copy propagation on
324 /// machine instructions.
325 FunctionPass *createMachineCopyPropagationPass();
327 /// createPeepholeOptimizerPass - This pass performs peephole optimizations -
328 /// like extension and comparison eliminations.
329 FunctionPass *createPeepholeOptimizerPass();
331 /// createOptimizePHIsPass - This pass optimizes machine instruction PHIs
332 /// to take advantage of opportunities created during DAG legalization.
333 FunctionPass *createOptimizePHIsPass();
335 /// createStackSlotColoringPass - This pass performs stack slot coloring.
336 FunctionPass *createStackSlotColoringPass(bool);
338 /// createStackProtectorPass - This pass adds stack protectors to functions.
339 FunctionPass *createStackProtectorPass(const TargetLowering *tli);
341 /// createMachineVerifierPass - This pass verifies cenerated machine code
342 /// instructions for correctness.
343 FunctionPass *createMachineVerifierPass(const char *Banner = 0);
345 /// createDwarfEHPass - This pass mulches exception handling code into a form
346 /// adapted to code generation. Required if using dwarf exception handling.
347 FunctionPass *createDwarfEHPass(const TargetMachine *tm);
349 /// createSjLjEHPass - This pass adapts exception handling code to use
350 /// the GCC-style builtin setjmp/longjmp (sjlj) to handling EH control flow.
351 FunctionPass *createSjLjEHPass(const TargetLowering *tli);
353 /// createLocalStackSlotAllocationPass - This pass assigns local frame
354 /// indices to stack slots relative to one another and allocates
355 /// base registers to access them when it is estimated by the target to
356 /// be out of range of normal frame pointer or stack pointer index
358 FunctionPass *createLocalStackSlotAllocationPass();
360 /// createExpandISelPseudosPass - This pass expands pseudo-instructions.
362 FunctionPass *createExpandISelPseudosPass();
364 /// createExecutionDependencyFixPass - This pass fixes execution time
365 /// problems with dependent instructions, such as switching execution
366 /// domains to match.
368 /// The pass will examine instructions using and defining registers in RC.
370 FunctionPass *createExecutionDependencyFixPass(const TargetRegisterClass *RC);
372 /// createUnpackMachineBundles - This pass unpack machine instruction bundles.
374 FunctionPass *createUnpackMachineBundlesPass();
376 /// createFinalizeMachineBundles - This pass finalize machine instruction
377 /// bundles (created earlier, e.g. during pre-RA scheduling).
379 FunctionPass *createFinalizeMachineBundlesPass();
381 } // End llvm namespace