1 //===-- RegAllocPBQP.h ------------------------------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the PBQPBuilder interface, for classes which build PBQP
11 // instances to represent register allocation problems, and the RegAllocPBQP
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_CODEGEN_REGALLOCPBQP_H
17 #define LLVM_CODEGEN_REGALLOCPBQP_H
19 #include "llvm/ADT/DenseMap.h"
20 #include "llvm/ADT/SmallVector.h"
21 #include "llvm/CodeGen/MachineFunctionPass.h"
22 #include "llvm/CodeGen/PBQP/RegAllocSolver.h"
29 class MachineBlockFrequencyInfo;
30 class MachineFunction;
31 class TargetRegisterInfo;
33 typedef PBQP::RegAlloc::Graph PBQPRAGraph;
35 /// This class wraps up a PBQP instance representing a register allocation
36 /// problem, plus the structures necessary to map back from the PBQP solution
37 /// to a register allocation solution. (i.e. The PBQP-node <--> vreg map,
38 /// and the PBQP option <--> storage location map).
42 typedef SmallVector<unsigned, 16> AllowedSet;
44 PBQPRAGraph& getGraph() { return graph; }
46 const PBQPRAGraph& getGraph() const { return graph; }
48 /// Record the mapping between the given virtual register and PBQP node,
49 /// and the set of allowed pregs for the vreg.
51 /// If you are extending
52 /// PBQPBuilder you are unlikely to need this: Nodes and options for all
53 /// vregs will already have been set up for you by the base class.
54 template <typename AllowedRegsItr>
55 void recordVReg(unsigned vreg, PBQPRAGraph::NodeId nodeId,
56 AllowedRegsItr arBegin, AllowedRegsItr arEnd) {
57 assert(node2VReg.find(nodeId) == node2VReg.end() && "Re-mapping node.");
58 assert(vreg2Node.find(vreg) == vreg2Node.end() && "Re-mapping vreg.");
59 assert(allowedSets[vreg].empty() && "vreg already has pregs.");
61 node2VReg[nodeId] = vreg;
62 vreg2Node[vreg] = nodeId;
63 std::copy(arBegin, arEnd, std::back_inserter(allowedSets[vreg]));
66 /// Get the virtual register corresponding to the given PBQP node.
67 unsigned getVRegForNode(PBQPRAGraph::NodeId nodeId) const;
69 /// Get the PBQP node corresponding to the given virtual register.
70 PBQPRAGraph::NodeId getNodeForVReg(unsigned vreg) const;
72 /// Returns true if the given PBQP option represents a physical register,
74 bool isPRegOption(unsigned vreg, unsigned option) const {
75 // At present we only have spills or pregs, so anything that's not a
76 // spill is a preg. (This might be extended one day to support remat).
77 return !isSpillOption(vreg, option);
80 /// Returns true if the given PBQP option represents spilling, false
82 bool isSpillOption(unsigned vreg, unsigned option) const {
83 // We hardcode option zero as the spill option.
87 /// Returns the allowed set for the given virtual register.
88 const AllowedSet& getAllowedSet(unsigned vreg) const;
90 /// Get PReg for option.
91 unsigned getPRegForOption(unsigned vreg, unsigned option) const;
95 typedef std::map<PBQPRAGraph::NodeId, unsigned> Node2VReg;
96 typedef DenseMap<unsigned, PBQPRAGraph::NodeId> VReg2Node;
97 typedef DenseMap<unsigned, AllowedSet> AllowedSetMap;
103 AllowedSetMap allowedSets;
107 /// Builds PBQP instances to represent register allocation problems. Includes
108 /// spill, interference and coalescing costs by default. You can extend this
109 /// class to support additional constraints for your architecture.
112 PBQPBuilder(const PBQPBuilder&) LLVM_DELETED_FUNCTION;
113 void operator=(const PBQPBuilder&) LLVM_DELETED_FUNCTION;
116 typedef std::set<unsigned> RegSet;
118 /// Default constructor.
121 /// Clean up a PBQPBuilder.
122 virtual ~PBQPBuilder() {}
124 /// Build a PBQP instance to represent the register allocation problem for
125 /// the given MachineFunction.
126 virtual std::unique_ptr<PBQPRAProblem>
127 build(MachineFunction *mf, const LiveIntervals *lis,
128 const MachineBlockFrequencyInfo *mbfi, const RegSet &vregs);
132 void addSpillCosts(PBQP::Vector &costVec, PBQP::PBQPNum spillCost);
134 void addInterferenceCosts(PBQP::Matrix &costMat,
135 const PBQPRAProblem::AllowedSet &vr1Allowed,
136 const PBQPRAProblem::AllowedSet &vr2Allowed,
137 const TargetRegisterInfo *tri);
140 /// Extended builder which adds coalescing constraints to a problem.
141 class PBQPBuilderWithCoalescing : public PBQPBuilder {
144 /// Build a PBQP instance to represent the register allocation problem for
145 /// the given MachineFunction.
146 std::unique_ptr<PBQPRAProblem> build(MachineFunction *mf,
147 const LiveIntervals *lis,
148 const MachineBlockFrequencyInfo *mbfi,
149 const RegSet &vregs) override;
153 void addPhysRegCoalesce(PBQP::Vector &costVec, unsigned pregOption,
154 PBQP::PBQPNum benefit);
156 void addVirtRegCoalesce(PBQP::Matrix &costMat,
157 const PBQPRAProblem::AllowedSet &vr1Allowed,
158 const PBQPRAProblem::AllowedSet &vr2Allowed,
159 PBQP::PBQPNum benefit);
163 createPBQPRegisterAllocator(std::unique_ptr<PBQPBuilder> builder,
164 char *customPassID = nullptr);
167 #endif /* LLVM_CODEGEN_REGALLOCPBQP_H */