1 //===-- RegisterScavenging.h - Machine register scavenging ------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the machine register scavenger class. It can provide
11 // information such as unused register at any point in a machine basic block.
12 // It also provides a mechanism to make registers availbale by evicting them
15 //===----------------------------------------------------------------------===//
17 #ifndef LLVM_CODEGEN_REGISTER_SCAVENGING_H
18 #define LLVM_CODEGEN_REGISTER_SCAVENGING_H
20 #include "llvm/CodeGen/MachineBasicBlock.h"
21 #include "llvm/ADT/BitVector.h"
25 class MachineRegisterInfo;
26 class TargetRegisterInfo;
27 class TargetInstrInfo;
28 class TargetRegisterClass;
31 const TargetRegisterInfo *TRI;
32 const TargetInstrInfo *TII;
33 MachineRegisterInfo* MRI;
34 MachineBasicBlock *MBB;
35 MachineBasicBlock::iterator MBBI;
38 /// Tracking - True if RegScavenger is currently tracking the liveness of
42 /// ScavengingFrameIndex - Special spill slot used for scavenging a register
43 /// post register allocation.
44 int ScavengingFrameIndex;
46 /// ScavengedReg - If none zero, the specific register is currently being
47 /// scavenged. That is, it is spilled to the special scavenging stack slot.
48 unsigned ScavengedReg;
50 /// ScavengedRC - Register class of the scavenged register.
52 const TargetRegisterClass *ScavengedRC;
54 /// ScavengeRestore - Instruction that restores the scavenged register from
56 const MachineInstr *ScavengeRestore;
58 /// CalleeSavedrRegs - A bitvector of callee saved registers for the target.
60 BitVector CalleeSavedRegs;
62 /// ReservedRegs - A bitvector of reserved registers.
64 BitVector ReservedRegs;
66 /// RegsAvailable - The current state of all the physical registers immediately
67 /// before MBBI. One bit per physical register. If bit is set that means it's
68 /// available, unset means the register is currently being used.
69 BitVector RegsAvailable;
73 : MBB(NULL), NumPhysRegs(0), Tracking(false),
74 ScavengingFrameIndex(-1), ScavengedReg(0), ScavengedRC(NULL) {}
76 /// enterBasicBlock - Start tracking liveness from the begin of the specific
78 void enterBasicBlock(MachineBasicBlock *mbb);
80 /// initRegState - allow resetting register state info for multiple
81 /// passes over/within the same function.
84 /// forward - Move the internal MBB iterator and update register states.
87 /// forward - Move the internal MBB iterator and update register states until
88 /// it has processed the specific iterator.
89 void forward(MachineBasicBlock::iterator I) {
90 if (!Tracking && MBB->begin() != I) forward();
91 while (MBBI != I) forward();
94 /// skipTo - Move the internal MBB iterator but do not update register states.
96 void skipTo(MachineBasicBlock::iterator I) { MBBI = I; }
98 /// getRegsUsed - return all registers currently in use in used.
99 void getRegsUsed(BitVector &used, bool includeReserved);
101 /// getRegsAvailable - Return all available registers in the register class
103 void getRegsAvailable(const TargetRegisterClass *RC, BitVector &Mask);
105 /// FindUnusedReg - Find a unused register of the specified register class.
106 /// Return 0 if none is found.
107 unsigned FindUnusedReg(const TargetRegisterClass *RegClass) const;
109 /// setScavengingFrameIndex / getScavengingFrameIndex - accessor and setter of
110 /// ScavengingFrameIndex.
111 void setScavengingFrameIndex(int FI) { ScavengingFrameIndex = FI; }
112 int getScavengingFrameIndex() const { return ScavengingFrameIndex; }
114 /// scavengeRegister - Make a register of the specific register class
115 /// available and do the appropriate bookkeeping. SPAdj is the stack
116 /// adjustment due to call frame, it's passed along to eliminateFrameIndex().
117 /// Returns the scavenged register.
118 unsigned scavengeRegister(const TargetRegisterClass *RegClass,
119 MachineBasicBlock::iterator I, int SPAdj);
120 unsigned scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj) {
121 return scavengeRegister(RegClass, MBBI, SPAdj);
124 /// setUsed - Tell the scavenger a register is used.
126 void setUsed(unsigned Reg);
128 /// isReserved - Returns true if a register is reserved. It is never "unused".
129 bool isReserved(unsigned Reg) const { return ReservedRegs.test(Reg); }
131 /// isUsed / isUnused - Test if a register is currently being used.
133 bool isUsed(unsigned Reg) const { return !RegsAvailable.test(Reg); }
134 bool isUnused(unsigned Reg) const { return RegsAvailable.test(Reg); }
136 /// isAliasUsed - Is Reg or an alias currently in use?
137 bool isAliasUsed(unsigned Reg) const;
139 /// setUsed / setUnused - Mark the state of one or a number of registers.
141 void setUsed(BitVector &Regs) {
142 RegsAvailable &= ~Regs;
144 void setUnused(BitVector &Regs) {
145 RegsAvailable |= Regs;
148 /// Add Reg and all its sub-registers to BV.
149 void addRegWithSubRegs(BitVector &BV, unsigned Reg);
151 /// Add Reg and its aliases to BV.
152 void addRegWithAliases(BitVector &BV, unsigned Reg);
154 /// findSurvivorReg - Return the candidate register that is unused for the
155 /// longest after StartMI. UseMI is set to the instruction where the search
158 /// No more than InstrLimit instructions are inspected.
159 unsigned findSurvivorReg(MachineBasicBlock::iterator StartMI,
160 BitVector &Candidates,
162 MachineBasicBlock::iterator &UseMI);
166 } // End llvm namespace