1 //===-- RegisterScavenging.h - Machine register scavenging ------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the machine register scavenger class. It can provide
11 // information such as unused register at any point in a machine basic block.
12 // It also provides a mechanism to make registers availbale by evicting them
15 //===----------------------------------------------------------------------===//
17 #ifndef LLVM_CODEGEN_REGISTER_SCAVENGING_H
18 #define LLVM_CODEGEN_REGISTER_SCAVENGING_H
20 #include "llvm/CodeGen/MachineBasicBlock.h"
21 #include "llvm/ADT/BitVector.h"
25 class MachineRegisterInfo;
26 class TargetRegisterInfo;
27 class TargetInstrInfo;
28 class TargetRegisterClass;
31 MachineBasicBlock *MBB;
32 MachineBasicBlock::iterator MBBI;
35 /// Tracking - True if RegScavenger is currently tracking the liveness of
39 /// ScavengingFrameIndex - Special spill slot used for scavenging a register
40 /// post register allocation.
41 int ScavengingFrameIndex;
43 /// ScavengedReg - If none zero, the specific register is currently being
44 /// scavenged. That is, it is spilled to the special scavenging stack slot.
45 unsigned ScavengedReg;
47 /// ScavengedRC - Register class of the scavenged register.
49 const TargetRegisterClass *ScavengedRC;
51 /// RegsAvailable - The current state of all the physical registers immediately
52 /// before MBBI. One bit per physical register. If bit is set that means it's
53 /// available, unset means the register is currently being used.
54 BitVector RegsAvailable;
58 : MBB(NULL), NumPhysRegs(0), Tracking(false),
59 ScavengingFrameIndex(-1), ScavengedReg(0), ScavengedRC(NULL) {}
61 explicit RegScavenger(MachineBasicBlock *mbb)
62 : MBB(mbb), NumPhysRegs(0), Tracking(false),
63 ScavengingFrameIndex(-1), ScavengedReg(0), ScavengedRC(NULL) {}
65 /// enterBasicBlock - Start tracking liveness from the begin of the specific
67 void enterBasicBlock(MachineBasicBlock *mbb);
69 /// forward / backward - Move the internal MBB iterator and update register
74 /// forward / backward - Move the internal MBB iterator and update register
75 /// states until it has processed the specific iterator.
76 void forward(MachineBasicBlock::iterator I) {
77 while (MBBI != I) forward();
79 void backward(MachineBasicBlock::iterator I) {
80 while (MBBI != I) backward();
83 /// skipTo - Move the internal MBB iterator but do not update register states.
85 void skipTo(MachineBasicBlock::iterator I) { MBBI = I; }
87 /// isReserved - Returns true if a register is reserved. It is never "unused".
88 bool isReserved(unsigned Reg) const { return ReservedRegs[Reg]; }
90 /// isUsed / isUsed - Test if a register is currently being used.
92 bool isUsed(unsigned Reg) const { return !RegsAvailable[Reg]; }
93 bool isUnused(unsigned Reg) const { return RegsAvailable[Reg]; }
95 /// getRegsUsed - return all registers currently in use in used.
96 void getRegsUsed(BitVector &used, bool includeReserved);
98 /// setUsed / setUnused - Mark the state of one or a number of registers.
100 void setUsed(unsigned Reg);
101 void setUsed(BitVector Regs) { RegsAvailable &= ~Regs; }
102 void setUnused(unsigned Reg, const MachineInstr *MI);
103 void setUnused(BitVector Regs) { RegsAvailable |= Regs; }
105 /// FindUnusedReg - Find a unused register of the specified register class
106 /// from the specified set of registers. It return 0 is none is found.
107 unsigned FindUnusedReg(const TargetRegisterClass *RegClass,
108 const BitVector &Candidates) const;
110 /// FindUnusedReg - Find a unused register of the specified register class.
111 /// Exclude callee saved registers if directed. It return 0 is none is found.
112 unsigned FindUnusedReg(const TargetRegisterClass *RegClass,
113 bool ExCalleeSaved = false) const;
115 /// setScavengingFrameIndex / getScavengingFrameIndex - accessor and setter of
116 /// ScavengingFrameIndex.
117 void setScavengingFrameIndex(int FI) { ScavengingFrameIndex = FI; }
118 int getScavengingFrameIndex() const { return ScavengingFrameIndex; }
120 /// scavengeRegister - Make a register of the specific register class
121 /// available and do the appropriate bookkeeping. SPAdj is the stack
122 /// adjustment due to call frame, it's passed along to eliminateFrameIndex().
123 /// Returns the scavenged register.
124 unsigned scavengeRegister(const TargetRegisterClass *RegClass,
125 MachineBasicBlock::iterator I, int SPAdj);
126 unsigned scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj) {
127 return scavengeRegister(RegClass, MBBI, SPAdj);
131 const TargetRegisterInfo *TRI;
132 const TargetInstrInfo *TII;
133 MachineRegisterInfo* MRI;
135 /// CalleeSavedrRegs - A bitvector of callee saved registers for the target.
137 BitVector CalleeSavedRegs;
139 /// ReservedRegs - A bitvector of reserved registers.
141 BitVector ReservedRegs;
143 /// restoreScavengedReg - Restore scavenged by loading it back from the
144 /// emergency spill slot. Mark it used.
145 void restoreScavengedReg();
148 } // End llvm namespace