1 //===-- RegisterScavenging.h - Machine register scavenging ------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the machine register scavenger class. It can provide
11 // information such as unused register at any point in a machine basic block.
12 // It also provides a mechanism to make registers available by evicting them
15 //===----------------------------------------------------------------------===//
17 #ifndef LLVM_CODEGEN_REGISTERSCAVENGING_H
18 #define LLVM_CODEGEN_REGISTERSCAVENGING_H
20 #include "llvm/ADT/BitVector.h"
21 #include "llvm/CodeGen/MachineBasicBlock.h"
22 #include "llvm/CodeGen/MachineRegisterInfo.h"
26 class MachineRegisterInfo;
27 class TargetRegisterInfo;
28 class TargetInstrInfo;
29 class TargetRegisterClass;
32 const TargetRegisterInfo *TRI;
33 const TargetInstrInfo *TII;
34 MachineRegisterInfo* MRI;
35 MachineBasicBlock *MBB;
36 MachineBasicBlock::iterator MBBI;
39 /// True if RegScavenger is currently tracking the liveness of registers.
42 /// Information on scavenged registers (held in a spill slot).
43 struct ScavengedInfo {
44 ScavengedInfo(int FI = -1) : FrameIndex(FI), Reg(0), Restore(nullptr) {}
46 /// A spill slot used for scavenging a register post register allocation.
49 /// If non-zero, the specific register is currently being
50 /// scavenged. That is, it is spilled to this scavenging stack slot.
53 /// The instruction that restores the scavenged register from stack.
54 const MachineInstr *Restore;
57 /// A vector of information on scavenged registers.
58 SmallVector<ScavengedInfo, 2> Scavenged;
60 /// The current state of each reg unit immediately before MBBI.
61 /// One bit per register unit. If bit is not set it means any
62 /// register containing that register unit is currently being used.
63 BitVector RegUnitsAvailable;
65 // These BitVectors are only used internally to forward(). They are members
66 // to avoid frequent reallocations.
67 BitVector KillRegUnits, DefRegUnits;
68 BitVector TmpRegUnits;
72 : MBB(nullptr), NumRegUnits(0), Tracking(false) {}
74 /// Start tracking liveness from the begin of the specific basic block.
75 void enterBasicBlock(MachineBasicBlock *mbb);
77 /// Allow resetting register state info for multiple
78 /// passes over/within the same function.
81 /// Move the internal MBB iterator and update register states.
84 /// Move the internal MBB iterator and update register states until
85 /// it has processed the specific iterator.
86 void forward(MachineBasicBlock::iterator I) {
87 if (!Tracking && MBB->begin() != I) forward();
88 while (MBBI != I) forward();
91 /// Invert the behavior of forward() on the current instruction (undo the
92 /// changes to the available registers made by forward()).
95 /// Unprocess instructions until you reach the provided iterator.
96 void unprocess(MachineBasicBlock::iterator I) {
97 while (MBBI != I) unprocess();
100 /// Move the internal MBB iterator but do not update register states.
101 void skipTo(MachineBasicBlock::iterator I) {
102 if (I == MachineBasicBlock::iterator(nullptr))
107 MachineBasicBlock::iterator getCurrentPosition() const { return MBBI; }
109 /// Return if a specific register is currently used.
110 bool isRegUsed(unsigned Reg, bool includeReserved = true) const;
112 /// Return all available registers in the register class in Mask.
113 BitVector getRegsAvailable(const TargetRegisterClass *RC);
115 /// Find an unused register of the specified register class.
116 /// Return 0 if none is found.
117 unsigned FindUnusedReg(const TargetRegisterClass *RegClass) const;
119 /// Add a scavenging frame index.
120 void addScavengingFrameIndex(int FI) {
121 Scavenged.push_back(ScavengedInfo(FI));
124 /// Query whether a frame index is a scavenging frame index.
125 bool isScavengingFrameIndex(int FI) const {
126 for (SmallVectorImpl<ScavengedInfo>::const_iterator I = Scavenged.begin(),
127 IE = Scavenged.end(); I != IE; ++I)
128 if (I->FrameIndex == FI)
134 /// Get an array of scavenging frame indices.
135 void getScavengingFrameIndices(SmallVectorImpl<int> &A) const {
136 for (SmallVectorImpl<ScavengedInfo>::const_iterator I = Scavenged.begin(),
137 IE = Scavenged.end(); I != IE; ++I)
138 if (I->FrameIndex >= 0)
139 A.push_back(I->FrameIndex);
142 /// Make a register of the specific register class
143 /// available and do the appropriate bookkeeping. SPAdj is the stack
144 /// adjustment due to call frame, it's passed along to eliminateFrameIndex().
145 /// Returns the scavenged register.
146 unsigned scavengeRegister(const TargetRegisterClass *RegClass,
147 MachineBasicBlock::iterator I, int SPAdj);
148 unsigned scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj) {
149 return scavengeRegister(RegClass, MBBI, SPAdj);
152 /// Tell the scavenger a register is used.
153 void setRegUsed(unsigned Reg, LaneBitmask LaneMask = ~0u);
155 /// Returns true if a register is reserved. It is never "unused".
156 bool isReserved(unsigned Reg) const { return MRI->isReserved(Reg); }
158 /// setUsed / setUnused - Mark the state of one or a number of register units.
160 void setUsed(BitVector &RegUnits) {
161 RegUnitsAvailable.reset(RegUnits);
163 void setUnused(BitVector &RegUnits) {
164 RegUnitsAvailable |= RegUnits;
167 /// Processes the current instruction and fill the KillRegUnits and
168 /// DefRegUnits bit vectors.
169 void determineKillsAndDefs();
171 /// Add all Reg Units that Reg contains to BV.
172 void addRegUnits(BitVector &BV, unsigned Reg);
174 /// Return the candidate register that is unused for the longest after
175 /// StartMI. UseMI is set to the instruction where the search stopped.
177 /// No more than InstrLimit instructions are inspected.
178 unsigned findSurvivorReg(MachineBasicBlock::iterator StartMI,
179 BitVector &Candidates,
181 MachineBasicBlock::iterator &UseMI);
185 } // End llvm namespace