1 //===-- RegisterScavenging.h - Machine register scavenging ------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the machine register scavenger class. It can provide
11 // information such as unused register at any point in a machine basic block.
12 // It also provides a mechanism to make registers availbale by evicting them
15 //===----------------------------------------------------------------------===//
17 #ifndef LLVM_CODEGEN_REGISTERSCAVENGING_H
18 #define LLVM_CODEGEN_REGISTERSCAVENGING_H
20 #include "llvm/ADT/BitVector.h"
21 #include "llvm/CodeGen/MachineBasicBlock.h"
22 #include "llvm/CodeGen/MachineRegisterInfo.h"
26 class MachineRegisterInfo;
27 class TargetRegisterInfo;
28 class TargetInstrInfo;
29 class TargetRegisterClass;
32 const TargetRegisterInfo *TRI;
33 const TargetInstrInfo *TII;
34 MachineRegisterInfo* MRI;
35 MachineBasicBlock *MBB;
36 MachineBasicBlock::iterator MBBI;
39 /// Tracking - True if RegScavenger is currently tracking the liveness of
43 /// Information on scavenged registers (held in a spill slot).
44 struct ScavengedInfo {
45 ScavengedInfo(int FI = -1) : FrameIndex(FI), Reg(0), Restore(NULL) {}
47 /// A spill slot used for scavenging a register post register allocation.
50 /// If non-zero, the specific register is currently being
51 /// scavenged. That is, it is spilled to this scavenging stack slot.
54 /// The instruction that restores the scavenged register from stack.
55 const MachineInstr *Restore;
58 /// A vector of information on scavenged registers.
59 SmallVector<ScavengedInfo, 2> Scavenged;
61 /// CalleeSavedrRegs - A bitvector of callee saved registers for the target.
63 BitVector CalleeSavedRegs;
65 /// RegsAvailable - The current state of all the physical registers immediately
66 /// before MBBI. One bit per physical register. If bit is set that means it's
67 /// available, unset means the register is currently being used.
68 BitVector RegsAvailable;
70 // These BitVectors are only used internally to forward(). They are members
71 // to avoid frequent reallocations.
72 BitVector KillRegs, DefRegs;
76 : MBB(NULL), NumPhysRegs(0), Tracking(false) {}
78 /// enterBasicBlock - Start tracking liveness from the begin of the specific
80 void enterBasicBlock(MachineBasicBlock *mbb);
82 /// initRegState - allow resetting register state info for multiple
83 /// passes over/within the same function.
86 /// forward - Move the internal MBB iterator and update register states.
89 /// forward - Move the internal MBB iterator and update register states until
90 /// it has processed the specific iterator.
91 void forward(MachineBasicBlock::iterator I) {
92 if (!Tracking && MBB->begin() != I) forward();
93 while (MBBI != I) forward();
96 /// Invert the behavior of forward() on the current instruction (undo the
97 /// changes to the available registers made by forward()).
100 /// Unprocess instructions until you reach the provided iterator.
101 void unprocess(MachineBasicBlock::iterator I) {
102 while (MBBI != I) unprocess();
105 /// skipTo - Move the internal MBB iterator but do not update register states.
106 void skipTo(MachineBasicBlock::iterator I) {
107 if (I == MachineBasicBlock::iterator(NULL))
112 MachineBasicBlock::iterator getCurrentPosition() const {
116 /// getRegsUsed - return all registers currently in use in used.
117 void getRegsUsed(BitVector &used, bool includeReserved);
119 /// getRegsAvailable - Return all available registers in the register class
121 BitVector getRegsAvailable(const TargetRegisterClass *RC);
123 /// FindUnusedReg - Find a unused register of the specified register class.
124 /// Return 0 if none is found.
125 unsigned FindUnusedReg(const TargetRegisterClass *RegClass) const;
127 /// Add a scavenging frame index.
128 void addScavengingFrameIndex(int FI) {
129 Scavenged.push_back(ScavengedInfo(FI));
132 /// Query whether a frame index is a scavenging frame index.
133 bool isScavengingFrameIndex(int FI) const {
134 for (SmallVector<ScavengedInfo, 2>::const_iterator I = Scavenged.begin(),
135 IE = Scavenged.end(); I != IE; ++I)
136 if (I->FrameIndex == FI)
142 /// Get an array of scavenging frame indices.
143 void getScavengingFrameIndices(SmallVectorImpl<int> &A) const {
144 for (SmallVector<ScavengedInfo, 2>::const_iterator I = Scavenged.begin(),
145 IE = Scavenged.end(); I != IE; ++I)
146 if (I->FrameIndex >= 0)
147 A.push_back(I->FrameIndex);
150 /// scavengeRegister - Make a register of the specific register class
151 /// available and do the appropriate bookkeeping. SPAdj is the stack
152 /// adjustment due to call frame, it's passed along to eliminateFrameIndex().
153 /// Returns the scavenged register.
154 unsigned scavengeRegister(const TargetRegisterClass *RegClass,
155 MachineBasicBlock::iterator I, int SPAdj);
156 unsigned scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj) {
157 return scavengeRegister(RegClass, MBBI, SPAdj);
160 /// setUsed - Tell the scavenger a register is used.
162 void setUsed(unsigned Reg);
164 /// isReserved - Returns true if a register is reserved. It is never "unused".
165 bool isReserved(unsigned Reg) const { return MRI->isReserved(Reg); }
167 /// isUsed - Test if a register is currently being used. When called by the
168 /// isAliasUsed function, we only check isReserved if this is the original
169 /// register, not an alias register.
171 bool isUsed(unsigned Reg, bool CheckReserved = true) const {
172 return !RegsAvailable.test(Reg) || (CheckReserved && isReserved(Reg));
175 /// isAliasUsed - Is Reg or an alias currently in use?
176 bool isAliasUsed(unsigned Reg) const;
178 /// setUsed / setUnused - Mark the state of one or a number of registers.
180 void setUsed(BitVector &Regs) {
181 RegsAvailable.reset(Regs);
183 void setUnused(BitVector &Regs) {
184 RegsAvailable |= Regs;
187 /// Processes the current instruction and fill the KillRegs and DefRegs bit
189 void determineKillsAndDefs();
191 /// Add Reg and all its sub-registers to BV.
192 void addRegWithSubRegs(BitVector &BV, unsigned Reg);
194 /// findSurvivorReg - Return the candidate register that is unused for the
195 /// longest after StartMI. UseMI is set to the instruction where the search
198 /// No more than InstrLimit instructions are inspected.
199 unsigned findSurvivorReg(MachineBasicBlock::iterator StartMI,
200 BitVector &Candidates,
202 MachineBasicBlock::iterator &UseMI);
206 } // End llvm namespace