1 //===-- RegisterScavenging.h - Machine register scavenging ------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the machine register scavenger class. It can provide
11 // information such as unused register at any point in a machine basic block.
12 // It also provides a mechanism to make registers availbale by evicting them
15 //===----------------------------------------------------------------------===//
17 #ifndef LLVM_CODEGEN_REGISTER_SCAVENGING_H
18 #define LLVM_CODEGEN_REGISTER_SCAVENGING_H
20 #include "llvm/CodeGen/MachineBasicBlock.h"
21 #include "llvm/ADT/BitVector.h"
22 #include "llvm/ADT/DenseMap.h"
26 class MachineRegisterInfo;
27 class TargetRegisterInfo;
28 class TargetInstrInfo;
29 class TargetRegisterClass;
32 const TargetRegisterInfo *TRI;
33 const TargetInstrInfo *TII;
34 MachineRegisterInfo* MRI;
35 MachineBasicBlock *MBB;
36 MachineBasicBlock::iterator MBBI;
39 /// Tracking - True if RegScavenger is currently tracking the liveness of
43 /// ScavengingFrameIndex - Special spill slot used for scavenging a register
44 /// post register allocation.
45 int ScavengingFrameIndex;
47 /// ScavengedReg - If none zero, the specific register is currently being
48 /// scavenged. That is, it is spilled to the special scavenging stack slot.
49 unsigned ScavengedReg;
51 /// ScavengedRC - Register class of the scavenged register.
53 const TargetRegisterClass *ScavengedRC;
55 /// ScavengeRestore - Instruction that restores the scavenged register from
57 const MachineInstr *ScavengeRestore;
59 /// CalleeSavedrRegs - A bitvector of callee saved registers for the target.
61 BitVector CalleeSavedRegs;
63 /// ReservedRegs - A bitvector of reserved registers.
65 BitVector ReservedRegs;
67 /// RegsAvailable - The current state of all the physical registers immediately
68 /// before MBBI. One bit per physical register. If bit is set that means it's
69 /// available, unset means the register is currently being used.
70 BitVector RegsAvailable;
72 /// ImplicitDefed - If bit is set that means the register is defined by an
73 /// implicit_def instructions. That means it can be clobbered at will.
74 BitVector ImplicitDefed;
76 /// CurrDist - Distance from MBB entry to the current instruction MBBI.
80 /// DistanceMap - Keep track the distance of a MI from the start of the
81 /// current basic block.
82 DenseMap<MachineInstr*, unsigned> DistanceMap;
86 : MBB(NULL), NumPhysRegs(0), Tracking(false),
87 ScavengingFrameIndex(-1), ScavengedReg(0), ScavengedRC(NULL) {}
89 explicit RegScavenger(MachineBasicBlock *mbb)
90 : MBB(mbb), NumPhysRegs(0), Tracking(false),
91 ScavengingFrameIndex(-1), ScavengedReg(0), ScavengedRC(NULL) {}
93 /// enterBasicBlock - Start tracking liveness from the begin of the specific
95 void enterBasicBlock(MachineBasicBlock *mbb);
97 /// forward / backward - Move the internal MBB iterator and update register
102 /// forward / backward - Move the internal MBB iterator and update register
103 /// states until it has processed the specific iterator.
104 void forward(MachineBasicBlock::iterator I) {
105 while (MBBI != I) forward();
107 void backward(MachineBasicBlock::iterator I) {
108 while (MBBI != I) backward();
111 /// skipTo - Move the internal MBB iterator but do not update register states.
113 void skipTo(MachineBasicBlock::iterator I) { MBBI = I; }
115 /// isReserved - Returns true if a register is reserved. It is never "unused".
116 bool isReserved(unsigned Reg) const { return ReservedRegs[Reg]; }
118 /// isUsed / isUsed - Test if a register is currently being used.
120 bool isUsed(unsigned Reg) const { return !RegsAvailable[Reg]; }
121 bool isUnused(unsigned Reg) const { return RegsAvailable[Reg]; }
123 bool isImplicitlyDefined(unsigned Reg) const { return ImplicitDefed[Reg]; }
125 /// getRegsUsed - return all registers currently in use in used.
126 void getRegsUsed(BitVector &used, bool includeReserved);
128 /// setUsed / setUnused - Mark the state of one or a number of registers.
130 void setUsed(unsigned Reg, bool ImpDef = false);
131 void setUsed(BitVector Regs, bool ImpDef = false) {
132 RegsAvailable &= ~Regs;
134 ImplicitDefed |= Regs;
136 ImplicitDefed &= ~Regs;
138 void setUnused(unsigned Reg, const MachineInstr *MI);
139 void setUnused(BitVector Regs) {
140 RegsAvailable |= Regs;
141 ImplicitDefed &= ~Regs;
144 /// FindUnusedReg - Find a unused register of the specified register class
145 /// from the specified set of registers. It return 0 is none is found.
146 unsigned FindUnusedReg(const TargetRegisterClass *RegClass,
147 const BitVector &Candidates) const;
149 /// FindUnusedReg - Find a unused register of the specified register class.
150 /// Exclude callee saved registers if directed. It return 0 is none is found.
151 unsigned FindUnusedReg(const TargetRegisterClass *RegClass,
152 bool ExCalleeSaved = false) const;
154 /// setScavengingFrameIndex / getScavengingFrameIndex - accessor and setter of
155 /// ScavengingFrameIndex.
156 void setScavengingFrameIndex(int FI) { ScavengingFrameIndex = FI; }
157 int getScavengingFrameIndex() const { return ScavengingFrameIndex; }
159 /// scavengeRegister - Make a register of the specific register class
160 /// available and do the appropriate bookkeeping. SPAdj is the stack
161 /// adjustment due to call frame, it's passed along to eliminateFrameIndex().
162 /// Returns the scavenged register.
163 unsigned scavengeRegister(const TargetRegisterClass *RegClass,
164 MachineBasicBlock::iterator I, int SPAdj);
165 unsigned scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj) {
166 return scavengeRegister(RegClass, MBBI, SPAdj);
170 /// restoreScavengedReg - Restore scavenged by loading it back from the
171 /// emergency spill slot. Mark it used.
172 void restoreScavengedReg();
174 MachineInstr *findFirstUse(MachineBasicBlock *MBB,
175 MachineBasicBlock::iterator I, unsigned Reg,
179 } // End llvm namespace