1 //===-- llvm/CodeGen/SSARegMap.h --------------------------------*- C++ -*-===//
3 // Map register numbers to register classes that are correctly sized (typed) to
4 // hold the information. Assists register allocation. Contained by
5 // MachineFunction, should be deleted by register allocator when it is no
8 //===----------------------------------------------------------------------===//
10 #ifndef LLVM_CODEGEN_SSAREGMAP_H
11 #define LLVM_CODEGEN_SSAREGMAP_H
13 #include "llvm/Target/MRegisterInfo.h"
15 class TargetRegisterClass;
18 std::vector<const TargetRegisterClass*> RegClassMap;
20 unsigned rescale(unsigned Reg) {
21 return Reg - MRegisterInfo::FirstVirtualRegister;
25 const TargetRegisterClass* getRegClass(unsigned Reg) {
26 unsigned actualReg = rescale(Reg);
27 assert(actualReg < RegClassMap.size() && "Register out of bounds");
28 return RegClassMap[actualReg];
31 void addRegMap(unsigned Reg, const TargetRegisterClass* RegClass) {
32 assert(rescale(Reg) == RegClassMap.size() &&
33 "Register mapping not added in sequential order!");
34 RegClassMap.push_back(RegClass);