1 //===-- SimpleRegisterCoalescing.h - Register Coalescing --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements a simple register copy coalescing phase.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_CODEGEN_SIMPLE_REGISTER_COALESCING_H
15 #define LLVM_CODEGEN_SIMPLE_REGISTER_COALESCING_H
17 #include "llvm/CodeGen/MachineFunctionPass.h"
18 #include "llvm/CodeGen/LiveInterval.h"
19 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
20 #include "llvm/ADT/BitVector.h"
21 #include "llvm/ADT/IndexedMap.h"
27 class TargetInstrInfo;
30 class SimpleRegisterCoalescing : public MachineFunctionPass {
32 const TargetMachine* tm_;
33 const MRegisterInfo* mri_;
34 const TargetInstrInfo* tii_;
38 typedef IndexedMap<unsigned> Reg2RegMap;
41 BitVector allocatableRegs_;
42 DenseMap<const TargetRegisterClass*, BitVector> allocatableRCRegs_;
44 /// JoinedLIs - Keep track which register intervals have been coalesced
45 /// with other intervals.
49 static char ID; // Pass identifcation, replacement for typeid
50 SimpleRegisterCoalescing() : MachineFunctionPass((intptr_t)&ID) {};
54 unsigned SrcReg, DstReg;
56 CopyRec getCopyRec(MachineInstr *MI, unsigned SrcReg, unsigned DstReg) {
73 virtual void getAnalysisUsage(AnalysisUsage &AU) const;
74 virtual void releaseMemory();
76 /// runOnMachineFunction - pass entry point
77 virtual bool runOnMachineFunction(MachineFunction&);
79 /// print - Implement the dump method.
80 virtual void print(std::ostream &O, const Module* = 0) const;
81 void print(std::ostream *O, const Module* M = 0) const {
86 /// joinIntervals - join compatible live intervals
89 /// CopyCoalesceInMBB - Coalesce copies in the specified MBB, putting
90 /// copies that cannot yet be coalesced into the "TryAgain" list.
91 void CopyCoalesceInMBB(MachineBasicBlock *MBB,
92 std::vector<CopyRec> *TryAgain, bool PhysOnly = false);
94 /// JoinCopy - Attempt to join intervals corresponding to SrcReg/DstReg,
95 /// which are the src/dst of the copy instruction CopyMI. This returns true
96 /// if the copy was successfully coalesced away, or if it is never possible
97 /// to coalesce these this copy, due to register constraints. It returns
98 /// false if it is not currently possible to coalesce this interval, but
99 /// it may be possible if other things get coalesced.
100 bool JoinCopy(MachineInstr *CopyMI, unsigned SrcReg, unsigned DstReg,
101 bool PhysOnly = false);
103 /// JoinIntervals - Attempt to join these two intervals. On failure, this
104 /// returns false. Otherwise, if one of the intervals being joined is a
105 /// physreg, this method always canonicalizes DestInt to be it. The output
106 /// "SrcInt" will not have been modified, so we can use this information
107 /// below to update aliases.
108 bool JoinIntervals(LiveInterval &LHS, LiveInterval &RHS);
110 /// SimpleJoin - Attempt to join the specified interval into this one. The
111 /// caller of this method must guarantee that the RHS only contains a single
112 /// value number and that the RHS is not defined by a copy from this
113 /// interval. This returns false if the intervals are not joinable, or it
114 /// joins them and returns true.
115 bool SimpleJoin(LiveInterval &LHS, LiveInterval &RHS);
117 /// Return true if the two specified registers belong to different
118 /// register classes. The registers may be either phys or virt regs.
119 bool differingRegisterClasses(unsigned RegA, unsigned RegB) const;
122 bool AdjustCopiesBackFrom(LiveInterval &IntA, LiveInterval &IntB,
123 MachineInstr *CopyMI);
125 /// lastRegisterUse - Returns the last use of the specific register between
126 /// cycles Start and End. It also returns the use operand by reference. It
127 /// returns NULL if there are no uses.
128 MachineInstr *lastRegisterUse(unsigned Start, unsigned End, unsigned Reg,
129 MachineOperand *&MOU);
131 /// findDefOperand - Returns the MachineOperand that is a def of the specific
132 /// register. It returns NULL if the def is not found.
133 MachineOperand *findDefOperand(MachineInstr *MI, unsigned Reg);
135 /// unsetRegisterKill - Unset IsKill property of all uses of the specific
136 /// register of the specific instruction.
137 void unsetRegisterKill(MachineInstr *MI, unsigned Reg);
139 /// unsetRegisterKills - Unset IsKill property of all uses of specific register
140 /// between cycles Start and End.
141 void unsetRegisterKills(unsigned Start, unsigned End, unsigned Reg);
143 /// hasRegisterDef - True if the instruction defines the specific register.
145 bool hasRegisterDef(MachineInstr *MI, unsigned Reg);
147 /// rep - returns the representative of this register
148 unsigned rep(unsigned Reg) {
149 unsigned Rep = r2rMap_[Reg];
151 return r2rMap_[Reg] = rep(Rep);
155 void printRegName(unsigned reg) const;
158 } // End llvm namespace