1 //===------------------- StackMaps.h - StackMaps ----------------*- C++ -*-===//
4 // The LLVM Compiler Infrastructure
6 // This file is distributed under the University of Illinois Open Source
7 // License. See LICENSE.TXT for details.
9 //===----------------------------------------------------------------------===//
11 #ifndef LLVM_CODEGEN_STACKMAPS_H
12 #define LLVM_CODEGEN_STACKMAPS_H
14 #include "llvm/ADT/MapVector.h"
15 #include "llvm/ADT/SmallVector.h"
16 #include "llvm/CodeGen/MachineInstr.h"
17 #include "llvm/Support/Debug.h"
27 /// \brief MI-level patchpoint operands.
29 /// MI patchpoint operations take the form:
30 /// [<def>], <id>, <numBytes>, <target>, <numArgs>, <cc>, ...
32 /// IR patchpoint intrinsics do not have the <cc> operand because calling
33 /// convention is part of the subclass data.
35 /// SD patchpoint nodes do not have a def operand because it is part of the
38 /// Patchpoints following the anyregcc convention are handled specially. For
39 /// these, the stack map also records the location of the return value and
41 class PatchPointOpers {
43 /// Enumerate the meta operands.
44 enum { IDPos, NBytesPos, TargetPos, NArgPos, CCPos, MetaEnd };
46 const MachineInstr *MI;
50 explicit PatchPointOpers(const MachineInstr *MI);
52 bool isAnyReg() const { return IsAnyReg; }
53 bool hasDef() const { return HasDef; }
55 unsigned getMetaIdx(unsigned Pos = 0) const {
56 assert(Pos < MetaEnd && "Meta operand index out of range.");
57 return (HasDef ? 1 : 0) + Pos;
60 const MachineOperand &getMetaOper(unsigned Pos) {
61 return MI->getOperand(getMetaIdx(Pos));
64 unsigned getArgIdx() const { return getMetaIdx() + MetaEnd; }
66 /// Get the operand index of the variable list of non-argument operands.
67 /// These hold the "live state".
68 unsigned getVarIdx() const {
69 return getMetaIdx() + MetaEnd
70 + MI->getOperand(getMetaIdx(NArgPos)).getImm();
73 /// Get the index at which stack map locations will be recorded.
74 /// Arguments are not recorded unless the anyregcc convention is used.
75 unsigned getStackMapStartIdx() const {
81 /// \brief Get the next scratch register operand index.
82 unsigned getNextScratchIdx(unsigned StartIdx = 0) const;
85 /// MI-level Statepoint operands
87 /// Statepoint operands take the form:
88 /// <id>, <num patch bytes >, <num call arguments>, <call target>,
89 /// [call arguments], <StackMaps::ConstantOp>, <calling convention>,
90 /// <StackMaps::ConstantOp>, <statepoint flags>,
91 /// <StackMaps::ConstantOp>, <num other args>, [other args],
93 class StatepointOpers {
95 // These values are aboolute offsets into the operands of the statepoint
97 enum { IDPos, NBytesPos, NCallArgsPos, CallTargetPos, MetaEnd };
99 // These values are relative offests from the start of the statepoint meta
100 // arguments (i.e. the end of the call arguments).
108 explicit StatepointOpers(const MachineInstr *MI):
111 /// Get starting index of non call related arguments
112 /// (calling convention, statepoint flags, vm state and gc state).
113 unsigned getVarIdx() const {
114 return MI->getOperand(NCallArgsPos).getImm() + MetaEnd;
117 /// Return the ID for the given statepoint.
118 uint64_t getID() const { return MI->getOperand(IDPos).getImm(); }
120 /// Return the number of patchable bytes the given statepoint should emit.
121 uint32_t getNumPatchBytes() const {
122 return MI->getOperand(NBytesPos).getImm();
125 /// Returns the target of the underlying call.
126 const MachineOperand &getCallTarget() const {
127 return MI->getOperand(CallTargetPos);
131 const MachineInstr *MI;
137 enum LocationType { Unprocessed, Register, Direct, Indirect, Constant,
139 LocationType LocType;
143 Location() : LocType(Unprocessed), Size(0), Reg(0), Offset(0) {}
144 Location(LocationType LocType, unsigned Size, unsigned Reg, int64_t Offset)
145 : LocType(LocType), Size(Size), Reg(Reg), Offset(Offset) {}
150 unsigned short RegNo;
153 LiveOutReg() : Reg(0), RegNo(0), Size(0) {}
154 LiveOutReg(unsigned short Reg, unsigned short RegNo, unsigned short Size)
155 : Reg(Reg), RegNo(RegNo), Size(Size) {}
157 void MarkInvalid() { Reg = 0; }
159 // Only sort by the dwarf register number.
160 bool operator< (const LiveOutReg &LO) const { return RegNo < LO.RegNo; }
161 static bool IsInvalid(const LiveOutReg &LO) { return LO.Reg == 0; }
164 // OpTypes are used to encode information about the following logical
165 // operand (which may consist of several MachineOperands) for the
167 typedef enum { DirectMemRefOp, IndirectMemRefOp, ConstantOp } OpType;
169 StackMaps(AsmPrinter &AP);
177 /// \brief Generate a stackmap record for a stackmap instruction.
179 /// MI must be a raw STACKMAP, not a PATCHPOINT.
180 void recordStackMap(const MachineInstr &MI);
182 /// \brief Generate a stackmap record for a patchpoint instruction.
183 void recordPatchPoint(const MachineInstr &MI);
185 /// \brief Generate a stackmap record for a statepoint instruction.
186 void recordStatepoint(const MachineInstr &MI);
188 /// If there is any stack map data, create a stack map section and serialize
189 /// the map info into it. This clears the stack map data structures
191 void serializeToStackMapSection();
194 static const char *WSMP;
195 typedef SmallVector<Location, 8> LocationVec;
196 typedef SmallVector<LiveOutReg, 8> LiveOutVec;
197 typedef MapVector<uint64_t, uint64_t> ConstantPool;
198 typedef MapVector<const MCSymbol *, uint64_t> FnStackSizeMap;
200 struct CallsiteInfo {
201 const MCExpr *CSOffsetExpr;
203 LocationVec Locations;
205 CallsiteInfo() : CSOffsetExpr(nullptr), ID(0) {}
206 CallsiteInfo(const MCExpr *CSOffsetExpr, uint64_t ID,
207 LocationVec &&Locations, LiveOutVec &&LiveOuts)
208 : CSOffsetExpr(CSOffsetExpr), ID(ID), Locations(std::move(Locations)),
209 LiveOuts(std::move(LiveOuts)) {}
212 typedef std::vector<CallsiteInfo> CallsiteInfoList;
215 CallsiteInfoList CSInfos;
216 ConstantPool ConstPool;
217 FnStackSizeMap FnStackSize;
219 MachineInstr::const_mop_iterator
220 parseOperand(MachineInstr::const_mop_iterator MOI,
221 MachineInstr::const_mop_iterator MOE,
222 LocationVec &Locs, LiveOutVec &LiveOuts) const;
224 /// \brief Create a live-out register record for the given register @p Reg.
225 LiveOutReg createLiveOutReg(unsigned Reg,
226 const TargetRegisterInfo *TRI) const;
228 /// \brief Parse the register live-out mask and return a vector of live-out
229 /// registers that need to be recorded in the stackmap.
230 LiveOutVec parseRegisterLiveOutMask(const uint32_t *Mask) const;
232 /// This should be called by the MC lowering code _immediately_ before
233 /// lowering the MI to an MCInst. It records where the operands for the
234 /// instruction are stored, and outputs a label to record the offset of
235 /// the call from the start of the text section. In special cases (e.g. AnyReg
236 /// calling convention) the return register is also recorded if requested.
237 void recordStackMapOpers(const MachineInstr &MI, uint64_t ID,
238 MachineInstr::const_mop_iterator MOI,
239 MachineInstr::const_mop_iterator MOE,
240 bool recordResult = false);
242 /// \brief Emit the stackmap header.
243 void emitStackmapHeader(MCStreamer &OS);
245 /// \brief Emit the function frame record for each function.
246 void emitFunctionFrameRecords(MCStreamer &OS);
248 /// \brief Emit the constant pool.
249 void emitConstantPoolEntries(MCStreamer &OS);
251 /// \brief Emit the callsite info for each stackmap/patchpoint intrinsic call.
252 void emitCallsiteEntries(MCStreamer &OS);
254 void print(raw_ostream &OS);
255 void debug() { print(dbgs()); }