1 //===------------------- StackMaps.h - StackMaps ----------------*- C++ -*-===//
4 // The LLVM Compiler Infrastructure
6 // This file is distributed under the University of Illinois Open Source
7 // License. See LICENSE.TXT for details.
9 //===----------------------------------------------------------------------===//
11 #ifndef LLVM_CODEGEN_STACKMAPS_H
12 #define LLVM_CODEGEN_STACKMAPS_H
14 #include "llvm/ADT/MapVector.h"
15 #include "llvm/ADT/SmallVector.h"
16 #include "llvm/CodeGen/MachineInstr.h"
26 /// \brief MI-level patchpoint operands.
28 /// MI patchpoint operations take the form:
29 /// [<def>], <id>, <numBytes>, <target>, <numArgs>, <cc>, ...
31 /// IR patchpoint intrinsics do not have the <cc> operand because calling
32 /// convention is part of the subclass data.
34 /// SD patchpoint nodes do not have a def operand because it is part of the
37 /// Patchpoints following the anyregcc convention are handled specially. For
38 /// these, the stack map also records the location of the return value and
40 class PatchPointOpers {
42 /// Enumerate the meta operands.
43 enum { IDPos, NBytesPos, TargetPos, NArgPos, CCPos, MetaEnd };
45 const MachineInstr *MI;
49 explicit PatchPointOpers(const MachineInstr *MI);
51 bool isAnyReg() const { return IsAnyReg; }
52 bool hasDef() const { return HasDef; }
54 unsigned getMetaIdx(unsigned Pos = 0) const {
55 assert(Pos < MetaEnd && "Meta operand index out of range.");
56 return (HasDef ? 1 : 0) + Pos;
59 const MachineOperand &getMetaOper(unsigned Pos) {
60 return MI->getOperand(getMetaIdx(Pos));
63 unsigned getArgIdx() const { return getMetaIdx() + MetaEnd; }
65 /// Get the operand index of the variable list of non-argument operands.
66 /// These hold the "live state".
67 unsigned getVarIdx() const {
68 return getMetaIdx() + MetaEnd
69 + MI->getOperand(getMetaIdx(NArgPos)).getImm();
72 /// Get the index at which stack map locations will be recorded.
73 /// Arguments are not recorded unless the anyregcc convention is used.
74 unsigned getStackMapStartIdx() const {
80 /// \brief Get the next scratch register operand index.
81 unsigned getNextScratchIdx(unsigned StartIdx = 0) const;
87 enum LocationType { Unprocessed, Register, Direct, Indirect, Constant,
93 Location() : LocType(Unprocessed), Size(0), Reg(0), Offset(0) {}
94 Location(LocationType LocType, unsigned Size, unsigned Reg, int64_t Offset)
95 : LocType(LocType), Size(Size), Reg(Reg), Offset(Offset) {}
100 unsigned short RegNo;
103 LiveOutReg() : Reg(0), RegNo(0), Size(0) {}
104 LiveOutReg(unsigned short Reg, unsigned short RegNo, unsigned short Size)
105 : Reg(Reg), RegNo(RegNo), Size(Size) {}
107 void MarkInvalid() { Reg = 0; }
109 // Only sort by the dwarf register number.
110 bool operator< (const LiveOutReg &LO) const { return RegNo < LO.RegNo; }
111 static bool IsInvalid(const LiveOutReg &LO) { return LO.Reg == 0; }
114 // OpTypes are used to encode information about the following logical
115 // operand (which may consist of several MachineOperands) for the
117 typedef enum { DirectMemRefOp, IndirectMemRefOp, ConstantOp } OpType;
119 StackMaps(AsmPrinter &AP);
121 /// \brief Generate a stackmap record for a stackmap instruction.
123 /// MI must be a raw STACKMAP, not a PATCHPOINT.
124 void recordStackMap(const MachineInstr &MI);
126 /// \brief Generate a stackmap record for a patchpoint instruction.
127 void recordPatchPoint(const MachineInstr &MI);
129 /// If there is any stack map data, create a stack map section and serialize
130 /// the map info into it. This clears the stack map data structures
132 void serializeToStackMapSection();
135 static const char *WSMP;
137 typedef SmallVector<Location, 8> LocationVec;
138 typedef SmallVector<LiveOutReg, 8> LiveOutVec;
139 typedef MapVector<int64_t, int64_t> ConstantPool;
140 typedef MapVector<const MCSymbol *, uint64_t> FnStackSizeMap;
142 struct CallsiteInfo {
143 const MCExpr *CSOffsetExpr;
145 LocationVec Locations;
147 CallsiteInfo() : CSOffsetExpr(nullptr), ID(0) {}
148 CallsiteInfo(const MCExpr *CSOffsetExpr, uint64_t ID,
149 LocationVec &Locations, LiveOutVec &LiveOuts)
150 : CSOffsetExpr(CSOffsetExpr), ID(ID), Locations(Locations),
151 LiveOuts(LiveOuts) {}
154 typedef std::vector<CallsiteInfo> CallsiteInfoList;
157 CallsiteInfoList CSInfos;
158 ConstantPool ConstPool;
159 FnStackSizeMap FnStackSize;
161 MachineInstr::const_mop_iterator
162 parseOperand(MachineInstr::const_mop_iterator MOI,
163 MachineInstr::const_mop_iterator MOE,
164 LocationVec &Locs, LiveOutVec &LiveOuts) const;
166 /// \brief Create a live-out register record for the given register @p Reg.
167 LiveOutReg createLiveOutReg(unsigned Reg,
168 const TargetRegisterInfo *TRI) const;
170 /// \brief Parse the register live-out mask and return a vector of live-out
171 /// registers that need to be recorded in the stackmap.
172 LiveOutVec parseRegisterLiveOutMask(const uint32_t *Mask) const;
174 /// This should be called by the MC lowering code _immediately_ before
175 /// lowering the MI to an MCInst. It records where the operands for the
176 /// instruction are stored, and outputs a label to record the offset of
177 /// the call from the start of the text section. In special cases (e.g. AnyReg
178 /// calling convention) the return register is also recorded if requested.
179 void recordStackMapOpers(const MachineInstr &MI, uint64_t ID,
180 MachineInstr::const_mop_iterator MOI,
181 MachineInstr::const_mop_iterator MOE,
182 bool recordResult = false);
184 /// \brief Emit the stackmap header.
185 void emitStackmapHeader(MCStreamer &OS);
187 /// \brief Emit the function frame record for each function.
188 void emitFunctionFrameRecords(MCStreamer &OS);
190 /// \brief Emit the constant pool.
191 void emitConstantPoolEntries(MCStreamer &OS);
193 /// \brief Emit the callsite info for each stackmap/patchpoint intrinsic call.
194 void emitCallsiteEntries(MCStreamer &OS, const TargetRegisterInfo *TRI);