1 //===------------------- StackMaps.h - StackMaps ----------------*- C++ -*-===//
4 // The LLVM Compiler Infrastructure
6 // This file is distributed under the University of Illinois Open Source
7 // License. See LICENSE.TXT for details.
9 //===----------------------------------------------------------------------===//
11 #ifndef LLVM_STACKMAPS
12 #define LLVM_STACKMAPS
14 #include "llvm/ADT/MapVector.h"
15 #include "llvm/ADT/SmallVector.h"
16 #include "llvm/CodeGen/MachineInstr.h"
25 /// \brief MI-level patchpoint operands.
27 /// MI patchpoint operations take the form:
28 /// [<def>], <id>, <numBytes>, <target>, <numArgs>, <cc>, ...
30 /// IR patchpoint intrinsics do not have the <cc> operand because calling
31 /// convention is part of the subclass data.
33 /// SD patchpoint nodes do not have a def operand because it is part of the
36 /// Patchpoints following the anyregcc convention are handled specially. For
37 /// these, the stack map also records the location of the return value and
39 class PatchPointOpers {
41 /// Enumerate the meta operands.
42 enum { IDPos, NBytesPos, TargetPos, NArgPos, CCPos, MetaEnd };
44 const MachineInstr *MI;
48 explicit PatchPointOpers(const MachineInstr *MI);
50 bool isAnyReg() const { return IsAnyReg; }
51 bool hasDef() const { return HasDef; }
53 unsigned getMetaIdx(unsigned Pos = 0) const {
54 assert(Pos < MetaEnd && "Meta operand index out of range.");
55 return (HasDef ? 1 : 0) + Pos;
58 const MachineOperand &getMetaOper(unsigned Pos) {
59 return MI->getOperand(getMetaIdx(Pos));
62 unsigned getArgIdx() const { return getMetaIdx() + MetaEnd; }
64 /// Get the operand index of the variable list of non-argument operands.
65 /// These hold the "live state".
66 unsigned getVarIdx() const {
67 return getMetaIdx() + MetaEnd
68 + MI->getOperand(getMetaIdx(NArgPos)).getImm();
71 /// Get the index at which stack map locations will be recorded.
72 /// Arguments are not recorded unless the anyregcc convention is used.
73 unsigned getStackMapStartIdx() const {
79 /// \brief Get the next scratch register operand index.
80 unsigned getNextScratchIdx(unsigned StartIdx = 0) const;
86 enum LocationType { Unprocessed, Register, Direct, Indirect, Constant,
92 Location() : LocType(Unprocessed), Size(0), Reg(0), Offset(0) {}
93 Location(LocationType LocType, unsigned Size, unsigned Reg, int64_t Offset)
94 : LocType(LocType), Size(Size), Reg(Reg), Offset(Offset) {}
102 LiveOutReg() : Reg(0), RegNo(0), Size(0) {}
103 LiveOutReg(unsigned short Reg, unsigned short RegNo, unsigned short Size)
104 : Reg(Reg), RegNo(RegNo), Size(Size) {}
106 void MarkInvalid() { Reg = 0; }
108 // Only sort by the dwarf register number.
109 bool operator< (const LiveOutReg &LO) const { return RegNo < LO.RegNo; }
110 static bool IsInvalid(const LiveOutReg &LO) { return LO.Reg == 0; }
113 // OpTypes are used to encode information about the following logical
114 // operand (which may consist of several MachineOperands) for the
116 typedef enum { DirectMemRefOp, IndirectMemRefOp, ConstantOp } OpType;
118 StackMaps(AsmPrinter &AP) : AP(AP) {}
120 /// \brief Generate a stackmap record for a stackmap instruction.
122 /// MI must be a raw STACKMAP, not a PATCHPOINT.
123 void recordStackMap(const MachineInstr &MI);
125 /// \brief Generate a stackmap record for a patchpoint instruction.
126 void recordPatchPoint(const MachineInstr &MI);
128 /// If there is any stack map data, create a stack map section and serialize
129 /// the map info into it. This clears the stack map data structures
131 void serializeToStackMapSection();
134 typedef SmallVector<Location, 8> LocationVec;
135 typedef SmallVector<LiveOutReg, 8> LiveOutVec;
136 typedef MapVector<const MCSymbol *, uint64_t> FnStackSizeMap;
138 struct CallsiteInfo {
139 const MCExpr *CSOffsetExpr;
141 LocationVec Locations;
143 CallsiteInfo() : CSOffsetExpr(nullptr), ID(0) {}
144 CallsiteInfo(const MCExpr *CSOffsetExpr, uint64_t ID,
145 LocationVec &Locations, LiveOutVec &LiveOuts)
146 : CSOffsetExpr(CSOffsetExpr), ID(ID), Locations(Locations),
147 LiveOuts(LiveOuts) {}
150 typedef std::vector<CallsiteInfo> CallsiteInfoList;
152 struct ConstantPool {
154 typedef std::map<int64_t, size_t> ConstantsMap;
155 std::vector<int64_t> ConstantsList;
156 ConstantsMap ConstantIndexes;
159 size_t getNumConstants() const { return ConstantsList.size(); }
160 int64_t getConstant(size_t Idx) const { return ConstantsList[Idx]; }
161 size_t getConstantIndex(int64_t ConstVal) {
162 size_t NextIdx = ConstantsList.size();
163 ConstantsMap::const_iterator I =
164 ConstantIndexes.insert(ConstantIndexes.end(),
165 std::make_pair(ConstVal, NextIdx));
166 if (I->second == NextIdx)
167 ConstantsList.push_back(ConstVal);
173 CallsiteInfoList CSInfos;
174 ConstantPool ConstPool;
175 FnStackSizeMap FnStackSize;
177 MachineInstr::const_mop_iterator
178 parseOperand(MachineInstr::const_mop_iterator MOI,
179 MachineInstr::const_mop_iterator MOE,
180 LocationVec &Locs, LiveOutVec &LiveOuts) const;
182 /// \brief Create a live-out register record for the given register @p Reg.
183 LiveOutReg createLiveOutReg(unsigned Reg,
184 const TargetRegisterInfo *TRI) const;
186 /// \brief Parse the register live-out mask and return a vector of live-out
187 /// registers that need to be recorded in the stackmap.
188 LiveOutVec parseRegisterLiveOutMask(const uint32_t *Mask) const;
190 /// This should be called by the MC lowering code _immediately_ before
191 /// lowering the MI to an MCInst. It records where the operands for the
192 /// instruction are stored, and outputs a label to record the offset of
193 /// the call from the start of the text section. In special cases (e.g. AnyReg
194 /// calling convention) the return register is also recorded if requested.
195 void recordStackMapOpers(const MachineInstr &MI, uint64_t ID,
196 MachineInstr::const_mop_iterator MOI,
197 MachineInstr::const_mop_iterator MOE,
198 bool recordResult = false);
203 #endif // LLVM_STACKMAPS