1 //===-- llvm/InlineAsm.h - Class to represent inline asm strings-*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This class represents the inline asm strings, which are Value*'s that are
11 // used as the callee operand of call instructions. InlineAsm's are uniqued
12 // like constants, and created via InlineAsm::get(...).
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_IR_INLINEASM_H
17 #define LLVM_IR_INLINEASM_H
19 #include "llvm/ADT/StringRef.h"
20 #include "llvm/IR/Value.h"
29 struct InlineAsmKeyType;
30 template <class ConstantClass> class ConstantUniqueMap;
32 class InlineAsm : public Value {
40 friend struct InlineAsmKeyType;
41 friend class ConstantUniqueMap<InlineAsm>;
43 InlineAsm(const InlineAsm &) = delete;
44 void operator=(const InlineAsm&) = delete;
46 std::string AsmString, Constraints;
51 InlineAsm(PointerType *Ty, const std::string &AsmString,
52 const std::string &Constraints, bool hasSideEffects,
53 bool isAlignStack, AsmDialect asmDialect);
54 ~InlineAsm() override;
56 /// When the ConstantUniqueMap merges two types and makes two InlineAsms
57 /// identical, it destroys one of them with this method.
58 void destroyConstant();
61 /// InlineAsm::get - Return the specified uniqued inline asm string.
63 static InlineAsm *get(FunctionType *Ty, StringRef AsmString,
64 StringRef Constraints, bool hasSideEffects,
65 bool isAlignStack = false,
66 AsmDialect asmDialect = AD_ATT);
68 bool hasSideEffects() const { return HasSideEffects; }
69 bool isAlignStack() const { return IsAlignStack; }
70 AsmDialect getDialect() const { return Dialect; }
72 /// getType - InlineAsm's are always pointers.
74 PointerType *getType() const {
75 return reinterpret_cast<PointerType*>(Value::getType());
78 /// getFunctionType - InlineAsm's are always pointers to functions.
80 FunctionType *getFunctionType() const;
82 const std::string &getAsmString() const { return AsmString; }
83 const std::string &getConstraintString() const { return Constraints; }
85 /// Verify - This static method can be used by the parser to check to see if
86 /// the specified constraint string is legal for the type. This returns true
87 /// if legal, false if not.
89 static bool Verify(FunctionType *Ty, StringRef Constraints);
91 // Constraint String Parsing
92 enum ConstraintPrefix {
98 typedef std::vector<std::string> ConstraintCodeVector;
100 struct SubConstraintInfo {
101 /// MatchingInput - If this is not -1, this is an output constraint where an
102 /// input constraint is required to match it (e.g. "0"). The value is the
103 /// constraint number that matches this one (for example, if this is
104 /// constraint #0 and constraint #4 has the value "0", this will be 4).
105 signed char MatchingInput;
106 /// Code - The constraint code, either the register name (in braces) or the
107 /// constraint letter/number.
108 ConstraintCodeVector Codes;
109 /// Default constructor.
110 SubConstraintInfo() : MatchingInput(-1) {}
113 typedef std::vector<SubConstraintInfo> SubConstraintInfoVector;
114 struct ConstraintInfo;
115 typedef std::vector<ConstraintInfo> ConstraintInfoVector;
117 struct ConstraintInfo {
118 /// Type - The basic type of the constraint: input/output/clobber
120 ConstraintPrefix Type;
122 /// isEarlyClobber - "&": output operand writes result before inputs are all
123 /// read. This is only ever set for an output operand.
126 /// MatchingInput - If this is not -1, this is an output constraint where an
127 /// input constraint is required to match it (e.g. "0"). The value is the
128 /// constraint number that matches this one (for example, if this is
129 /// constraint #0 and constraint #4 has the value "0", this will be 4).
130 signed char MatchingInput;
132 /// hasMatchingInput - Return true if this is an output constraint that has
133 /// a matching input constraint.
134 bool hasMatchingInput() const { return MatchingInput != -1; }
136 /// isCommutative - This is set to true for a constraint that is commutative
137 /// with the next operand.
140 /// isIndirect - True if this operand is an indirect operand. This means
141 /// that the address of the source or destination is present in the call
142 /// instruction, instead of it being returned or passed in explicitly. This
143 /// is represented with a '*' in the asm string.
146 /// Code - The constraint code, either the register name (in braces) or the
147 /// constraint letter/number.
148 ConstraintCodeVector Codes;
150 /// isMultipleAlternative - '|': has multiple-alternative constraints.
151 bool isMultipleAlternative;
153 /// multipleAlternatives - If there are multiple alternative constraints,
154 /// this array will contain them. Otherwise it will be empty.
155 SubConstraintInfoVector multipleAlternatives;
157 /// The currently selected alternative constraint index.
158 unsigned currentAlternativeIndex;
160 ///Default constructor.
163 /// Parse - Analyze the specified string (e.g. "=*&{eax}") and fill in the
164 /// fields in this structure. If the constraint string is not understood,
165 /// return true, otherwise return false.
166 bool Parse(StringRef Str, ConstraintInfoVector &ConstraintsSoFar);
168 /// selectAlternative - Point this constraint to the alternative constraint
169 /// indicated by the index.
170 void selectAlternative(unsigned index);
173 /// ParseConstraints - Split up the constraint string into the specific
174 /// constraints and their prefixes. If this returns an empty vector, and if
175 /// the constraint string itself isn't empty, there was an error parsing.
176 static ConstraintInfoVector ParseConstraints(StringRef ConstraintString);
178 /// ParseConstraints - Parse the constraints of this inlineasm object,
179 /// returning them the same way that ParseConstraints(str) does.
180 ConstraintInfoVector ParseConstraints() const {
181 return ParseConstraints(Constraints);
184 // Methods for support type inquiry through isa, cast, and dyn_cast:
185 static inline bool classof(const Value *V) {
186 return V->getValueID() == Value::InlineAsmVal;
190 // These are helper methods for dealing with flags in the INLINEASM SDNode
193 // The encoding of the flag word is currently:
194 // Bits 2-0 - A Kind_* value indicating the kind of the operand.
195 // Bits 15-3 - The number of SDNode operands associated with this inline
198 // Bit 30-16 - The operand number that this operand must match.
199 // When bits 2-0 are Kind_Mem, the Constraint_* value must be
200 // obtained from the flags for this operand number.
201 // Else if bits 2-0 are Kind_Mem:
202 // Bit 30-16 - A Constraint_* value indicating the original constraint
205 // Bit 30-16 - The register class ID to use for the operand.
208 // Fixed operands on an INLINEASM SDNode.
212 Op_ExtraInfo = 3, // HasSideEffects, IsAlignStack, AsmDialect.
215 // Fixed operands on an INLINEASM MachineInstr.
217 MIOp_ExtraInfo = 1, // HasSideEffects, IsAlignStack, AsmDialect.
218 MIOp_FirstOperand = 2,
220 // Interpretation of the MIOp_ExtraInfo bit field.
221 Extra_HasSideEffects = 1,
222 Extra_IsAlignStack = 2,
223 Extra_AsmDialect = 4,
227 // Inline asm operands map to multiple SDNode / MachineInstr operands.
228 // The first operand is an immediate describing the asm operand, the low
230 Kind_RegUse = 1, // Input register, "r".
231 Kind_RegDef = 2, // Output register, "=r".
232 Kind_RegDefEarlyClobber = 3, // Early-clobber output register, "=&r".
233 Kind_Clobber = 4, // Clobbered register, "~r".
234 Kind_Imm = 5, // Immediate.
235 Kind_Mem = 6, // Memory operand, "m".
237 // Memory constraint codes.
238 // These could be tablegenerated but there's little need to do that since
239 // there's plenty of space in the encoding to support the union of all
240 // constraint codes for all targets.
241 Constraint_Unknown = 0,
262 Constraints_Max = Constraint_Zy,
263 Constraints_ShiftAmount = 16,
265 Flag_MatchingOperand = 0x80000000
268 static unsigned getFlagWord(unsigned Kind, unsigned NumOps) {
269 assert(((NumOps << 3) & ~0xffff) == 0 && "Too many inline asm operands!");
270 assert(Kind >= Kind_RegUse && Kind <= Kind_Mem && "Invalid Kind");
271 return Kind | (NumOps << 3);
274 /// getFlagWordForMatchingOp - Augment an existing flag word returned by
275 /// getFlagWord with information indicating that this input operand is tied
276 /// to a previous output operand.
277 static unsigned getFlagWordForMatchingOp(unsigned InputFlag,
278 unsigned MatchedOperandNo) {
279 assert(MatchedOperandNo <= 0x7fff && "Too big matched operand");
280 assert((InputFlag & ~0xffff) == 0 && "High bits already contain data");
281 return InputFlag | Flag_MatchingOperand | (MatchedOperandNo << 16);
284 /// getFlagWordForRegClass - Augment an existing flag word returned by
285 /// getFlagWord with the required register class for the following register
287 /// A tied use operand cannot have a register class, use the register class
288 /// from the def operand instead.
289 static unsigned getFlagWordForRegClass(unsigned InputFlag, unsigned RC) {
290 // Store RC + 1, reserve the value 0 to mean 'no register class'.
292 assert(RC <= 0x7fff && "Too large register class ID");
293 assert((InputFlag & ~0xffff) == 0 && "High bits already contain data");
294 return InputFlag | (RC << 16);
297 /// Augment an existing flag word returned by getFlagWord with the constraint
298 /// code for a memory constraint.
299 static unsigned getFlagWordForMem(unsigned InputFlag, unsigned Constraint) {
300 assert(Constraint <= 0x7fff && "Too large a memory constraint ID");
301 assert(Constraint <= Constraints_Max && "Unknown constraint ID");
302 assert((InputFlag & ~0xffff) == 0 && "High bits already contain data");
303 return InputFlag | (Constraint << Constraints_ShiftAmount);
306 static unsigned convertMemFlagWordToMatchingFlagWord(unsigned InputFlag) {
307 assert(isMemKind(InputFlag));
308 return InputFlag & ~(0x7fff << Constraints_ShiftAmount);
311 static unsigned getKind(unsigned Flags) {
315 static bool isRegDefKind(unsigned Flag){ return getKind(Flag) == Kind_RegDef;}
316 static bool isImmKind(unsigned Flag) { return getKind(Flag) == Kind_Imm; }
317 static bool isMemKind(unsigned Flag) { return getKind(Flag) == Kind_Mem; }
318 static bool isRegDefEarlyClobberKind(unsigned Flag) {
319 return getKind(Flag) == Kind_RegDefEarlyClobber;
321 static bool isClobberKind(unsigned Flag) {
322 return getKind(Flag) == Kind_Clobber;
325 static unsigned getMemoryConstraintID(unsigned Flag) {
326 assert(isMemKind(Flag));
327 return (Flag >> Constraints_ShiftAmount) & 0x7fff;
330 /// getNumOperandRegisters - Extract the number of registers field from the
331 /// inline asm operand flag.
332 static unsigned getNumOperandRegisters(unsigned Flag) {
333 return (Flag & 0xffff) >> 3;
336 /// isUseOperandTiedToDef - Return true if the flag of the inline asm
337 /// operand indicates it is an use operand that's matched to a def operand.
338 static bool isUseOperandTiedToDef(unsigned Flag, unsigned &Idx) {
339 if ((Flag & Flag_MatchingOperand) == 0)
341 Idx = (Flag & ~Flag_MatchingOperand) >> 16;
345 /// hasRegClassConstraint - Returns true if the flag contains a register
346 /// class constraint. Sets RC to the register class ID.
347 static bool hasRegClassConstraint(unsigned Flag, unsigned &RC) {
348 if (Flag & Flag_MatchingOperand)
350 unsigned High = Flag >> 16;
351 // getFlagWordForRegClass() uses 0 to mean no register class, and otherwise
361 } // End llvm namespace