1 //===- IntrinsicsAArch64.td - Defines AArch64 intrinsics -----------*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines all of the AArch64-specific intrinsics.
12 //===----------------------------------------------------------------------===//
14 //===----------------------------------------------------------------------===//
15 // Advanced SIMD (NEON)
17 let TargetPrefix = "aarch64" in { // All intrinsics start with "llvm.aarch64.".
19 // Vector Absolute Compare (Floating Point)
20 def int_aarch64_neon_vacgeq :
21 Intrinsic<[llvm_v2i64_ty], [llvm_v2f64_ty, llvm_v2f64_ty], [IntrNoMem]>;
22 def int_aarch64_neon_vacgtq :
23 Intrinsic<[llvm_v2i64_ty], [llvm_v2f64_ty, llvm_v2f64_ty], [IntrNoMem]>;
25 // Vector maxNum (Floating Point)
26 def int_aarch64_neon_vmaxnm : Neon_2Arg_Intrinsic;
28 // Vector minNum (Floating Point)
29 def int_aarch64_neon_vminnm : Neon_2Arg_Intrinsic;
31 // Vector Pairwise maxNum (Floating Point)
32 def int_aarch64_neon_vpmaxnm : Neon_2Arg_Intrinsic;
34 // Vector Pairwise minNum (Floating Point)
35 def int_aarch64_neon_vpminnm : Neon_2Arg_Intrinsic;
37 // Vector Multiply Extended (Floating Point)
38 def int_aarch64_neon_vmulx : Neon_2Arg_Intrinsic;
40 class Neon_N2V_Intrinsic
41 : Intrinsic<[llvm_anyvector_ty], [LLVMMatchType<0>, llvm_i32_ty],
43 class Neon_N3V_Intrinsic
44 : Intrinsic<[llvm_anyvector_ty],
45 [LLVMMatchType<0>, LLVMMatchType<0>, llvm_i32_ty],
47 class Neon_N2V_Narrow_Intrinsic
48 : Intrinsic<[llvm_anyvector_ty],
49 [LLVMExtendedElementVectorType<0>, llvm_i32_ty],
52 // Vector rounding shift right by immediate (Signed)
53 def int_aarch64_neon_vsrshr : Neon_N2V_Intrinsic;
54 def int_aarch64_neon_vurshr : Neon_N2V_Intrinsic;
55 def int_aarch64_neon_vsqshlu : Neon_N2V_Intrinsic;
57 def int_aarch64_neon_vsri : Neon_N3V_Intrinsic;
58 def int_aarch64_neon_vsli : Neon_N3V_Intrinsic;
60 def int_aarch64_neon_vsqshrun : Neon_N2V_Narrow_Intrinsic;
61 def int_aarch64_neon_vrshrn : Neon_N2V_Narrow_Intrinsic;
62 def int_aarch64_neon_vsqrshrun : Neon_N2V_Narrow_Intrinsic;
63 def int_aarch64_neon_vsqshrn : Neon_N2V_Narrow_Intrinsic;
64 def int_aarch64_neon_vuqshrn : Neon_N2V_Narrow_Intrinsic;
65 def int_aarch64_neon_vsqrshrn : Neon_N2V_Narrow_Intrinsic;
66 def int_aarch64_neon_vuqrshrn : Neon_N2V_Narrow_Intrinsic;
69 def int_aarch64_neon_vaddds :
70 Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
71 def int_aarch64_neon_vadddu :
72 Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
74 // Scalar Saturating Add (Signed, Unsigned)
75 def int_aarch64_neon_vqadds : Neon_2Arg_Intrinsic;
76 def int_aarch64_neon_vqaddu : Neon_2Arg_Intrinsic;
79 def int_aarch64_neon_vsubds :
80 Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
81 def int_aarch64_neon_vsubdu :
82 Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
84 // Scalar Saturating Sub (Signed, Unsigned)
85 def int_aarch64_neon_vqsubs : Neon_2Arg_Intrinsic;
86 def int_aarch64_neon_vqsubu : Neon_2Arg_Intrinsic;
90 def int_aarch64_neon_vshlds :
91 Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
92 def int_aarch64_neon_vshldu :
93 Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
95 // Scalar Saturating Shift Left
96 def int_aarch64_neon_vqshls : Neon_2Arg_Intrinsic;
97 def int_aarch64_neon_vqshlu : Neon_2Arg_Intrinsic;
99 // Scalar Shift Rouding Left
100 def int_aarch64_neon_vrshlds :
101 Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
102 def int_aarch64_neon_vrshldu :
103 Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
105 // Scalar Saturating Rounding Shift Left
106 def int_aarch64_neon_vqrshls : Neon_2Arg_Intrinsic;
107 def int_aarch64_neon_vqrshlu : Neon_2Arg_Intrinsic;
109 // Scalar Reduce Pairwise Add.
110 def int_aarch64_neon_vpadd :
111 Intrinsic<[llvm_v1i64_ty], [llvm_v2i64_ty],[IntrNoMem]>;
112 def int_aarch64_neon_vpfadd :
113 Intrinsic<[llvm_v1f32_ty], [llvm_v2f32_ty], [IntrNoMem]>;
114 def int_aarch64_neon_vpfaddq :
115 Intrinsic<[llvm_v1f64_ty], [llvm_v2f64_ty], [IntrNoMem]>;
117 // Scalar Reduce Pairwise Floating Point Max/Min.
118 def int_aarch64_neon_vpmax :
119 Intrinsic<[llvm_v1f32_ty], [llvm_v2f32_ty], [IntrNoMem]>;
120 def int_aarch64_neon_vpmaxq :
121 Intrinsic<[llvm_v1f64_ty], [llvm_v2f64_ty], [IntrNoMem]>;
122 def int_aarch64_neon_vpmin :
123 Intrinsic<[llvm_v1f32_ty], [llvm_v2f32_ty], [IntrNoMem]>;
124 def int_aarch64_neon_vpminq :
125 Intrinsic<[llvm_v1f64_ty], [llvm_v2f64_ty], [IntrNoMem]>;
127 // Scalar Reduce Pairwise Floating Point Maxnm/Minnm.
128 def int_aarch64_neon_vpfmaxnm :
129 Intrinsic<[llvm_v1f32_ty], [llvm_v2f32_ty], [IntrNoMem]>;
130 def int_aarch64_neon_vpfmaxnmq :
131 Intrinsic<[llvm_v1f64_ty], [llvm_v2f64_ty], [IntrNoMem]>;
132 def int_aarch64_neon_vpfminnm :
133 Intrinsic<[llvm_v1f32_ty], [llvm_v2f32_ty], [IntrNoMem]>;
134 def int_aarch64_neon_vpfminnmq :
135 Intrinsic<[llvm_v1f64_ty], [llvm_v2f64_ty], [IntrNoMem]>;