1 //===- IntrinsicsAArch64.td - Defines AArch64 intrinsics -----------*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines all of the AArch64-specific intrinsics.
12 //===----------------------------------------------------------------------===//
14 //===----------------------------------------------------------------------===//
15 // Advanced SIMD (NEON)
17 let TargetPrefix = "aarch64" in { // All intrinsics start with "llvm.aarch64.".
19 // Vector Absolute Compare (Floating Point)
20 def int_aarch64_neon_vacgeq :
21 Intrinsic<[llvm_v2i64_ty], [llvm_v2f64_ty, llvm_v2f64_ty], [IntrNoMem]>;
22 def int_aarch64_neon_vacgtq :
23 Intrinsic<[llvm_v2i64_ty], [llvm_v2f64_ty, llvm_v2f64_ty], [IntrNoMem]>;
25 // Vector saturating accumulate
26 def int_aarch64_neon_suqadd : Neon_2Arg_Intrinsic;
27 def int_aarch64_neon_usqadd : Neon_2Arg_Intrinsic;
29 // Vector Bitwise reverse
30 def int_aarch64_neon_rbit : Neon_1Arg_Intrinsic;
32 // Vector extract and narrow
33 def int_aarch64_neon_xtn :
34 Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>;
36 // Vector floating-point convert
37 def int_aarch64_neon_frintn : Neon_1Arg_Intrinsic;
38 def int_aarch64_neon_fsqrt : Neon_1Arg_Intrinsic;
39 def int_aarch64_neon_vcvtxn :
40 Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>;
41 def int_aarch64_neon_vcvtzs :
42 Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>;
43 def int_aarch64_neon_vcvtzu :
44 Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>;
46 // Vector maxNum (Floating Point)
47 def int_aarch64_neon_vmaxnm : Neon_2Arg_Intrinsic;
49 // Vector minNum (Floating Point)
50 def int_aarch64_neon_vminnm : Neon_2Arg_Intrinsic;
52 // Vector Pairwise maxNum (Floating Point)
53 def int_aarch64_neon_vpmaxnm : Neon_2Arg_Intrinsic;
55 // Vector Pairwise minNum (Floating Point)
56 def int_aarch64_neon_vpminnm : Neon_2Arg_Intrinsic;
58 // Vector Multiply Extended and Scalar Multiply Extended (Floating Point)
59 def int_aarch64_neon_vmulx :
60 Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>, LLVMMatchType<0>]>;
62 class Neon_N2V_Intrinsic
63 : Intrinsic<[llvm_anyvector_ty], [LLVMMatchType<0>, llvm_i32_ty],
65 class Neon_N3V_Intrinsic
66 : Intrinsic<[llvm_anyvector_ty],
67 [LLVMMatchType<0>, LLVMMatchType<0>, llvm_i32_ty],
69 class Neon_N2V_Narrow_Intrinsic
70 : Intrinsic<[llvm_anyvector_ty],
71 [LLVMExtendedElementVectorType<0>, llvm_i32_ty],
74 // Vector rounding shift right by immediate (Signed)
75 def int_aarch64_neon_vsrshr : Neon_N2V_Intrinsic;
76 def int_aarch64_neon_vurshr : Neon_N2V_Intrinsic;
77 def int_aarch64_neon_vsqshlu : Neon_N2V_Intrinsic;
79 def int_aarch64_neon_vsri : Neon_N3V_Intrinsic;
80 def int_aarch64_neon_vsli : Neon_N3V_Intrinsic;
82 def int_aarch64_neon_vsqshrun : Neon_N2V_Narrow_Intrinsic;
83 def int_aarch64_neon_vrshrn : Neon_N2V_Narrow_Intrinsic;
84 def int_aarch64_neon_vsqrshrun : Neon_N2V_Narrow_Intrinsic;
85 def int_aarch64_neon_vsqshrn : Neon_N2V_Narrow_Intrinsic;
86 def int_aarch64_neon_vuqshrn : Neon_N2V_Narrow_Intrinsic;
87 def int_aarch64_neon_vsqrshrn : Neon_N2V_Narrow_Intrinsic;
88 def int_aarch64_neon_vuqrshrn : Neon_N2V_Narrow_Intrinsic;
91 class Neon_Across_Intrinsic
92 : Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>;
94 def int_aarch64_neon_saddlv : Neon_Across_Intrinsic;
95 def int_aarch64_neon_uaddlv : Neon_Across_Intrinsic;
96 def int_aarch64_neon_smaxv : Neon_Across_Intrinsic;
97 def int_aarch64_neon_umaxv : Neon_Across_Intrinsic;
98 def int_aarch64_neon_sminv : Neon_Across_Intrinsic;
99 def int_aarch64_neon_uminv : Neon_Across_Intrinsic;
100 def int_aarch64_neon_vaddv : Neon_Across_Intrinsic;
101 def int_aarch64_neon_vmaxv : Neon_Across_Intrinsic;
102 def int_aarch64_neon_vminv : Neon_Across_Intrinsic;
103 def int_aarch64_neon_vmaxnmv : Neon_Across_Intrinsic;
104 def int_aarch64_neon_vminnmv : Neon_Across_Intrinsic;
106 // Vector Table Lookup.
107 def int_aarch64_neon_vtbl1 :
108 Intrinsic<[llvm_anyvector_ty],
109 [llvm_anyvector_ty, LLVMMatchType<0>], [IntrNoMem]>;
111 def int_aarch64_neon_vtbl2 :
112 Intrinsic<[llvm_anyvector_ty],
113 [llvm_anyvector_ty, LLVMMatchType<1>, LLVMMatchType<0>],
116 def int_aarch64_neon_vtbl3 :
117 Intrinsic<[llvm_anyvector_ty],
118 [llvm_anyvector_ty, LLVMMatchType<1>, LLVMMatchType<1>,
119 LLVMMatchType<0>], [IntrNoMem]>;
121 def int_aarch64_neon_vtbl4 :
122 Intrinsic<[llvm_anyvector_ty],
123 [llvm_anyvector_ty, LLVMMatchType<1>, LLVMMatchType<1>,
124 LLVMMatchType<1>, LLVMMatchType<0>], [IntrNoMem]>;
126 // Vector Table Extension.
127 // Some elements of the destination vector may not be updated, so the original
128 // value of that vector is passed as the first argument. The next 1-4
129 // arguments after that are the table.
130 def int_aarch64_neon_vtbx1 :
131 Intrinsic<[llvm_anyvector_ty],
132 [LLVMMatchType<0>, llvm_anyvector_ty, LLVMMatchType<0>],
135 def int_aarch64_neon_vtbx2 :
136 Intrinsic<[llvm_anyvector_ty],
137 [LLVMMatchType<0>, llvm_anyvector_ty, LLVMMatchType<1>,
138 LLVMMatchType<0>], [IntrNoMem]>;
140 def int_aarch64_neon_vtbx3 :
141 Intrinsic<[llvm_anyvector_ty],
142 [LLVMMatchType<0>, llvm_anyvector_ty, LLVMMatchType<1>,
143 LLVMMatchType<1>, LLVMMatchType<0>], [IntrNoMem]>;
145 def int_aarch64_neon_vtbx4 :
146 Intrinsic<[llvm_anyvector_ty],
147 [LLVMMatchType<0>, llvm_anyvector_ty, LLVMMatchType<1>,
148 LLVMMatchType<1>, LLVMMatchType<1>, LLVMMatchType<0>],
152 def int_aarch64_neon_vld1x2 : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>],
153 [llvm_ptr_ty, llvm_i32_ty],
155 def int_aarch64_neon_vld1x3 : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>,
157 [llvm_ptr_ty, llvm_i32_ty],
159 def int_aarch64_neon_vld1x4 : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>,
160 LLVMMatchType<0>, LLVMMatchType<0>],
161 [llvm_ptr_ty, llvm_i32_ty],
164 def int_aarch64_neon_vst1x2 : Intrinsic<[],
165 [llvm_ptr_ty, llvm_anyvector_ty,
166 LLVMMatchType<0>, llvm_i32_ty],
167 [IntrReadWriteArgMem]>;
168 def int_aarch64_neon_vst1x3 : Intrinsic<[],
169 [llvm_ptr_ty, llvm_anyvector_ty,
170 LLVMMatchType<0>, LLVMMatchType<0>,
171 llvm_i32_ty], [IntrReadWriteArgMem]>;
172 def int_aarch64_neon_vst1x4 : Intrinsic<[],
173 [llvm_ptr_ty, llvm_anyvector_ty,
174 LLVMMatchType<0>, LLVMMatchType<0>,
175 LLVMMatchType<0>, llvm_i32_ty],
176 [IntrReadWriteArgMem]>;
179 def int_aarch64_neon_vaddds :
180 Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
181 def int_aarch64_neon_vadddu :
182 Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
186 def int_aarch64_neon_vsubds :
187 Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
188 def int_aarch64_neon_vsubdu :
189 Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
194 def int_aarch64_neon_vshlds :
195 Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
196 def int_aarch64_neon_vshldu :
197 Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
199 // Scalar Saturating Shift Left
200 def int_aarch64_neon_vqshls : Neon_2Arg_Intrinsic;
201 def int_aarch64_neon_vqshlu : Neon_2Arg_Intrinsic;
203 // Scalar Shift Rouding Left
204 def int_aarch64_neon_vrshlds :
205 Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
206 def int_aarch64_neon_vrshldu :
207 Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
209 // Scalar Saturating Rounding Shift Left
210 def int_aarch64_neon_vqrshls : Neon_2Arg_Intrinsic;
211 def int_aarch64_neon_vqrshlu : Neon_2Arg_Intrinsic;
213 // Scalar Reduce Pairwise Add.
214 def int_aarch64_neon_vpadd :
215 Intrinsic<[llvm_v1i64_ty], [llvm_v2i64_ty],[IntrNoMem]>;
216 def int_aarch64_neon_vpfadd :
217 Intrinsic<[llvm_anyfloat_ty], [llvm_anyvector_ty], [IntrNoMem]>;
219 // Scalar Reduce Pairwise Floating Point Max/Min.
220 def int_aarch64_neon_vpmax :
221 Intrinsic<[llvm_anyfloat_ty], [llvm_anyvector_ty], [IntrNoMem]>;
222 def int_aarch64_neon_vpmin :
223 Intrinsic<[llvm_anyfloat_ty], [llvm_anyvector_ty], [IntrNoMem]>;
225 // Scalar Reduce Pairwise Floating Point Maxnm/Minnm.
226 def int_aarch64_neon_vpfmaxnm :
227 Intrinsic<[llvm_anyfloat_ty], [llvm_anyvector_ty], [IntrNoMem]>;
228 def int_aarch64_neon_vpfminnm :
229 Intrinsic<[llvm_anyfloat_ty], [llvm_anyvector_ty], [IntrNoMem]>;
231 // Scalar Signed Integer Convert To Floating-point
232 def int_aarch64_neon_vcvtint2fps :
233 Intrinsic<[llvm_anyfloat_ty], [llvm_anyvector_ty], [IntrNoMem]>;
235 // Scalar Unsigned Integer Convert To Floating-point
236 def int_aarch64_neon_vcvtint2fpu :
237 Intrinsic<[llvm_anyfloat_ty], [llvm_anyvector_ty], [IntrNoMem]>;
239 // Scalar Floating-point Convert
240 def int_aarch64_neon_fcvtxn :
241 Intrinsic<[llvm_float_ty], [llvm_double_ty], [IntrNoMem]>;
242 def int_aarch64_neon_fcvtns :
243 Intrinsic<[llvm_anyvector_ty], [llvm_anyfloat_ty], [IntrNoMem]>;
244 def int_aarch64_neon_fcvtnu :
245 Intrinsic<[llvm_anyvector_ty], [llvm_anyfloat_ty], [IntrNoMem]>;
246 def int_aarch64_neon_fcvtps :
247 Intrinsic<[llvm_anyvector_ty], [llvm_anyfloat_ty], [IntrNoMem]>;
248 def int_aarch64_neon_fcvtpu :
249 Intrinsic<[llvm_anyvector_ty], [llvm_anyfloat_ty], [IntrNoMem]>;
250 def int_aarch64_neon_fcvtms :
251 Intrinsic<[llvm_anyvector_ty], [llvm_anyfloat_ty], [IntrNoMem]>;
252 def int_aarch64_neon_fcvtmu :
253 Intrinsic<[llvm_anyvector_ty], [llvm_anyfloat_ty], [IntrNoMem]>;
254 def int_aarch64_neon_fcvtas :
255 Intrinsic<[llvm_anyvector_ty], [llvm_anyfloat_ty], [IntrNoMem]>;
256 def int_aarch64_neon_fcvtau :
257 Intrinsic<[llvm_anyvector_ty], [llvm_anyfloat_ty], [IntrNoMem]>;
258 def int_aarch64_neon_fcvtzs :
259 Intrinsic<[llvm_anyvector_ty], [llvm_anyfloat_ty], [IntrNoMem]>;
260 def int_aarch64_neon_fcvtzu :
261 Intrinsic<[llvm_anyvector_ty], [llvm_anyfloat_ty], [IntrNoMem]>;
263 // Scalar Floating-point Reciprocal Exponent
264 def int_aarch64_neon_vrecpx : Neon_1Arg_Intrinsic;
266 class Neon_Cmp_Intrinsic
267 : Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty, llvm_anyvector_ty],
270 // Scalar Compare Equal
271 def int_aarch64_neon_vceq : Neon_Cmp_Intrinsic;
273 // Scalar Compare Greater-Than or Equal
274 def int_aarch64_neon_vcge : Neon_Cmp_Intrinsic;
275 def int_aarch64_neon_vchs : Neon_Cmp_Intrinsic;
277 // Scalar Compare Less-Than or Equal
278 def int_aarch64_neon_vclez : Neon_Cmp_Intrinsic;
280 // Scalar Compare Less-Than
281 def int_aarch64_neon_vcltz : Neon_Cmp_Intrinsic;
283 // Scalar Compare Greater-Than
284 def int_aarch64_neon_vcgt : Neon_Cmp_Intrinsic;
285 def int_aarch64_neon_vchi : Neon_Cmp_Intrinsic;
287 // Scalar Compare Bitwise Test Bits
288 def int_aarch64_neon_vtstd : Neon_Cmp_Intrinsic;
290 // Scalar Floating-point Absolute Compare Greater Than Or Equal
291 def int_aarch64_neon_vcage : Neon_Cmp_Intrinsic;
293 // Scalar Floating-point Absolute Compare Greater Than
294 def int_aarch64_neon_vcagt : Neon_Cmp_Intrinsic;
296 // Scalar Signed Saturating Accumulated of Unsigned Value
297 def int_aarch64_neon_vuqadd : Neon_2Arg_Intrinsic;
299 // Scalar Unsigned Saturating Accumulated of Signed Value
300 def int_aarch64_neon_vsqadd : Neon_2Arg_Intrinsic;
302 // Scalar Absolute Value
303 def int_aarch64_neon_vabs :
304 Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty], [IntrNoMem]>;
306 // Scalar Absolute Difference
307 def int_aarch64_neon_vabd :
308 Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>, LLVMMatchType<0>],
311 // Scalar Negate Value
312 def int_aarch64_neon_vneg :
313 Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty], [IntrNoMem]>;
315 // Signed Saturating Doubling Multiply-Add Long
316 def int_aarch64_neon_vqdmlal : Neon_3Arg_Long_Intrinsic;
318 // Signed Saturating Doubling Multiply-Subtract Long
319 def int_aarch64_neon_vqdmlsl : Neon_3Arg_Long_Intrinsic;
321 def int_aarch64_neon_vmull_p64 :
322 Intrinsic<[llvm_v16i8_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
324 class Neon_2Arg_ShiftImm_Intrinsic
325 : Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_i32_ty], [IntrNoMem]>;
327 class Neon_3Arg_ShiftImm_Intrinsic
328 : Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty, llvm_i32_ty],
331 // Scalar Shift Right (Immediate)
332 def int_aarch64_neon_vshrds_n : Neon_2Arg_ShiftImm_Intrinsic;
333 def int_aarch64_neon_vshrdu_n : Neon_2Arg_ShiftImm_Intrinsic;
335 // Scalar Shift Right and Accumulate (Immediate)
336 def int_aarch64_neon_vsrads_n : Neon_3Arg_ShiftImm_Intrinsic;
337 def int_aarch64_neon_vsradu_n : Neon_3Arg_ShiftImm_Intrinsic;
339 // Scalar Rounding Shift Right and Accumulate (Immediate)
340 def int_aarch64_neon_vrsrads_n : Neon_3Arg_ShiftImm_Intrinsic;
341 def int_aarch64_neon_vrsradu_n : Neon_3Arg_ShiftImm_Intrinsic;
343 // Scalar Shift Left (Immediate)
344 def int_aarch64_neon_vshld_n : Neon_2Arg_ShiftImm_Intrinsic;
346 // Scalar Saturating Shift Left (Immediate)
347 def int_aarch64_neon_vqshls_n : Neon_N2V_Intrinsic;
348 def int_aarch64_neon_vqshlu_n : Neon_N2V_Intrinsic;
350 // Scalar Signed Saturating Shift Left Unsigned (Immediate)
351 def int_aarch64_neon_vqshlus_n : Neon_N2V_Intrinsic;
353 // Scalar Signed Fixed-point Convert To Floating-Point (Immediate)
354 def int_aarch64_neon_vcvtfxs2fp_n :
355 Intrinsic<[llvm_anyfloat_ty], [llvm_anyvector_ty, llvm_i32_ty], [IntrNoMem]>;
357 // Scalar Unsigned Fixed-point Convert To Floating-Point (Immediate)
358 def int_aarch64_neon_vcvtfxu2fp_n :
359 Intrinsic<[llvm_anyfloat_ty], [llvm_anyvector_ty, llvm_i32_ty], [IntrNoMem]>;
361 // Scalar Floating-point Convert To Signed Fixed-point (Immediate)
362 def int_aarch64_neon_vcvtfp2fxs_n :
363 Intrinsic<[llvm_anyvector_ty], [llvm_anyfloat_ty, llvm_i32_ty], [IntrNoMem]>;
365 // Scalar Floating-point Convert To Unsigned Fixed-point (Immediate)
366 def int_aarch64_neon_vcvtfp2fxu_n :
367 Intrinsic<[llvm_anyvector_ty], [llvm_anyfloat_ty, llvm_i32_ty], [IntrNoMem]>;
369 class Neon_SHA_Intrinsic
370 : Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v1i32_ty, llvm_v4i32_ty],
373 def int_aarch64_neon_sha1c : Neon_SHA_Intrinsic;
374 def int_aarch64_neon_sha1m : Neon_SHA_Intrinsic;
375 def int_aarch64_neon_sha1p : Neon_SHA_Intrinsic;