1 //===- IntrinsicsMips.td - Defines Mips intrinsics ---------*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines all of the MIPS-specific intrinsics.
12 //===----------------------------------------------------------------------===//
14 //===----------------------------------------------------------------------===//
15 // MIPS DSP data types
16 def mips_v2q15_ty: LLVMType<v2i16>;
17 def mips_v4q7_ty: LLVMType<v4i8>;
18 def mips_q31_ty: LLVMType<i32>;
20 let TargetPrefix = "mips" in { // All intrinsics start with "llvm.mips.".
22 //===----------------------------------------------------------------------===//
25 //===----------------------------------------------------------------------===//
26 // Addition/subtraction
28 def int_mips_addu_qb : GCCBuiltin<"__builtin_mips_addu_qb">,
29 Intrinsic<[llvm_v4i8_ty], [llvm_v4i8_ty, llvm_v4i8_ty], [Commutative]>;
30 def int_mips_addu_s_qb : GCCBuiltin<"__builtin_mips_addu_s_qb">,
31 Intrinsic<[llvm_v4i8_ty], [llvm_v4i8_ty, llvm_v4i8_ty], [Commutative]>;
32 def int_mips_subu_qb : GCCBuiltin<"__builtin_mips_subu_qb">,
33 Intrinsic<[llvm_v4i8_ty], [llvm_v4i8_ty, llvm_v4i8_ty], []>;
34 def int_mips_subu_s_qb : GCCBuiltin<"__builtin_mips_subu_s_qb">,
35 Intrinsic<[llvm_v4i8_ty], [llvm_v4i8_ty, llvm_v4i8_ty], []>;
37 def int_mips_addq_ph : GCCBuiltin<"__builtin_mips_addq_ph">,
38 Intrinsic<[mips_v2q15_ty], [mips_v2q15_ty, mips_v2q15_ty], [Commutative]>;
39 def int_mips_addq_s_ph : GCCBuiltin<"__builtin_mips_addq_s_ph">,
40 Intrinsic<[mips_v2q15_ty], [mips_v2q15_ty, mips_v2q15_ty], [Commutative]>;
41 def int_mips_subq_ph : GCCBuiltin<"__builtin_mips_subq_ph">,
42 Intrinsic<[mips_v2q15_ty], [mips_v2q15_ty, mips_v2q15_ty], []>;
43 def int_mips_subq_s_ph : GCCBuiltin<"__builtin_mips_subq_s_ph">,
44 Intrinsic<[mips_v2q15_ty], [mips_v2q15_ty, mips_v2q15_ty], []>;
46 def int_mips_madd: GCCBuiltin<"__builtin_mips_madd">,
47 Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty],
48 [IntrNoMem, Commutative]>;
49 def int_mips_maddu: GCCBuiltin<"__builtin_mips_maddu">,
50 Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty],
51 [IntrNoMem, Commutative]>;
53 def int_mips_msub: GCCBuiltin<"__builtin_mips_msub">,
54 Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty],
56 def int_mips_msubu: GCCBuiltin<"__builtin_mips_msubu">,
57 Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i32_ty, llvm_i32_ty],
60 def int_mips_addq_s_w: GCCBuiltin<"__builtin_mips_addq_s_w">,
61 Intrinsic<[mips_q31_ty], [mips_q31_ty, mips_q31_ty], [Commutative]>;
62 def int_mips_subq_s_w: GCCBuiltin<"__builtin_mips_subq_s_w">,
63 Intrinsic<[mips_q31_ty], [mips_q31_ty, mips_q31_ty], []>;
65 def int_mips_addsc: GCCBuiltin<"__builtin_mips_addsc">,
66 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [Commutative]>;
67 def int_mips_addwc: GCCBuiltin<"__builtin_mips_addwc">,
68 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [Commutative]>;
70 def int_mips_modsub: GCCBuiltin<"__builtin_mips_modsub">,
71 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
73 def int_mips_raddu_w_qb: GCCBuiltin<"__builtin_mips_raddu_w_qb">,
74 Intrinsic<[llvm_i32_ty], [llvm_v4i8_ty], [IntrNoMem]>;
76 //===----------------------------------------------------------------------===//
79 def int_mips_absq_s_ph: GCCBuiltin<"__builtin_mips_absq_s_ph">,
80 Intrinsic<[mips_v2q15_ty], [mips_v2q15_ty], []>;
81 def int_mips_absq_s_w: GCCBuiltin<"__builtin_mips_absq_s_w">,
82 Intrinsic<[mips_q31_ty], [mips_q31_ty], []>;
84 //===----------------------------------------------------------------------===//
85 // Precision reduce/expand
87 def int_mips_precrq_qb_ph: GCCBuiltin<"__builtin_mips_precrq_qb_ph">,
88 Intrinsic<[llvm_v4i8_ty], [mips_v2q15_ty, mips_v2q15_ty], [IntrNoMem]>;
89 def int_mips_precrqu_s_qb_ph: GCCBuiltin<"__builtin_mips_precrqu_s_qb_ph">,
90 Intrinsic<[llvm_v4i8_ty], [mips_v2q15_ty, mips_v2q15_ty], []>;
91 def int_mips_precrq_ph_w: GCCBuiltin<"__builtin_mips_precrq_ph_w">,
92 Intrinsic<[mips_v2q15_ty], [mips_q31_ty, mips_q31_ty], [IntrNoMem]>;
93 def int_mips_precrq_rs_ph_w: GCCBuiltin<"__builtin_mips_precrq_rs_ph_w">,
94 Intrinsic<[mips_v2q15_ty], [mips_q31_ty, mips_q31_ty], []>;
95 def int_mips_preceq_w_phl: GCCBuiltin<"__builtin_mips_preceq_w_phl">,
96 Intrinsic<[mips_q31_ty], [mips_v2q15_ty], [IntrNoMem]>;
97 def int_mips_preceq_w_phr: GCCBuiltin<"__builtin_mips_preceq_w_phr">,
98 Intrinsic<[mips_q31_ty], [mips_v2q15_ty], [IntrNoMem]>;
99 def int_mips_precequ_ph_qbl: GCCBuiltin<"__builtin_mips_precequ_ph_qbl">,
100 Intrinsic<[mips_v2q15_ty], [llvm_v4i8_ty], [IntrNoMem]>;
101 def int_mips_precequ_ph_qbr: GCCBuiltin<"__builtin_mips_precequ_ph_qbr">,
102 Intrinsic<[mips_v2q15_ty], [llvm_v4i8_ty], [IntrNoMem]>;
103 def int_mips_precequ_ph_qbla: GCCBuiltin<"__builtin_mips_precequ_ph_qbla">,
104 Intrinsic<[mips_v2q15_ty], [llvm_v4i8_ty], [IntrNoMem]>;
105 def int_mips_precequ_ph_qbra: GCCBuiltin<"__builtin_mips_precequ_ph_qbra">,
106 Intrinsic<[mips_v2q15_ty], [llvm_v4i8_ty], [IntrNoMem]>;
107 def int_mips_preceu_ph_qbl: GCCBuiltin<"__builtin_mips_preceu_ph_qbl">,
108 Intrinsic<[mips_v2q15_ty], [llvm_v4i8_ty], [IntrNoMem]>;
109 def int_mips_preceu_ph_qbr: GCCBuiltin<"__builtin_mips_preceu_ph_qbr">,
110 Intrinsic<[mips_v2q15_ty], [llvm_v4i8_ty], [IntrNoMem]>;
111 def int_mips_preceu_ph_qbla: GCCBuiltin<"__builtin_mips_preceu_ph_qbla">,
112 Intrinsic<[mips_v2q15_ty], [llvm_v4i8_ty], [IntrNoMem]>;
113 def int_mips_preceu_ph_qbra: GCCBuiltin<"__builtin_mips_preceu_ph_qbra">,
114 Intrinsic<[mips_v2q15_ty], [llvm_v4i8_ty], [IntrNoMem]>;
116 //===----------------------------------------------------------------------===//
119 def int_mips_shll_qb: GCCBuiltin<"__builtin_mips_shll_qb">,
120 Intrinsic<[llvm_v4i8_ty], [llvm_v4i8_ty, llvm_i32_ty], []>;
121 def int_mips_shrl_qb: GCCBuiltin<"__builtin_mips_shrl_qb">,
122 Intrinsic<[llvm_v4i8_ty], [llvm_v4i8_ty, llvm_i32_ty], [IntrNoMem]>;
123 def int_mips_shll_ph: GCCBuiltin<"__builtin_mips_shll_ph">,
124 Intrinsic<[mips_v2q15_ty], [mips_v2q15_ty, llvm_i32_ty], []>;
125 def int_mips_shll_s_ph: GCCBuiltin<"__builtin_mips_shll_s_ph">,
126 Intrinsic<[mips_v2q15_ty], [mips_v2q15_ty, llvm_i32_ty], []>;
127 def int_mips_shra_ph: GCCBuiltin<"__builtin_mips_shra_ph">,
128 Intrinsic<[mips_v2q15_ty], [mips_v2q15_ty, llvm_i32_ty], [IntrNoMem]>;
129 def int_mips_shra_r_ph: GCCBuiltin<"__builtin_mips_shra_r_ph">,
130 Intrinsic<[mips_v2q15_ty], [mips_v2q15_ty, llvm_i32_ty], [IntrNoMem]>;
131 def int_mips_shll_s_w: GCCBuiltin<"__builtin_mips_shll_s_w">,
132 Intrinsic<[mips_q31_ty], [mips_q31_ty, llvm_i32_ty], []>;
133 def int_mips_shra_r_w: GCCBuiltin<"__builtin_mips_shra_r_w">,
134 Intrinsic<[mips_q31_ty], [mips_q31_ty, llvm_i32_ty], [IntrNoMem]>;
135 def int_mips_shilo: GCCBuiltin<"__builtin_mips_shilo">,
136 Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i32_ty], [IntrNoMem]>;
138 //===----------------------------------------------------------------------===//
141 def int_mips_muleu_s_ph_qbl: GCCBuiltin<"__builtin_mips_muleu_s_ph_qbl">,
142 Intrinsic<[mips_v2q15_ty], [llvm_v4i8_ty, mips_v2q15_ty], []>;
143 def int_mips_muleu_s_ph_qbr: GCCBuiltin<"__builtin_mips_muleu_s_ph_qbr">,
144 Intrinsic<[mips_v2q15_ty], [llvm_v4i8_ty, mips_v2q15_ty], []>;
145 def int_mips_mulq_rs_ph: GCCBuiltin<"__builtin_mips_mulq_rs_ph">,
146 Intrinsic<[mips_v2q15_ty], [mips_v2q15_ty, mips_v2q15_ty], [Commutative]>;
147 def int_mips_muleq_s_w_phl: GCCBuiltin<"__builtin_mips_muleq_s_w_phl">,
148 Intrinsic<[mips_q31_ty], [mips_v2q15_ty, mips_v2q15_ty], [Commutative]>;
149 def int_mips_muleq_s_w_phr: GCCBuiltin<"__builtin_mips_muleq_s_w_phr">,
150 Intrinsic<[mips_q31_ty], [mips_v2q15_ty, mips_v2q15_ty], [Commutative]>;
151 def int_mips_mulsaq_s_w_ph: GCCBuiltin<"__builtin_mips_mulsaq_s_w_ph">,
152 Intrinsic<[llvm_i64_ty], [llvm_i64_ty, mips_v2q15_ty, mips_v2q15_ty], []>;
153 def int_mips_maq_s_w_phl: GCCBuiltin<"__builtin_mips_maq_s_w_phl">,
154 Intrinsic<[llvm_i64_ty], [llvm_i64_ty, mips_v2q15_ty, mips_v2q15_ty], []>;
155 def int_mips_maq_s_w_phr: GCCBuiltin<"__builtin_mips_maq_s_w_phr">,
156 Intrinsic<[llvm_i64_ty], [llvm_i64_ty, mips_v2q15_ty, mips_v2q15_ty], []>;
157 def int_mips_maq_sa_w_phl: GCCBuiltin<"__builtin_mips_maq_sa_w_phl">,
158 Intrinsic<[llvm_i64_ty], [llvm_i64_ty, mips_v2q15_ty, mips_v2q15_ty], []>;
159 def int_mips_maq_sa_w_phr: GCCBuiltin<"__builtin_mips_maq_sa_w_phr">,
160 Intrinsic<[llvm_i64_ty], [llvm_i64_ty, mips_v2q15_ty, mips_v2q15_ty], []>;
161 def int_mips_mult: GCCBuiltin<"__builtin_mips_mult">,
162 Intrinsic<[llvm_i64_ty], [llvm_i32_ty, llvm_i32_ty],
163 [IntrNoMem, Commutative]>;
164 def int_mips_multu: GCCBuiltin<"__builtin_mips_multu">,
165 Intrinsic<[llvm_i64_ty], [llvm_i32_ty, llvm_i32_ty],
166 [IntrNoMem, Commutative]>;
168 //===----------------------------------------------------------------------===//
169 // Dot product with accumulate/subtract
171 def int_mips_dpau_h_qbl: GCCBuiltin<"__builtin_mips_dpau_h_qbl">,
172 Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_v4i8_ty, llvm_v4i8_ty],
174 def int_mips_dpau_h_qbr: GCCBuiltin<"__builtin_mips_dpau_h_qbr">,
175 Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_v4i8_ty, llvm_v4i8_ty],
177 def int_mips_dpsu_h_qbl: GCCBuiltin<"__builtin_mips_dpsu_h_qbl">,
178 Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_v4i8_ty, llvm_v4i8_ty],
180 def int_mips_dpsu_h_qbr: GCCBuiltin<"__builtin_mips_dpsu_h_qbr">,
181 Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_v4i8_ty, llvm_v4i8_ty],
183 def int_mips_dpaq_s_w_ph: GCCBuiltin<"__builtin_mips_dpaq_s_w_ph">,
184 Intrinsic<[llvm_i64_ty], [llvm_i64_ty, mips_v2q15_ty, mips_v2q15_ty], []>;
185 def int_mips_dpsq_s_w_ph: GCCBuiltin<"__builtin_mips_dpsq_s_w_ph">,
186 Intrinsic<[llvm_i64_ty], [llvm_i64_ty, mips_v2q15_ty, mips_v2q15_ty], []>;
187 def int_mips_dpaq_sa_l_w: GCCBuiltin<"__builtin_mips_dpaq_sa_l_w">,
188 Intrinsic<[llvm_i64_ty], [llvm_i64_ty, mips_q31_ty, mips_q31_ty], []>;
189 def int_mips_dpsq_sa_l_w: GCCBuiltin<"__builtin_mips_dpsq_sa_l_w">,
190 Intrinsic<[llvm_i64_ty], [llvm_i64_ty, mips_q31_ty, mips_q31_ty], []>;
192 //===----------------------------------------------------------------------===//
195 def int_mips_cmpu_eq_qb: GCCBuiltin<"__builtin_mips_cmpu_eq_qb">,
196 Intrinsic<[], [llvm_v4i8_ty, llvm_v4i8_ty], [Commutative]>;
197 def int_mips_cmpu_lt_qb: GCCBuiltin<"__builtin_mips_cmpu_lt_qb">,
198 Intrinsic<[], [llvm_v4i8_ty, llvm_v4i8_ty], []>;
199 def int_mips_cmpu_le_qb: GCCBuiltin<"__builtin_mips_cmpu_le_qb">,
200 Intrinsic<[], [llvm_v4i8_ty, llvm_v4i8_ty], []>;
201 def int_mips_cmpgu_eq_qb: GCCBuiltin<"__builtin_mips_cmpgu_eq_qb">,
202 Intrinsic<[llvm_i32_ty], [llvm_v4i8_ty, llvm_v4i8_ty], [Commutative]>;
203 def int_mips_cmpgu_lt_qb: GCCBuiltin<"__builtin_mips_cmpgu_lt_qb">,
204 Intrinsic<[llvm_i32_ty], [llvm_v4i8_ty, llvm_v4i8_ty], []>;
205 def int_mips_cmpgu_le_qb: GCCBuiltin<"__builtin_mips_cmpgu_le_qb">,
206 Intrinsic<[llvm_i32_ty], [llvm_v4i8_ty, llvm_v4i8_ty], []>;
207 def int_mips_cmp_eq_ph: GCCBuiltin<"__builtin_mips_cmp_eq_ph">,
208 Intrinsic<[], [mips_v2q15_ty, mips_v2q15_ty], [Commutative]>;
209 def int_mips_cmp_lt_ph: GCCBuiltin<"__builtin_mips_cmp_lt_ph">,
210 Intrinsic<[], [mips_v2q15_ty, mips_v2q15_ty], []>;
211 def int_mips_cmp_le_ph: GCCBuiltin<"__builtin_mips_cmp_le_ph">,
212 Intrinsic<[], [mips_v2q15_ty, mips_v2q15_ty], []>;
214 //===----------------------------------------------------------------------===//
217 def int_mips_extr_s_h: GCCBuiltin<"__builtin_mips_extr_s_h">,
218 Intrinsic<[llvm_i32_ty], [llvm_i64_ty, llvm_i32_ty], []>;
219 def int_mips_extr_w: GCCBuiltin<"__builtin_mips_extr_w">,
220 Intrinsic<[llvm_i32_ty], [llvm_i64_ty, llvm_i32_ty], []>;
221 def int_mips_extr_rs_w: GCCBuiltin<"__builtin_mips_extr_rs_w">,
222 Intrinsic<[llvm_i32_ty], [llvm_i64_ty, llvm_i32_ty], []>;
223 def int_mips_extr_r_w: GCCBuiltin<"__builtin_mips_extr_r_w">,
224 Intrinsic<[llvm_i32_ty], [llvm_i64_ty, llvm_i32_ty], []>;
225 def int_mips_extp: GCCBuiltin<"__builtin_mips_extp">,
226 Intrinsic<[llvm_i32_ty], [llvm_i64_ty, llvm_i32_ty], []>;
227 def int_mips_extpdp: GCCBuiltin<"__builtin_mips_extpdp">,
228 Intrinsic<[llvm_i32_ty], [llvm_i64_ty, llvm_i32_ty], []>;
230 //===----------------------------------------------------------------------===//
233 def int_mips_wrdsp: GCCBuiltin<"__builtin_mips_wrdsp">,
234 Intrinsic<[], [llvm_i32_ty, llvm_i32_ty], []>;
235 def int_mips_rddsp: GCCBuiltin<"__builtin_mips_rddsp">,
236 Intrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrReadMem]>;
238 def int_mips_insv: GCCBuiltin<"__builtin_mips_insv">,
239 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrReadMem]>;
240 def int_mips_bitrev: GCCBuiltin<"__builtin_mips_bitrev">,
241 Intrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrNoMem]>;
243 def int_mips_packrl_ph: GCCBuiltin<"__builtin_mips_packrl_ph">,
244 Intrinsic<[mips_v2q15_ty], [mips_v2q15_ty, mips_v2q15_ty], [IntrNoMem]>;
246 def int_mips_repl_qb: GCCBuiltin<"__builtin_mips_repl_qb">,
247 Intrinsic<[llvm_v4i8_ty], [llvm_i32_ty], [IntrNoMem]>;
248 def int_mips_repl_ph: GCCBuiltin<"__builtin_mips_repl_ph">,
249 Intrinsic<[mips_v2q15_ty], [llvm_i32_ty], [IntrNoMem]>;
251 def int_mips_pick_qb: GCCBuiltin<"__builtin_mips_pick_qb">,
252 Intrinsic<[llvm_v4i8_ty], [llvm_v4i8_ty, llvm_v4i8_ty], [IntrReadMem]>;
253 def int_mips_pick_ph: GCCBuiltin<"__builtin_mips_pick_ph">,
254 Intrinsic<[mips_v2q15_ty], [mips_v2q15_ty, mips_v2q15_ty], [IntrReadMem]>;
256 def int_mips_mthlip: GCCBuiltin<"__builtin_mips_mthlip">,
257 Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i32_ty], []>;
259 def int_mips_bposge32: GCCBuiltin<"__builtin_mips_bposge32">,
260 Intrinsic<[llvm_i32_ty], [], [IntrReadMem]>;
262 def int_mips_lbux: GCCBuiltin<"__builtin_mips_lbux">,
263 Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty], [IntrReadArgMem]>;
264 def int_mips_lhx: GCCBuiltin<"__builtin_mips_lhx">,
265 Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty], [IntrReadArgMem]>;
266 def int_mips_lwx: GCCBuiltin<"__builtin_mips_lwx">,
267 Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty], [IntrReadArgMem]>;
269 //===----------------------------------------------------------------------===//
272 def int_mips_absq_s_qb: GCCBuiltin<"__builtin_mips_absq_s_qb">,
273 Intrinsic<[mips_v4q7_ty], [mips_v4q7_ty], []>;
275 def int_mips_addqh_ph: GCCBuiltin<"__builtin_mips_addqh_ph">,
276 Intrinsic<[mips_v2q15_ty], [mips_v2q15_ty, mips_v2q15_ty],
277 [IntrNoMem, Commutative]>;
278 def int_mips_addqh_r_ph: GCCBuiltin<"__builtin_mips_addqh_r_ph">,
279 Intrinsic<[mips_v2q15_ty], [mips_v2q15_ty, mips_v2q15_ty],
280 [IntrNoMem, Commutative]>;
281 def int_mips_addqh_w: GCCBuiltin<"__builtin_mips_addqh_w">,
282 Intrinsic<[mips_q31_ty], [mips_q31_ty, mips_q31_ty],
283 [IntrNoMem, Commutative]>;
284 def int_mips_addqh_r_w: GCCBuiltin<"__builtin_mips_addqh_r_w">,
285 Intrinsic<[mips_q31_ty], [mips_q31_ty, mips_q31_ty],
286 [IntrNoMem, Commutative]>;
288 def int_mips_addu_ph: GCCBuiltin<"__builtin_mips_addu_ph">,
289 Intrinsic<[llvm_v2i16_ty], [llvm_v2i16_ty, llvm_v2i16_ty], [Commutative]>;
290 def int_mips_addu_s_ph: GCCBuiltin<"__builtin_mips_addu_s_ph">,
291 Intrinsic<[llvm_v2i16_ty], [llvm_v2i16_ty, llvm_v2i16_ty], [Commutative]>;
293 def int_mips_adduh_qb: GCCBuiltin<"__builtin_mips_adduh_qb">,
294 Intrinsic<[llvm_v4i8_ty], [llvm_v4i8_ty, llvm_v4i8_ty],
295 [IntrNoMem, Commutative]>;
296 def int_mips_adduh_r_qb: GCCBuiltin<"__builtin_mips_adduh_r_qb">,
297 Intrinsic<[llvm_v4i8_ty], [llvm_v4i8_ty, llvm_v4i8_ty],
298 [IntrNoMem, Commutative]>;
300 def int_mips_append: GCCBuiltin<"__builtin_mips_append">,
301 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
303 def int_mips_balign: GCCBuiltin<"__builtin_mips_balign">,
304 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
307 def int_mips_cmpgdu_eq_qb: GCCBuiltin<"__builtin_mips_cmpgdu_eq_qb">,
308 Intrinsic<[llvm_i32_ty], [llvm_v4i8_ty, llvm_v4i8_ty], [Commutative]>;
309 def int_mips_cmpgdu_lt_qb: GCCBuiltin<"__builtin_mips_cmpgdu_lt_qb">,
310 Intrinsic<[llvm_i32_ty], [llvm_v4i8_ty, llvm_v4i8_ty], []>;
311 def int_mips_cmpgdu_le_qb: GCCBuiltin<"__builtin_mips_cmpgdu_le_qb">,
312 Intrinsic<[llvm_i32_ty], [llvm_v4i8_ty, llvm_v4i8_ty], []>;
314 def int_mips_dpa_w_ph: GCCBuiltin<"__builtin_mips_dpa_w_ph">,
315 Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_v2i16_ty, llvm_v2i16_ty],
317 def int_mips_dps_w_ph: GCCBuiltin<"__builtin_mips_dps_w_ph">,
318 Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_v2i16_ty, llvm_v2i16_ty],
321 def int_mips_dpaqx_s_w_ph: GCCBuiltin<"__builtin_mips_dpaqx_s_w_ph">,
322 Intrinsic<[llvm_i64_ty], [llvm_i64_ty, mips_v2q15_ty, mips_v2q15_ty], []>;
323 def int_mips_dpaqx_sa_w_ph: GCCBuiltin<"__builtin_mips_dpaqx_sa_w_ph">,
324 Intrinsic<[llvm_i64_ty], [llvm_i64_ty, mips_v2q15_ty, mips_v2q15_ty], []>;
325 def int_mips_dpax_w_ph: GCCBuiltin<"__builtin_mips_dpax_w_ph">,
326 Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_v2i16_ty, llvm_v2i16_ty],
328 def int_mips_dpsx_w_ph: GCCBuiltin<"__builtin_mips_dpsx_w_ph">,
329 Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_v2i16_ty, llvm_v2i16_ty],
331 def int_mips_dpsqx_s_w_ph: GCCBuiltin<"__builtin_mips_dpsqx_s_w_ph">,
332 Intrinsic<[llvm_i64_ty], [llvm_i64_ty, mips_v2q15_ty, mips_v2q15_ty], []>;
333 def int_mips_dpsqx_sa_w_ph: GCCBuiltin<"__builtin_mips_dpsqx_sa_w_ph">,
334 Intrinsic<[llvm_i64_ty], [llvm_i64_ty, mips_v2q15_ty, mips_v2q15_ty], []>;
336 def int_mips_mul_ph: GCCBuiltin<"__builtin_mips_mul_ph">,
337 Intrinsic<[llvm_v2i16_ty], [llvm_v2i16_ty, llvm_v2i16_ty], [Commutative]>;
338 def int_mips_mul_s_ph: GCCBuiltin<"__builtin_mips_mul_s_ph">,
339 Intrinsic<[llvm_v2i16_ty], [llvm_v2i16_ty, llvm_v2i16_ty], [Commutative]>;
341 def int_mips_mulq_rs_w: GCCBuiltin<"__builtin_mips_mulq_rs_w">,
342 Intrinsic<[mips_q31_ty], [mips_q31_ty, mips_q31_ty], [Commutative]>;
343 def int_mips_mulq_s_ph: GCCBuiltin<"__builtin_mips_mulq_s_ph">,
344 Intrinsic<[mips_v2q15_ty], [mips_v2q15_ty, mips_v2q15_ty], [Commutative]>;
345 def int_mips_mulq_s_w: GCCBuiltin<"__builtin_mips_mulq_s_w">,
346 Intrinsic<[mips_q31_ty], [mips_q31_ty, mips_q31_ty], [Commutative]>;
347 def int_mips_mulsa_w_ph: GCCBuiltin<"__builtin_mips_mulsa_w_ph">,
348 Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_v2i16_ty, llvm_v2i16_ty],
351 def int_mips_precr_qb_ph: GCCBuiltin<"__builtin_mips_precr_qb_ph">,
352 Intrinsic<[llvm_v4i8_ty], [llvm_v2i16_ty, llvm_v2i16_ty], []>;
353 def int_mips_precr_sra_ph_w: GCCBuiltin<"__builtin_mips_precr_sra_ph_w">,
354 Intrinsic<[llvm_v2i16_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
356 def int_mips_precr_sra_r_ph_w: GCCBuiltin<"__builtin_mips_precr_sra_r_ph_w">,
357 Intrinsic<[llvm_v2i16_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
360 def int_mips_prepend: GCCBuiltin<"__builtin_mips_prepend">,
361 Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
364 def int_mips_shra_qb: GCCBuiltin<"__builtin_mips_shra_qb">,
365 Intrinsic<[llvm_v4i8_ty], [llvm_v4i8_ty, llvm_i32_ty], [IntrNoMem]>;
366 def int_mips_shra_r_qb: GCCBuiltin<"__builtin_mips_shra_r_qb">,
367 Intrinsic<[llvm_v4i8_ty], [llvm_v4i8_ty, llvm_i32_ty], [IntrNoMem]>;
368 def int_mips_shrl_ph: GCCBuiltin<"__builtin_mips_shrl_ph">,
369 Intrinsic<[llvm_v2i16_ty], [llvm_v2i16_ty, llvm_i32_ty], [IntrNoMem]>;
371 def int_mips_subqh_ph: GCCBuiltin<"__builtin_mips_subqh_ph">,
372 Intrinsic<[mips_v2q15_ty], [mips_v2q15_ty, mips_v2q15_ty], [IntrNoMem]>;
373 def int_mips_subqh_r_ph: GCCBuiltin<"__builtin_mips_subqh_r_ph">,
374 Intrinsic<[mips_v2q15_ty], [mips_v2q15_ty, mips_v2q15_ty], [IntrNoMem]>;
375 def int_mips_subqh_w: GCCBuiltin<"__builtin_mips_subqh_w">,
376 Intrinsic<[mips_q31_ty], [mips_q31_ty, mips_q31_ty], [IntrNoMem]>;
377 def int_mips_subqh_r_w: GCCBuiltin<"__builtin_mips_subqh_r_w">,
378 Intrinsic<[mips_q31_ty], [mips_q31_ty, mips_q31_ty], [IntrNoMem]>;
380 def int_mips_subu_ph: GCCBuiltin<"__builtin_mips_subu_ph">,
381 Intrinsic<[llvm_v2i16_ty], [llvm_v2i16_ty, llvm_v2i16_ty], []>;
382 def int_mips_subu_s_ph: GCCBuiltin<"__builtin_mips_subu_s_ph">,
383 Intrinsic<[llvm_v2i16_ty], [llvm_v2i16_ty, llvm_v2i16_ty], []>;
385 def int_mips_subuh_qb: GCCBuiltin<"__builtin_mips_subuh_qb">,
386 Intrinsic<[llvm_v4i8_ty], [llvm_v4i8_ty, llvm_v4i8_ty], [IntrNoMem]>;
387 def int_mips_subuh_r_qb: GCCBuiltin<"__builtin_mips_subuh_r_qb">,
388 Intrinsic<[llvm_v4i8_ty], [llvm_v4i8_ty, llvm_v4i8_ty], [IntrNoMem]>;