1 //===- IntrinsicsR600.td - Defines R600 intrinsics ---------*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines all of the R600-specific intrinsics.
12 //===----------------------------------------------------------------------===//
14 let TargetPrefix = "r600" in {
16 class R600ReadPreloadRegisterIntrinsic<string name>
17 : Intrinsic<[llvm_i32_ty], [], [IntrNoMem]>,
20 multiclass R600ReadPreloadRegisterIntrinsic_xyz<string prefix> {
21 def _x : R600ReadPreloadRegisterIntrinsic<!strconcat(prefix, "_x")>;
22 def _y : R600ReadPreloadRegisterIntrinsic<!strconcat(prefix, "_y")>;
23 def _z : R600ReadPreloadRegisterIntrinsic<!strconcat(prefix, "_z")>;
26 defm int_r600_read_global_size : R600ReadPreloadRegisterIntrinsic_xyz <
27 "__builtin_r600_read_global_size">;
28 defm int_r600_read_local_size : R600ReadPreloadRegisterIntrinsic_xyz <
29 "__builtin_r600_read_local_size">;
30 defm int_r600_read_ngroups : R600ReadPreloadRegisterIntrinsic_xyz <
31 "__builtin_r600_read_ngroups">;
32 defm int_r600_read_tgid : R600ReadPreloadRegisterIntrinsic_xyz <
33 "__builtin_r600_read_tgid">;
34 defm int_r600_read_tidig : R600ReadPreloadRegisterIntrinsic_xyz <
35 "__builtin_r600_read_tidig">;
36 } // End TargetPrefix = "r600"
38 let TargetPrefix = "AMDGPU" in {
40 class AMDGPUReadPreloadRegisterIntrinsic<string name>
41 : Intrinsic<[llvm_i32_ty], [], [IntrNoMem]>,
44 def int_AMDGPU_div_scale : GCCBuiltin<"__builtin_amdgpu_div_scale">,
45 // 1st parameter: Numerator
46 // 2nd parameter: Denominator
47 // 3rd parameter: Constant to select select between first and
48 // second. (0 = first, 1 = second).
49 Intrinsic<[llvm_anyfloat_ty, llvm_i1_ty],
50 [LLVMMatchType<0>, LLVMMatchType<0>, llvm_i1_ty],
53 def int_AMDGPU_div_fmas : GCCBuiltin<"__builtin_amdgpu_div_fmas">,
54 Intrinsic<[llvm_anyfloat_ty],
55 [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
58 def int_AMDGPU_div_fixup : GCCBuiltin<"__builtin_amdgpu_div_fixup">,
59 Intrinsic<[llvm_anyfloat_ty],
60 [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
63 def int_AMDGPU_trig_preop : GCCBuiltin<"__builtin_amdgpu_trig_preop">,
64 Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>, llvm_i32_ty],
67 def int_AMDGPU_rcp : GCCBuiltin<"__builtin_amdgpu_rcp">,
68 Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>], [IntrNoMem]>;
70 def int_AMDGPU_rsq : GCCBuiltin<"__builtin_amdgpu_rsq">,
71 Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>], [IntrNoMem]>;
73 def int_AMDGPU_rsq_clamped : GCCBuiltin<"__builtin_amdgpu_rsq_clamped">,
74 Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>], [IntrNoMem]>;
76 def int_AMDGPU_ldexp : GCCBuiltin<"__builtin_amdgpu_ldexp">,
77 Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>, llvm_i32_ty], [IntrNoMem]>;
79 def int_AMDGPU_read_workdim : AMDGPUReadPreloadRegisterIntrinsic <
80 "__builtin_amdgpu_read_workdim">;
82 } // End TargetPrefix = "AMDGPU"