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[oota-llvm.git] / include / llvm / IntrinsicsX86.td
1 //===- IntrinsicsX86.td - Defines X86 intrinsics -----------*- tablegen -*-===//
2 // 
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 // 
8 //===----------------------------------------------------------------------===//
9 //
10 // This file defines all of the X86-specific intrinsics.
11 //
12 //===----------------------------------------------------------------------===//
13
14
15 //===----------------------------------------------------------------------===//
16 // SSE1
17
18 // Arithmetic ops
19 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
20   def int_x86_sse_add_ss : GCCBuiltin<"__builtin_ia32_addss">,
21               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
22                          llvm_v4f32_ty], [IntrNoMem]>;
23   def int_x86_sse_sub_ss : GCCBuiltin<"__builtin_ia32_subss">,
24               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
25                          llvm_v4f32_ty], [IntrNoMem]>;
26   def int_x86_sse_mul_ss : GCCBuiltin<"__builtin_ia32_mulss">,
27               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
28                          llvm_v4f32_ty], [IntrNoMem]>;
29   def int_x86_sse_div_ss : GCCBuiltin<"__builtin_ia32_divss">,
30               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
31                          llvm_v4f32_ty], [IntrNoMem]>;
32   def int_x86_sse_sqrt_ss : GCCBuiltin<"__builtin_ia32_sqrtss">,
33               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
34                         [IntrNoMem]>;
35   def int_x86_sse_sqrt_ps : GCCBuiltin<"__builtin_ia32_sqrtps">,
36               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
37                         [IntrNoMem]>;
38   def int_x86_sse_rcp_ss : GCCBuiltin<"__builtin_ia32_rcpss">,
39               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
40                         [IntrNoMem]>;
41   def int_x86_sse_rcp_ps : GCCBuiltin<"__builtin_ia32_rcpps">,
42               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
43                         [IntrNoMem]>;
44   def int_x86_sse_rsqrt_ss : GCCBuiltin<"__builtin_ia32_rsqrtss">,
45               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
46                         [IntrNoMem]>;
47   def int_x86_sse_rsqrt_ps : GCCBuiltin<"__builtin_ia32_rsqrtps">,
48               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
49                         [IntrNoMem]>;
50   def int_x86_sse_min_ss : GCCBuiltin<"__builtin_ia32_minss">,
51               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
52                          llvm_v4f32_ty], [IntrNoMem]>;
53   def int_x86_sse_min_ps : GCCBuiltin<"__builtin_ia32_minps">,
54               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
55                          llvm_v4f32_ty], [IntrNoMem]>;
56   def int_x86_sse_max_ss : GCCBuiltin<"__builtin_ia32_maxss">,
57               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
58                          llvm_v4f32_ty], [IntrNoMem]>;
59   def int_x86_sse_max_ps : GCCBuiltin<"__builtin_ia32_maxps">,
60               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
61                          llvm_v4f32_ty], [IntrNoMem]>;
62 }
63
64 // Comparison ops
65 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
66   def int_x86_sse_cmp_ss :
67               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
68                          llvm_v4f32_ty, llvm_i8_ty], [IntrNoMem]>;
69   def int_x86_sse_cmp_ps :
70               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
71                          llvm_v4f32_ty, llvm_i8_ty], [IntrNoMem]>;
72   def int_x86_sse_comieq_ss : GCCBuiltin<"__builtin_ia32_comieq">,
73               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
74                          llvm_v4f32_ty], [IntrNoMem]>;
75   def int_x86_sse_comilt_ss : GCCBuiltin<"__builtin_ia32_comilt">,
76               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
77                          llvm_v4f32_ty], [IntrNoMem]>;
78   def int_x86_sse_comile_ss : GCCBuiltin<"__builtin_ia32_comile">,
79               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
80                          llvm_v4f32_ty], [IntrNoMem]>;
81   def int_x86_sse_comigt_ss : GCCBuiltin<"__builtin_ia32_comigt">,
82               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
83                          llvm_v4f32_ty], [IntrNoMem]>;
84   def int_x86_sse_comige_ss : GCCBuiltin<"__builtin_ia32_comige">,
85               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
86                          llvm_v4f32_ty], [IntrNoMem]>;
87   def int_x86_sse_comineq_ss : GCCBuiltin<"__builtin_ia32_comineq">,
88               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
89                          llvm_v4f32_ty], [IntrNoMem]>;
90   def int_x86_sse_ucomieq_ss : GCCBuiltin<"__builtin_ia32_ucomieq">,
91               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
92                          llvm_v4f32_ty], [IntrNoMem]>;
93   def int_x86_sse_ucomilt_ss : GCCBuiltin<"__builtin_ia32_ucomilt">,
94               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
95                          llvm_v4f32_ty], [IntrNoMem]>;
96   def int_x86_sse_ucomile_ss : GCCBuiltin<"__builtin_ia32_ucomile">,
97               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
98                          llvm_v4f32_ty], [IntrNoMem]>;
99   def int_x86_sse_ucomigt_ss : GCCBuiltin<"__builtin_ia32_ucomigt">,
100               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
101                          llvm_v4f32_ty], [IntrNoMem]>;
102   def int_x86_sse_ucomige_ss : GCCBuiltin<"__builtin_ia32_ucomige">,
103               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
104                          llvm_v4f32_ty], [IntrNoMem]>;
105   def int_x86_sse_ucomineq_ss : GCCBuiltin<"__builtin_ia32_ucomineq">,
106               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
107                          llvm_v4f32_ty], [IntrNoMem]>;
108 }
109
110
111 // Conversion ops
112 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
113   def int_x86_sse_cvtss2si : GCCBuiltin<"__builtin_ia32_cvtss2si">,
114               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
115   def int_x86_sse_cvtss2si64 : GCCBuiltin<"__builtin_ia32_cvtss2si64">,
116               Intrinsic<[llvm_i64_ty, llvm_v4f32_ty], [IntrNoMem]>;
117   def int_x86_sse_cvttss2si : GCCBuiltin<"__builtin_ia32_cvttss2si">,
118               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
119   def int_x86_sse_cvttss2si64 : GCCBuiltin<"__builtin_ia32_cvttss2si64">,
120               Intrinsic<[llvm_i64_ty, llvm_v4f32_ty], [IntrNoMem]>;
121   def int_x86_sse_cvtsi2ss : GCCBuiltin<"__builtin_ia32_cvtsi2ss">,
122               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
123                          llvm_i32_ty], [IntrNoMem]>;
124   def int_x86_sse_cvtsi642ss : GCCBuiltin<"__builtin_ia32_cvtsi642ss">,
125               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
126                          llvm_i64_ty], [IntrNoMem]>;
127   def int_x86_sse_cvtps2pi : GCCBuiltin<"__builtin_ia32_cvtps2pi">,
128               Intrinsic<[llvm_v2i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
129   def int_x86_sse_cvttps2pi: GCCBuiltin<"__builtin_ia32_cvttps2pi">,
130               Intrinsic<[llvm_v2i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
131   def int_x86_sse_cvtpi2ps : GCCBuiltin<"__builtin_ia32_cvtpi2ps">,
132               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty, 
133                          llvm_v2i32_ty], [IntrNoMem]>;
134 }
135
136 // SIMD load ops
137 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
138   def int_x86_sse_loadu_ps : GCCBuiltin<"__builtin_ia32_loadups">,
139               Intrinsic<[llvm_v4f32_ty, llvm_ptr_ty], [IntrReadMem]>;
140 }
141
142 // SIMD store ops
143 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
144   def int_x86_sse_storeu_ps : GCCBuiltin<"__builtin_ia32_storeups">,
145               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
146                          llvm_v4f32_ty], [IntrWriteMem]>;
147 }
148
149 // Cacheability support ops
150 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
151   def int_x86_sse_movnt_ps : GCCBuiltin<"__builtin_ia32_movntps">,
152               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
153                          llvm_v4f32_ty], [IntrWriteMem]>;
154   def int_x86_sse_sfence : GCCBuiltin<"__builtin_ia32_sfence">,
155               Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
156 }
157
158 // Control register.
159 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
160   def int_x86_sse_stmxcsr :
161               Intrinsic<[llvm_void_ty, llvm_ptr_ty], [IntrWriteMem]>;
162   def int_x86_sse_ldmxcsr :
163               Intrinsic<[llvm_void_ty, llvm_ptr_ty], [IntrWriteMem]>;
164 }
165
166 // Misc.
167 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
168   def int_x86_sse_movmsk_ps : GCCBuiltin<"__builtin_ia32_movmskps">,
169               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
170 }
171
172 //===----------------------------------------------------------------------===//
173 // SSE2
174
175 // FP arithmetic ops
176 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
177   def int_x86_sse2_add_sd : GCCBuiltin<"__builtin_ia32_addsd">,
178               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
179                          llvm_v2f64_ty], [IntrNoMem]>;
180   def int_x86_sse2_sub_sd : GCCBuiltin<"__builtin_ia32_subsd">,
181               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
182                          llvm_v2f64_ty], [IntrNoMem]>;
183   def int_x86_sse2_mul_sd : GCCBuiltin<"__builtin_ia32_mulsd">,
184               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
185                          llvm_v2f64_ty], [IntrNoMem]>;
186   def int_x86_sse2_div_sd : GCCBuiltin<"__builtin_ia32_divsd">,
187               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
188                          llvm_v2f64_ty], [IntrNoMem]>;
189   def int_x86_sse2_sqrt_sd : GCCBuiltin<"__builtin_ia32_sqrtsd">,
190               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
191                         [IntrNoMem]>;
192   def int_x86_sse2_sqrt_pd : GCCBuiltin<"__builtin_ia32_sqrtpd">,
193               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
194                         [IntrNoMem]>;
195   def int_x86_sse2_min_sd : GCCBuiltin<"__builtin_ia32_minsd">,
196               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
197                          llvm_v2f64_ty], [IntrNoMem]>;
198   def int_x86_sse2_min_pd : GCCBuiltin<"__builtin_ia32_minpd">,
199               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
200                          llvm_v2f64_ty], [IntrNoMem]>;
201   def int_x86_sse2_max_sd : GCCBuiltin<"__builtin_ia32_maxsd">,
202               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
203                          llvm_v2f64_ty], [IntrNoMem]>;
204   def int_x86_sse2_max_pd : GCCBuiltin<"__builtin_ia32_maxpd">,
205               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
206                          llvm_v2f64_ty], [IntrNoMem]>;
207 }
208
209 // FP comparison ops
210 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
211   def int_x86_sse2_cmp_sd :
212               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
213                          llvm_v2f64_ty, llvm_i8_ty], [IntrNoMem]>;
214   def int_x86_sse2_cmp_pd :
215               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
216                          llvm_v2f64_ty, llvm_i8_ty], [IntrNoMem]>;
217   def int_x86_sse2_comieq_sd : GCCBuiltin<"__builtin_ia32_comisdeq">,
218               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
219                          llvm_v2f64_ty], [IntrNoMem]>;
220   def int_x86_sse2_comilt_sd : GCCBuiltin<"__builtin_ia32_comisdlt">,
221               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
222                          llvm_v2f64_ty], [IntrNoMem]>;
223   def int_x86_sse2_comile_sd : GCCBuiltin<"__builtin_ia32_comisdle">,
224               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
225                          llvm_v2f64_ty], [IntrNoMem]>;
226   def int_x86_sse2_comigt_sd : GCCBuiltin<"__builtin_ia32_comisdgt">,
227               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
228                          llvm_v2f64_ty], [IntrNoMem]>;
229   def int_x86_sse2_comige_sd : GCCBuiltin<"__builtin_ia32_comisdge">,
230               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
231                          llvm_v2f64_ty], [IntrNoMem]>;
232   def int_x86_sse2_comineq_sd : GCCBuiltin<"__builtin_ia32_comisdneq">,
233               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
234                          llvm_v2f64_ty], [IntrNoMem]>;
235   def int_x86_sse2_ucomieq_sd : GCCBuiltin<"__builtin_ia32_ucomisdeq">,
236               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
237                          llvm_v2f64_ty], [IntrNoMem]>;
238   def int_x86_sse2_ucomilt_sd : GCCBuiltin<"__builtin_ia32_ucomisdlt">,
239               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
240                          llvm_v2f64_ty], [IntrNoMem]>;
241   def int_x86_sse2_ucomile_sd : GCCBuiltin<"__builtin_ia32_ucomisdle">,
242               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
243                          llvm_v2f64_ty], [IntrNoMem]>;
244   def int_x86_sse2_ucomigt_sd : GCCBuiltin<"__builtin_ia32_ucomisdgt">,
245               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
246                          llvm_v2f64_ty], [IntrNoMem]>;
247   def int_x86_sse2_ucomige_sd : GCCBuiltin<"__builtin_ia32_ucomisdge">,
248               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
249                          llvm_v2f64_ty], [IntrNoMem]>;
250   def int_x86_sse2_ucomineq_sd : GCCBuiltin<"__builtin_ia32_ucomisdneq">,
251               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
252                          llvm_v2f64_ty], [IntrNoMem]>;
253 }
254
255 // Integer arithmetic ops.
256 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
257   def int_x86_sse2_padds_b : GCCBuiltin<"__builtin_ia32_paddsb128">,
258               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
259                          llvm_v16i8_ty], [IntrNoMem]>;
260   def int_x86_sse2_padds_w : GCCBuiltin<"__builtin_ia32_paddsw128">,
261               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
262                          llvm_v8i16_ty], [IntrNoMem]>;
263   def int_x86_sse2_paddus_b : GCCBuiltin<"__builtin_ia32_paddusb128">,
264               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
265                          llvm_v16i8_ty], [IntrNoMem]>;
266   def int_x86_sse2_paddus_w : GCCBuiltin<"__builtin_ia32_paddusw128">,
267               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
268                          llvm_v8i16_ty], [IntrNoMem]>;
269   def int_x86_sse2_psubs_b : GCCBuiltin<"__builtin_ia32_psubsb128">,
270               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
271                          llvm_v16i8_ty], [IntrNoMem]>;
272   def int_x86_sse2_psubs_w : GCCBuiltin<"__builtin_ia32_psubsw128">,
273               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
274                          llvm_v8i16_ty], [IntrNoMem]>;
275   def int_x86_sse2_psubus_b : GCCBuiltin<"__builtin_ia32_psubusb128">,
276               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
277                          llvm_v16i8_ty], [IntrNoMem]>;
278   def int_x86_sse2_psubus_w : GCCBuiltin<"__builtin_ia32_psubusw128">,
279               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
280                          llvm_v8i16_ty], [IntrNoMem]>;
281   def int_x86_sse2_pmulhu_w : GCCBuiltin<"__builtin_ia32_pmulhuw128">,
282               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
283                          llvm_v8i16_ty], [IntrNoMem]>;
284   def int_x86_sse2_pmulh_w : GCCBuiltin<"__builtin_ia32_pmulhw128">,
285               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
286                          llvm_v8i16_ty], [IntrNoMem]>;
287   def int_x86_sse2_pmulu_dq : GCCBuiltin<"__builtin_ia32_pmuludq128">,
288               Intrinsic<[llvm_v2i64_ty, llvm_v4i32_ty,
289                          llvm_v4i32_ty], [IntrNoMem]>;
290   def int_x86_sse2_pmadd_wd : GCCBuiltin<"__builtin_ia32_pmaddwd128">,
291               Intrinsic<[llvm_v4i32_ty, llvm_v8i16_ty,
292                          llvm_v8i16_ty], [IntrNoMem]>;
293   def int_x86_sse2_pavg_b : GCCBuiltin<"__builtin_ia32_pavgb128">,
294               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
295                          llvm_v16i8_ty], [IntrNoMem]>;
296   def int_x86_sse2_pavg_w : GCCBuiltin<"__builtin_ia32_pavgw128">,
297               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
298                          llvm_v8i16_ty], [IntrNoMem]>;
299   def int_x86_sse2_pmaxu_b : GCCBuiltin<"__builtin_ia32_pmaxub128">,
300               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
301                          llvm_v16i8_ty], [IntrNoMem]>;
302   def int_x86_sse2_pmaxs_w : GCCBuiltin<"__builtin_ia32_pmaxsw128">,
303               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
304                          llvm_v8i16_ty], [IntrNoMem]>;
305   def int_x86_sse2_pminu_b : GCCBuiltin<"__builtin_ia32_pminub128">,
306               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
307                          llvm_v16i8_ty], [IntrNoMem]>;
308   def int_x86_sse2_pmins_w : GCCBuiltin<"__builtin_ia32_pminsw128">,
309               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
310                          llvm_v8i16_ty], [IntrNoMem]>;
311   def int_x86_sse2_psad_bw : GCCBuiltin<"__builtin_ia32_psadbw128">,
312               Intrinsic<[llvm_v2i64_ty, llvm_v16i8_ty,
313                          llvm_v16i8_ty], [IntrNoMem]>;
314 }
315
316 // Integer shift ops.
317 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
318   def int_x86_sse2_psll_w : GCCBuiltin<"__builtin_ia32_psllw128">,
319               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
320                          llvm_v8i16_ty], [IntrNoMem]>;
321   def int_x86_sse2_psll_d : GCCBuiltin<"__builtin_ia32_pslld128">,
322               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
323                          llvm_v4i32_ty], [IntrNoMem]>;
324   def int_x86_sse2_psll_q : GCCBuiltin<"__builtin_ia32_psllq128">,
325               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
326                          llvm_v2i64_ty], [IntrNoMem]>;
327   def int_x86_sse2_psrl_w : GCCBuiltin<"__builtin_ia32_psrlw128">,
328               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
329                          llvm_v8i16_ty], [IntrNoMem]>;
330   def int_x86_sse2_psrl_d : GCCBuiltin<"__builtin_ia32_psrld128">,
331               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
332                          llvm_v4i32_ty], [IntrNoMem]>;
333   def int_x86_sse2_psrl_q : GCCBuiltin<"__builtin_ia32_psrlq128">,
334               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
335                          llvm_v2i64_ty], [IntrNoMem]>;
336   def int_x86_sse2_psra_w : GCCBuiltin<"__builtin_ia32_psraw128">,
337               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
338                          llvm_v8i16_ty], [IntrNoMem]>;
339   def int_x86_sse2_psra_d : GCCBuiltin<"__builtin_ia32_psrad128">,
340               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
341                          llvm_v4i32_ty], [IntrNoMem]>;
342
343   def int_x86_sse2_pslli_w : GCCBuiltin<"__builtin_ia32_psllwi128">,
344               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
345                          llvm_i32_ty], [IntrNoMem]>;
346   def int_x86_sse2_pslli_d : GCCBuiltin<"__builtin_ia32_pslldi128">,
347               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
348                          llvm_i32_ty], [IntrNoMem]>;
349   def int_x86_sse2_pslli_q : GCCBuiltin<"__builtin_ia32_psllqi128">,
350               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
351                          llvm_i32_ty], [IntrNoMem]>;
352   def int_x86_sse2_psrli_w : GCCBuiltin<"__builtin_ia32_psrlwi128">,
353               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
354                          llvm_i32_ty], [IntrNoMem]>;
355   def int_x86_sse2_psrli_d : GCCBuiltin<"__builtin_ia32_psrldi128">,
356               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
357                          llvm_i32_ty], [IntrNoMem]>;
358   def int_x86_sse2_psrli_q : GCCBuiltin<"__builtin_ia32_psrlqi128">,
359               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
360                          llvm_i32_ty], [IntrNoMem]>;
361   def int_x86_sse2_psrai_w : GCCBuiltin<"__builtin_ia32_psrawi128">,
362               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
363                          llvm_i32_ty], [IntrNoMem]>;
364   def int_x86_sse2_psrai_d : GCCBuiltin<"__builtin_ia32_psradi128">,
365               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
366                          llvm_i32_ty], [IntrNoMem]>;
367
368   def int_x86_sse2_psll_dq : GCCBuiltin<"__builtin_ia32_pslldqi128">,
369               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
370                          llvm_i32_ty], [IntrNoMem]>;
371   def int_x86_sse2_psrl_dq : GCCBuiltin<"__builtin_ia32_psrldqi128">,
372               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
373                          llvm_i32_ty], [IntrNoMem]>;
374 }
375
376 // Integer comparison ops
377 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
378   def int_x86_sse2_pcmpeq_b : GCCBuiltin<"__builtin_ia32_pcmpeqb128">,
379               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
380                          llvm_v16i8_ty], [IntrNoMem]>;
381   def int_x86_sse2_pcmpeq_w : GCCBuiltin<"__builtin_ia32_pcmpeqw128">,
382               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
383                          llvm_v8i16_ty], [IntrNoMem]>;
384   def int_x86_sse2_pcmpeq_d : GCCBuiltin<"__builtin_ia32_pcmpeqd128">,
385               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
386                          llvm_v4i32_ty], [IntrNoMem]>;
387   def int_x86_sse2_pcmpgt_b : GCCBuiltin<"__builtin_ia32_pcmpgtb128">,
388               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
389                          llvm_v16i8_ty], [IntrNoMem]>;
390   def int_x86_sse2_pcmpgt_w : GCCBuiltin<"__builtin_ia32_pcmpgtw128">,
391               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
392                          llvm_v8i16_ty], [IntrNoMem]>;
393   def int_x86_sse2_pcmpgt_d : GCCBuiltin<"__builtin_ia32_pcmpgtd128">,
394               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
395                          llvm_v4i32_ty], [IntrNoMem]>;
396 }
397
398 // Conversion ops
399 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
400   def int_x86_sse2_cvtdq2pd : GCCBuiltin<"__builtin_ia32_cvtdq2pd">,
401               Intrinsic<[llvm_v2f64_ty, llvm_v4i32_ty], [IntrNoMem]>;
402   def int_x86_sse2_cvtdq2ps : GCCBuiltin<"__builtin_ia32_cvtdq2ps">,
403               Intrinsic<[llvm_v4f32_ty, llvm_v4i32_ty], [IntrNoMem]>;
404   def int_x86_sse2_cvtpd2dq : GCCBuiltin<"__builtin_ia32_cvtpd2dq">,
405               Intrinsic<[llvm_v4i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
406   def int_x86_sse2_cvttpd2dq : GCCBuiltin<"__builtin_ia32_cvttpd2dq">,
407               Intrinsic<[llvm_v4i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
408   def int_x86_sse2_cvtpd2ps : GCCBuiltin<"__builtin_ia32_cvtpd2ps">,
409               Intrinsic<[llvm_v4f32_ty, llvm_v2f64_ty], [IntrNoMem]>;
410   def int_x86_sse2_cvtps2dq : GCCBuiltin<"__builtin_ia32_cvtps2dq">,
411               Intrinsic<[llvm_v4i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
412   def int_x86_sse2_cvttps2dq : GCCBuiltin<"__builtin_ia32_cvttps2dq">,
413               Intrinsic<[llvm_v4i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
414   def int_x86_sse2_cvtps2pd : GCCBuiltin<"__builtin_ia32_cvtps2pd">,
415               Intrinsic<[llvm_v2f64_ty, llvm_v4f32_ty], [IntrNoMem]>;
416   def int_x86_sse2_cvtsd2si : GCCBuiltin<"__builtin_ia32_cvtsd2si">,
417               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
418   def int_x86_sse2_cvtsd2si64 : GCCBuiltin<"__builtin_ia32_cvtsd2si64">,
419               Intrinsic<[llvm_i64_ty, llvm_v2f64_ty], [IntrNoMem]>;
420   def int_x86_sse2_cvttsd2si : GCCBuiltin<"__builtin_ia32_cvttsd2si">,
421               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
422   def int_x86_sse2_cvttsd2si64 : GCCBuiltin<"__builtin_ia32_cvttsd2si64">,
423               Intrinsic<[llvm_i64_ty, llvm_v2f64_ty], [IntrNoMem]>;
424   def int_x86_sse2_cvtsi2sd : GCCBuiltin<"__builtin_ia32_cvtsi2sd">,
425               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
426                          llvm_i32_ty], [IntrNoMem]>;
427   def int_x86_sse2_cvtsi642sd : GCCBuiltin<"__builtin_ia32_cvtsi642sd">,
428               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
429                          llvm_i64_ty], [IntrNoMem]>;
430   def int_x86_sse2_cvtsd2ss : GCCBuiltin<"__builtin_ia32_cvtsd2ss">,
431               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
432                          llvm_v2f64_ty], [IntrNoMem]>;
433   def int_x86_sse2_cvtss2sd : GCCBuiltin<"__builtin_ia32_cvtss2sd">,
434               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
435                          llvm_v4f32_ty], [IntrNoMem]>;
436   def int_x86_sse_cvtpd2pi : GCCBuiltin<"__builtin_ia32_cvtpd2pi">,
437               Intrinsic<[llvm_v2i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
438   def int_x86_sse_cvttpd2pi: GCCBuiltin<"__builtin_ia32_cvttpd2pi">,
439               Intrinsic<[llvm_v2i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
440   def int_x86_sse_cvtpi2pd : GCCBuiltin<"__builtin_ia32_cvtpi2pd">,
441               Intrinsic<[llvm_v2f64_ty, llvm_v2i32_ty], [IntrNoMem]>;
442 }
443
444 // SIMD load ops
445 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
446   def int_x86_sse2_loadu_pd : GCCBuiltin<"__builtin_ia32_loadupd">,
447               Intrinsic<[llvm_v2f64_ty, llvm_ptr_ty], [IntrReadMem]>;
448   def int_x86_sse2_loadu_dq : GCCBuiltin<"__builtin_ia32_loaddqu">,
449               Intrinsic<[llvm_v16i8_ty, llvm_ptr_ty], [IntrReadMem]>;
450 }
451
452 // SIMD store ops
453 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
454   def int_x86_sse2_storeu_pd : GCCBuiltin<"__builtin_ia32_storeupd">,
455               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
456                          llvm_v2f64_ty], [IntrWriteMem]>;
457   def int_x86_sse2_storeu_dq : GCCBuiltin<"__builtin_ia32_storedqu">,
458               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
459                          llvm_v16i8_ty], [IntrWriteMem]>;
460   def int_x86_sse2_storel_dq : GCCBuiltin<"__builtin_ia32_storelv4si">,
461               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
462                          llvm_v4i32_ty], [IntrWriteMem]>;
463 }
464
465 // Cacheability support ops
466 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
467   def int_x86_sse2_movnt_dq : GCCBuiltin<"__builtin_ia32_movntdq">,
468               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
469                          llvm_v2i64_ty], [IntrWriteMem]>;
470   def int_x86_sse2_movnt_pd : GCCBuiltin<"__builtin_ia32_movntpd">,
471               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
472                          llvm_v2f64_ty], [IntrWriteMem]>;
473   def int_x86_sse2_movnt_i : GCCBuiltin<"__builtin_ia32_movnti">,
474               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
475                          llvm_i32_ty], [IntrWriteMem]>;
476 }
477
478 // Misc.
479 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
480   def int_x86_sse2_packsswb_128 : GCCBuiltin<"__builtin_ia32_packsswb128">,
481               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
482                          llvm_v8i16_ty], [IntrNoMem]>;
483   def int_x86_sse2_packssdw_128 : GCCBuiltin<"__builtin_ia32_packssdw128">,
484               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
485                          llvm_v4i32_ty], [IntrNoMem]>;
486   def int_x86_sse2_packuswb_128 : GCCBuiltin<"__builtin_ia32_packuswb128">,
487               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
488                          llvm_v8i16_ty], [IntrNoMem]>;
489   def int_x86_sse2_movmsk_pd : GCCBuiltin<"__builtin_ia32_movmskpd">,
490               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
491   def int_x86_sse2_pmovmskb_128 : GCCBuiltin<"__builtin_ia32_pmovmskb128">,
492               Intrinsic<[llvm_i32_ty, llvm_v16i8_ty], [IntrNoMem]>;
493   def int_x86_sse2_maskmov_dqu : GCCBuiltin<"__builtin_ia32_maskmovdqu">,
494               Intrinsic<[llvm_void_ty, llvm_v16i8_ty,
495                          llvm_v16i8_ty, llvm_ptr_ty], [IntrWriteMem]>;
496   def int_x86_sse2_clflush : GCCBuiltin<"__builtin_ia32_clflush">,
497               Intrinsic<[llvm_void_ty, llvm_ptr_ty], [IntrWriteMem]>;
498   def int_x86_sse2_lfence : GCCBuiltin<"__builtin_ia32_lfence">,
499               Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
500   def int_x86_sse2_mfence : GCCBuiltin<"__builtin_ia32_mfence">,
501               Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
502 }
503
504 //===----------------------------------------------------------------------===//
505 // SSE3
506
507 // Addition / subtraction ops.
508 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
509   def int_x86_sse3_addsub_ps : GCCBuiltin<"__builtin_ia32_addsubps">,
510               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
511                          llvm_v4f32_ty], [IntrNoMem]>;
512   def int_x86_sse3_addsub_pd : GCCBuiltin<"__builtin_ia32_addsubpd">,
513               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
514                          llvm_v2f64_ty], [IntrNoMem]>;
515 }
516
517 // Horizontal ops.
518 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
519   def int_x86_sse3_hadd_ps : GCCBuiltin<"__builtin_ia32_haddps">,
520               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
521                          llvm_v4f32_ty], [IntrNoMem]>;
522   def int_x86_sse3_hadd_pd : GCCBuiltin<"__builtin_ia32_haddpd">,
523               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
524                          llvm_v2f64_ty], [IntrNoMem]>;
525   def int_x86_sse3_hsub_ps : GCCBuiltin<"__builtin_ia32_hsubps">,
526               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
527                          llvm_v4f32_ty], [IntrNoMem]>;
528   def int_x86_sse3_hsub_pd : GCCBuiltin<"__builtin_ia32_hsubpd">,
529               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
530                          llvm_v2f64_ty], [IntrNoMem]>;
531 }
532
533 // Specialized unaligned load.
534 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
535   def int_x86_sse3_ldu_dq : GCCBuiltin<"__builtin_ia32_lddqu">,
536               Intrinsic<[llvm_v16i8_ty, llvm_ptr_ty], [IntrReadMem]>;
537 }
538
539 // Thread synchronization ops.
540 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
541   def int_x86_sse3_monitor : GCCBuiltin<"__builtin_ia32_monitor">,
542               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
543                          llvm_i32_ty, llvm_i32_ty], [IntrWriteMem]>;
544   def int_x86_sse3_mwait : GCCBuiltin<"__builtin_ia32_mwait">,
545               Intrinsic<[llvm_void_ty, llvm_i32_ty,
546                          llvm_i32_ty], [IntrWriteMem]>;
547 }
548
549 //===----------------------------------------------------------------------===//
550 // SSSE3
551
552 // Horizontal arithmetic ops
553 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
554   def int_x86_ssse3_phadd_w         : GCCBuiltin<"__builtin_ia32_phaddw">,
555               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
556                          llvm_v4i16_ty], [IntrNoMem]>;
557   def int_x86_ssse3_phadd_w_128     : GCCBuiltin<"__builtin_ia32_phaddw128">,
558               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
559                          llvm_v8i16_ty], [IntrNoMem]>;
560
561   def int_x86_ssse3_phadd_d         : GCCBuiltin<"__builtin_ia32_phaddd">,
562               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
563                          llvm_v2i32_ty], [IntrNoMem]>;
564   def int_x86_ssse3_phadd_d_128     : GCCBuiltin<"__builtin_ia32_phaddd128">,
565               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
566                          llvm_v4i32_ty], [IntrNoMem]>;
567
568   def int_x86_ssse3_phadd_sw        : GCCBuiltin<"__builtin_ia32_phaddsw">,
569               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
570                          llvm_v4i16_ty], [IntrNoMem]>;
571   def int_x86_ssse3_phadd_sw_128    : GCCBuiltin<"__builtin_ia32_phaddsw128">,
572               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
573                          llvm_v4i32_ty], [IntrNoMem]>;
574
575   def int_x86_ssse3_phsub_w         : GCCBuiltin<"__builtin_ia32_phsubw">,
576               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
577                          llvm_v4i16_ty], [IntrNoMem]>;
578   def int_x86_ssse3_phsub_w_128     : GCCBuiltin<"__builtin_ia32_phsubw128">,
579               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
580                          llvm_v8i16_ty], [IntrNoMem]>;
581
582   def int_x86_ssse3_phsub_d         : GCCBuiltin<"__builtin_ia32_phsubd">,
583               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
584                          llvm_v2i32_ty], [IntrNoMem]>;
585   def int_x86_ssse3_phsub_d_128     : GCCBuiltin<"__builtin_ia32_phsubd128">,
586               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
587                          llvm_v4i32_ty], [IntrNoMem]>;
588
589   def int_x86_ssse3_phsub_sw        : GCCBuiltin<"__builtin_ia32_phsubsw">,
590               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
591                          llvm_v4i16_ty], [IntrNoMem]>;
592   def int_x86_ssse3_phsub_sw_128    : GCCBuiltin<"__builtin_ia32_phsubsw128">,
593               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
594                          llvm_v8i16_ty], [IntrNoMem]>;
595
596   def int_x86_ssse3_pmadd_ub_sw     : GCCBuiltin<"__builtin_ia32_pmaddubsw">,
597               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
598                          llvm_v4i16_ty], [IntrNoMem]>;
599   def int_x86_ssse3_pmadd_ub_sw_128 : GCCBuiltin<"__builtin_ia32_pmaddubsw128">,
600               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
601                          llvm_v8i16_ty], [IntrNoMem]>;
602
603   def int_x86_ssse3_pmul_hr_sw      : GCCBuiltin<"__builtin_ia32_pmulhrsw">,
604               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
605                          llvm_v4i16_ty], [IntrNoMem]>;
606   def int_x86_ssse3_pmul_hr_sw_128  : GCCBuiltin<"__builtin_ia32_pmulhrsw128">,
607               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
608                          llvm_v8i16_ty], [IntrNoMem]>;
609 }
610
611 // Shuffle ops
612 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
613   def int_x86_ssse3_pshuf_b         : GCCBuiltin<"__builtin_ia32_pshufb">,
614               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
615                          llvm_v8i8_ty], [IntrNoMem]>;
616   def int_x86_ssse3_pshuf_b_128     : GCCBuiltin<"__builtin_ia32_pshufb128">,
617               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
618                          llvm_v16i8_ty], [IntrNoMem]>;
619 }
620
621 // Sign ops
622 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
623   def int_x86_ssse3_psign_b         : GCCBuiltin<"__builtin_ia32_psignb">,
624               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
625                          llvm_v8i8_ty], [IntrNoMem]>;
626   def int_x86_ssse3_psign_b_128     : GCCBuiltin<"__builtin_ia32_psignb128">,
627               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
628                          llvm_v16i8_ty], [IntrNoMem]>;
629
630   def int_x86_ssse3_psign_w         : GCCBuiltin<"__builtin_ia32_psignw">,
631               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
632                          llvm_v4i16_ty], [IntrNoMem]>;
633   def int_x86_ssse3_psign_w_128     : GCCBuiltin<"__builtin_ia32_psignw128">,
634               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
635                          llvm_v8i16_ty], [IntrNoMem]>;
636
637   def int_x86_ssse3_psign_d         : GCCBuiltin<"__builtin_ia32_psignd">,
638               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
639                          llvm_v2i32_ty], [IntrNoMem]>;
640   def int_x86_ssse3_psign_d_128     : GCCBuiltin<"__builtin_ia32_psignd128">,
641               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
642                          llvm_v4i32_ty], [IntrNoMem]>;
643 }
644
645 // Absolute value ops
646 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
647   def int_x86_ssse3_pabs_b     : GCCBuiltin<"__builtin_ia32_pabsb">,
648               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty], [IntrNoMem]>;
649   def int_x86_ssse3_pabs_b_128 : GCCBuiltin<"__builtin_ia32_pabsb128">,
650               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty], [IntrNoMem]>;
651
652   def int_x86_ssse3_pabs_w     : GCCBuiltin<"__builtin_ia32_pabsw">,
653               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty], [IntrNoMem]>;
654   def int_x86_ssse3_pabs_w_128 : GCCBuiltin<"__builtin_ia32_pabsw128">,
655               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty], [IntrNoMem]>;
656
657   def int_x86_ssse3_pabs_d     : GCCBuiltin<"__builtin_ia32_pabsd">,
658               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty], [IntrNoMem]>;
659   def int_x86_ssse3_pabs_d_128 : GCCBuiltin<"__builtin_ia32_pabsd128">,
660               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty], [IntrNoMem]>;
661 }
662
663 // Align ops
664 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
665   def int_x86_ssse3_palign_r        : GCCBuiltin<"__builtin_ia32_palignr">,
666               Intrinsic<[llvm_v1i64_ty, llvm_v1i64_ty,
667                          llvm_v1i64_ty, llvm_i16_ty], [IntrNoMem]>;
668   def int_x86_ssse3_palign_r_128    : GCCBuiltin<"__builtin_ia32_palignr128">,
669               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
670                          llvm_v2i64_ty, llvm_i32_ty], [IntrNoMem]>;
671 }
672
673 //===----------------------------------------------------------------------===//
674 // SSE4.1
675
676 // FP rounding ops
677 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
678   def int_x86_sse41_round_ss        : GCCBuiltin<"__builtin_ia32_roundss">,
679               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
680                          llvm_i32_ty], [IntrNoMem]>;
681   def int_x86_sse41_round_ps        : GCCBuiltin<"__builtin_ia32_roundps">,
682               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
683                          llvm_i32_ty], [IntrNoMem]>;
684   def int_x86_sse41_round_sd        : GCCBuiltin<"__builtin_ia32_roundsd">,
685               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
686                          llvm_i32_ty], [IntrNoMem]>;
687   def int_x86_sse41_round_pd        : GCCBuiltin<"__builtin_ia32_roundpd">,
688               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
689                          llvm_i32_ty], [IntrNoMem]>;
690 }
691
692 // Vector sign and zero extend
693 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
694   def int_x86_sse41_pmovsxbd        : GCCBuiltin<"__builtin_ia32_pmovsxbd128">,
695               Intrinsic<[llvm_v4i32_ty, llvm_v16i8_ty]>;
696   def int_x86_sse41_pmovsxbq        : GCCBuiltin<"__builtin_ia32_pmovsxbq128">,
697               Intrinsic<[llvm_v2i64_ty, llvm_v16i8_ty]>;
698   def int_x86_sse41_pmovsxbw        : GCCBuiltin<"__builtin_ia32_pmovsxbw128">,
699               Intrinsic<[llvm_v8i16_ty, llvm_v16i8_ty]>;
700   def int_x86_sse41_pmovsxdq        : GCCBuiltin<"__builtin_ia32_pmovsxdq128">,
701               Intrinsic<[llvm_v2i64_ty, llvm_v4i32_ty]>;
702   def int_x86_sse41_pmovsxwd        : GCCBuiltin<"__builtin_ia32_pmovsxwd128">,
703               Intrinsic<[llvm_v4i32_ty, llvm_v8i16_ty]>;
704   def int_x86_sse41_pmovsxwq        : GCCBuiltin<"__builtin_ia32_pmovsxwq128">,
705               Intrinsic<[llvm_v2i64_ty, llvm_v8i16_ty]>;
706   def int_x86_sse41_pmovzxbd        : GCCBuiltin<"__builtin_ia32_pmovzxbd128">,
707               Intrinsic<[llvm_v4i32_ty, llvm_v16i8_ty]>;
708   def int_x86_sse41_pmovzxbq        : GCCBuiltin<"__builtin_ia32_pmovzxbq128">,
709               Intrinsic<[llvm_v2i64_ty, llvm_v16i8_ty]>;
710   def int_x86_sse41_pmovzxbw        : GCCBuiltin<"__builtin_ia32_pmovzxbw128">,
711               Intrinsic<[llvm_v8i16_ty, llvm_v16i8_ty]>;
712   def int_x86_sse41_pmovzxdq        : GCCBuiltin<"__builtin_ia32_pmovzxdq128">,
713               Intrinsic<[llvm_v2i64_ty, llvm_v4i32_ty]>;
714   def int_x86_sse41_pmovzxwd        : GCCBuiltin<"__builtin_ia32_pmovzxwd128">,
715               Intrinsic<[llvm_v4i32_ty, llvm_v8i16_ty]>;
716   def int_x86_sse41_pmovzxwq        : GCCBuiltin<"__builtin_ia32_pmovzxwq128">,
717               Intrinsic<[llvm_v2i64_ty, llvm_v8i16_ty]>;
718 }
719
720 // Vector min element
721 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
722   def int_x86_sse41_phminposuw     : GCCBuiltin<"__builtin_ia32_phminposuw128">,
723               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty]>;
724 }
725
726 // Vector compare, min, max
727 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
728   def int_x86_sse41_pcmpeqq         : GCCBuiltin<"__builtin_ia32_pcmpeqq">,
729               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty, llvm_v2i64_ty]>;
730   def int_x86_sse41_pmaxsb          : GCCBuiltin<"__builtin_ia32_pmaxsb128">,
731               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty, llvm_v16i8_ty]>;
732   def int_x86_sse41_pmaxsd          : GCCBuiltin<"__builtin_ia32_pmaxsd128">,
733               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty, llvm_v4i32_ty]>;
734   def int_x86_sse41_pmaxud          : GCCBuiltin<"__builtin_ia32_pmaxud128">,
735               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty, llvm_v4i32_ty]>;
736   def int_x86_sse41_pmaxuw          : GCCBuiltin<"__builtin_ia32_pmaxuw128">,
737               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty, llvm_v8i16_ty]>;
738   def int_x86_sse41_pminsb          : GCCBuiltin<"__builtin_ia32_pminsb128">,
739               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty, llvm_v16i8_ty]>;
740   def int_x86_sse41_pminsd          : GCCBuiltin<"__builtin_ia32_pminsd128">,
741               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty, llvm_v4i32_ty]>;
742   def int_x86_sse41_pminud          : GCCBuiltin<"__builtin_ia32_pminud128">,
743               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty, llvm_v4i32_ty]>;
744   def int_x86_sse41_pminuw          : GCCBuiltin<"__builtin_ia32_pminuw128">,
745               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty, llvm_v8i16_ty]>;
746 }
747
748 // Vector pack
749 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
750   def int_x86_sse41_packusdw        : GCCBuiltin<"__builtin_ia32_packusdw128">,
751               Intrinsic<[llvm_v8i16_ty, llvm_v4i32_ty, llvm_v4i32_ty]>;
752 }
753
754 // Vector multiply
755 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
756   def int_x86_sse41_pmuldq          : GCCBuiltin<"__builtin_ia32_pmuldq128">,
757               Intrinsic<[llvm_v2i64_ty, llvm_v4i32_ty, llvm_v4i32_ty]>;
758   def int_x86_sse41_pmulld          : GCCBuiltin<"__builtin_ia32_pmulld128">,
759               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty, llvm_v4i32_ty]>;
760 }
761
762 // Vector extract
763 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
764   def int_x86_sse41_pextrb         :
765               Intrinsic<[llvm_i32_ty, llvm_v16i8_ty, llvm_i32_ty]>;
766   def int_x86_sse41_pextrd         :
767               Intrinsic<[llvm_i32_ty, llvm_v4i32_ty, llvm_i32_ty]>;
768   def int_x86_sse41_pextrq         :
769               Intrinsic<[llvm_i64_ty, llvm_v2i64_ty, llvm_i32_ty]>;
770   def int_x86_sse41_extractps      : GCCBuiltin<"__builtin_ia32_extractps128">,
771               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty, llvm_i32_ty]>;
772 }
773
774 // Vector insert
775 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
776   def int_x86_sse41_pinsrb         : GCCBuiltin<"__builtin_ia32_vec_set_v16qi">,
777           Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty, llvm_i32_ty, llvm_i32_ty]>;
778   def int_x86_sse41_pinsrd         : GCCBuiltin<"__builtin_ia32_vec_set_v4si">,
779           Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty, llvm_i32_ty, llvm_i32_ty]>;
780   def int_x86_sse41_pinsrq         : GCCBuiltin<"__builtin_ia32_vec_set_v2di">,
781           Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty, llvm_i64_ty, llvm_i32_ty]>;
782   def int_x86_sse41_insertps       : GCCBuiltin<"__builtin_ia32_insertps128">,
783           Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty, llvm_i32_ty]>;
784 }
785
786 // Vector blend
787 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
788   def int_x86_sse41_pblendvb         : GCCBuiltin<"__builtin_ia32_pblendvb128">,
789         Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty, llvm_v16i8_ty, llvm_v16i8_ty]>;
790   def int_x86_sse41_pblendw          : GCCBuiltin<"__builtin_ia32_pblendw128">,
791         Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty, llvm_v8i16_ty, llvm_i32_ty]>;
792   def int_x86_sse41_blendpd          : GCCBuiltin<"__builtin_ia32_blendpd">,
793         Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty, llvm_v2f64_ty, llvm_i32_ty]>;
794   def int_x86_sse41_blendps          : GCCBuiltin<"__builtin_ia32_blendps">,
795         Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty, llvm_i32_ty]>;
796   def int_x86_sse41_blendvpd         : GCCBuiltin<"__builtin_ia32_blendvpd">,
797         Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty, llvm_v2f64_ty, llvm_v2f64_ty]>;
798   def int_x86_sse41_blendvps         : GCCBuiltin<"__builtin_ia32_blendvps">,
799         Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty]>;
800 }
801
802 // Vector dot product
803 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
804   def int_x86_sse41_dppd            : GCCBuiltin<"__builtin_ia32_dppd">,
805           Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty, llvm_v2f64_ty, llvm_i32_ty]>;
806   def int_x86_sse41_dpps            : GCCBuiltin<"__builtin_ia32_dpps">,
807           Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty, llvm_i32_ty]>;
808 }
809
810 // Vector sum of absolute differences
811 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
812   def int_x86_sse41_mpsadbw         : GCCBuiltin<"__builtin_ia32_mpsadbw128">,
813           Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty, llvm_v16i8_ty, llvm_i32_ty]>;
814 }
815
816 // Vector sum of absolute differences
817 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
818   def int_x86_sse41_movntdqa        : GCCBuiltin<"__builtin_ia32_movntdqa">,
819           Intrinsic<[llvm_v2i64_ty, llvm_ptr_ty], [IntrReadMem]>;
820 }
821
822
823 //===----------------------------------------------------------------------===//
824 // MMX
825
826 // Empty MMX state op.
827 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
828   def int_x86_mmx_emms  : GCCBuiltin<"__builtin_ia32_emms">,
829               Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
830   def int_x86_mmx_femms : GCCBuiltin<"__builtin_ia32_femms">,
831               Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
832 }
833
834 // Integer arithmetic ops.
835 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
836   // Addition
837   def int_x86_mmx_padds_b : GCCBuiltin<"__builtin_ia32_paddsb">,
838               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
839                          llvm_v8i8_ty], [IntrNoMem]>;
840   def int_x86_mmx_padds_w : GCCBuiltin<"__builtin_ia32_paddsw">,
841               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
842                          llvm_v4i16_ty], [IntrNoMem]>;
843
844   def int_x86_mmx_paddus_b : GCCBuiltin<"__builtin_ia32_paddusb">,
845               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
846                          llvm_v8i8_ty], [IntrNoMem]>;
847   def int_x86_mmx_paddus_w : GCCBuiltin<"__builtin_ia32_paddusw">,
848               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
849                          llvm_v4i16_ty], [IntrNoMem]>;
850
851   // Subtraction
852   def int_x86_mmx_psubs_b : GCCBuiltin<"__builtin_ia32_psubsb">,
853               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
854                          llvm_v8i8_ty], [IntrNoMem]>;
855   def int_x86_mmx_psubs_w : GCCBuiltin<"__builtin_ia32_psubsw">,
856               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
857                          llvm_v4i16_ty], [IntrNoMem]>;
858
859   def int_x86_mmx_psubus_b : GCCBuiltin<"__builtin_ia32_psubusb">,
860               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
861                          llvm_v8i8_ty], [IntrNoMem]>;
862   def int_x86_mmx_psubus_w : GCCBuiltin<"__builtin_ia32_psubusw">,
863               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
864                          llvm_v4i16_ty], [IntrNoMem]>;
865
866   // Multiplication
867   def int_x86_mmx_pmulh_w : GCCBuiltin<"__builtin_ia32_pmulhw">,
868               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
869                          llvm_v4i16_ty], [IntrNoMem]>;
870   def int_x86_mmx_pmulhu_w : GCCBuiltin<"__builtin_ia32_pmulhuw">,
871               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
872                          llvm_v4i16_ty], [IntrNoMem]>;
873   def int_x86_mmx_pmulu_dq : GCCBuiltin<"__builtin_ia32_pmuludq">,
874               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
875                          llvm_v2i32_ty], [IntrNoMem]>;
876   def int_x86_mmx_pmadd_wd : GCCBuiltin<"__builtin_ia32_pmaddwd">,
877               Intrinsic<[llvm_v2i32_ty, llvm_v4i16_ty,
878                          llvm_v4i16_ty], [IntrNoMem]>;
879
880   // Averages
881   def int_x86_mmx_pavg_b : GCCBuiltin<"__builtin_ia32_pavgb">,
882               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
883                          llvm_v8i8_ty], [IntrNoMem]>;
884   def int_x86_mmx_pavg_w : GCCBuiltin<"__builtin_ia32_pavgw">,
885               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
886                          llvm_v4i16_ty], [IntrNoMem]>;
887
888   // Maximum
889   def int_x86_mmx_pmaxu_b : GCCBuiltin<"__builtin_ia32_pmaxub">,
890               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
891                          llvm_v8i8_ty], [IntrNoMem]>;
892   def int_x86_mmx_pmaxs_w : GCCBuiltin<"__builtin_ia32_pmaxsw">,
893               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
894                          llvm_v4i16_ty], [IntrNoMem]>;
895
896   // Minimum
897   def int_x86_mmx_pminu_b : GCCBuiltin<"__builtin_ia32_pminub">,
898               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
899                          llvm_v8i8_ty], [IntrNoMem]>;
900   def int_x86_mmx_pmins_w : GCCBuiltin<"__builtin_ia32_pminsw">,
901               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
902                          llvm_v4i16_ty], [IntrNoMem]>;
903
904   // Packed sum of absolute differences
905   def int_x86_mmx_psad_bw : GCCBuiltin<"__builtin_ia32_psadbw">,
906               Intrinsic<[llvm_v4i16_ty, llvm_v8i8_ty,
907                          llvm_v8i8_ty], [IntrNoMem]>;
908 }
909
910 // Integer shift ops.
911 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
912   // Shift left logical
913   def int_x86_mmx_psll_w : GCCBuiltin<"__builtin_ia32_psllw">,
914               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
915                          llvm_v1i64_ty], [IntrNoMem]>;
916   def int_x86_mmx_psll_d : GCCBuiltin<"__builtin_ia32_pslld">,
917               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
918                          llvm_v1i64_ty], [IntrNoMem]>;
919   def int_x86_mmx_psll_q : GCCBuiltin<"__builtin_ia32_psllq">,
920               Intrinsic<[llvm_v1i64_ty, llvm_v1i64_ty,
921                          llvm_v1i64_ty], [IntrNoMem]>;
922
923   def int_x86_mmx_psrl_w : GCCBuiltin<"__builtin_ia32_psrlw">,
924               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
925                          llvm_v1i64_ty], [IntrNoMem]>;
926   def int_x86_mmx_psrl_d : GCCBuiltin<"__builtin_ia32_psrld">,
927               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
928                          llvm_v1i64_ty], [IntrNoMem]>;
929   def int_x86_mmx_psrl_q : GCCBuiltin<"__builtin_ia32_psrlq">,
930               Intrinsic<[llvm_v1i64_ty,   llvm_v1i64_ty,
931                          llvm_v1i64_ty], [IntrNoMem]>;
932
933   def int_x86_mmx_psra_w : GCCBuiltin<"__builtin_ia32_psraw">,
934               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
935                          llvm_v1i64_ty], [IntrNoMem]>;
936   def int_x86_mmx_psra_d : GCCBuiltin<"__builtin_ia32_psrad">,
937               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
938                          llvm_v1i64_ty], [IntrNoMem]>;
939
940   def int_x86_mmx_pslli_w : GCCBuiltin<"__builtin_ia32_psllwi">,
941               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
942                          llvm_i32_ty], [IntrNoMem]>;
943   def int_x86_mmx_pslli_d : GCCBuiltin<"__builtin_ia32_pslldi">,
944               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
945                          llvm_i32_ty], [IntrNoMem]>;
946   def int_x86_mmx_pslli_q : GCCBuiltin<"__builtin_ia32_psllqi">,
947               Intrinsic<[llvm_v1i64_ty, llvm_v1i64_ty,
948                          llvm_i32_ty], [IntrNoMem]>;
949
950   def int_x86_mmx_psrli_w : GCCBuiltin<"__builtin_ia32_psrlwi">,
951               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
952                          llvm_i32_ty], [IntrNoMem]>;
953   def int_x86_mmx_psrli_d : GCCBuiltin<"__builtin_ia32_psrldi">,
954               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
955                          llvm_i32_ty], [IntrNoMem]>;
956   def int_x86_mmx_psrli_q : GCCBuiltin<"__builtin_ia32_psrlqi">,
957               Intrinsic<[llvm_v1i64_ty,   llvm_v1i64_ty,
958                          llvm_i32_ty], [IntrNoMem]>;
959
960   def int_x86_mmx_psrai_w : GCCBuiltin<"__builtin_ia32_psrawi">,
961               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
962                          llvm_i32_ty], [IntrNoMem]>;
963   def int_x86_mmx_psrai_d : GCCBuiltin<"__builtin_ia32_psradi">,
964               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
965                          llvm_i32_ty], [IntrNoMem]>;
966 }
967
968 // Pack ops.
969 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
970   def int_x86_mmx_packsswb : GCCBuiltin<"__builtin_ia32_packsswb">,
971               Intrinsic<[llvm_v8i8_ty, llvm_v4i16_ty,
972                          llvm_v4i16_ty], [IntrNoMem]>;
973   def int_x86_mmx_packssdw : GCCBuiltin<"__builtin_ia32_packssdw">,
974               Intrinsic<[llvm_v4i16_ty, llvm_v2i32_ty,
975                          llvm_v2i32_ty], [IntrNoMem]>;
976   def int_x86_mmx_packuswb : GCCBuiltin<"__builtin_ia32_packuswb">,
977               Intrinsic<[llvm_v8i8_ty, llvm_v4i16_ty,
978                          llvm_v4i16_ty], [IntrNoMem]>;
979 }
980
981 // Integer comparison ops
982 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
983   def int_x86_mmx_pcmpeq_b : GCCBuiltin<"__builtin_ia32_pcmpeqb">,
984               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
985                          llvm_v8i8_ty], [IntrNoMem]>;
986   def int_x86_mmx_pcmpeq_w : GCCBuiltin<"__builtin_ia32_pcmpeqw">,
987               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
988                          llvm_v4i16_ty], [IntrNoMem]>;
989   def int_x86_mmx_pcmpeq_d : GCCBuiltin<"__builtin_ia32_pcmpeqd">,
990               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
991                          llvm_v2i32_ty], [IntrNoMem]>;
992
993   def int_x86_mmx_pcmpgt_b : GCCBuiltin<"__builtin_ia32_pcmpgtb">,
994               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
995                          llvm_v8i8_ty], [IntrNoMem]>;
996   def int_x86_mmx_pcmpgt_w : GCCBuiltin<"__builtin_ia32_pcmpgtw">,
997               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
998                          llvm_v4i16_ty], [IntrNoMem]>;
999   def int_x86_mmx_pcmpgt_d : GCCBuiltin<"__builtin_ia32_pcmpgtd">,
1000               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
1001                          llvm_v2i32_ty], [IntrNoMem]>;
1002 }
1003
1004 // Misc.
1005 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
1006   def int_x86_mmx_maskmovq : GCCBuiltin<"__builtin_ia32_maskmovq">,
1007               Intrinsic<[llvm_void_ty, llvm_v8i8_ty, llvm_v8i8_ty, llvm_ptr_ty],
1008                         [IntrWriteMem]>;
1009
1010   def int_x86_mmx_pmovmskb : GCCBuiltin<"__builtin_ia32_pmovmskb">,
1011               Intrinsic<[llvm_i32_ty, llvm_v8i8_ty], [IntrNoMem]>;
1012
1013   def int_x86_mmx_movnt_dq : GCCBuiltin<"__builtin_ia32_movntq">,
1014               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
1015                          llvm_v1i64_ty], [IntrWriteMem]>;
1016 }