include/llvm/IntrinsicsX86.td

   1 //===- IntrinsicsX86.td - Defines X86 intrinsics -----------*- tablegen -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file was developed by Chris Lattner and is distributed under the
   6 // University of Illinois Open Source License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file defines all of the X86-specific intrinsics.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14
  15 //===----------------------------------------------------------------------===//
  16 // SSE1
  17
  18 // Arithmetic ops
  19 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
  20   def int_x86_sse_add_ss : GCCBuiltin<"__builtin_ia32_addss">,
  21               Intrinsic<[llvm_float_ty, llvm_float_ty,
  22                          llvm_float_ty], [InstrNoMem]>;
  23   def int_x86_sse_add_ps : GCCBuiltin<"__builtin_ia32_addps">,
  24               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  25                          llvm_v4f32_ty], [InstrNoMem]>;
  26   def int_x86_sse_sub_ss : GCCBuiltin<"__builtin_ia32_subss">,
  27               Intrinsic<[llvm_float_ty, llvm_float_ty,
  28                          llvm_float_ty], [InstrNoMem]>;
  29   def int_x86_sse_sub_ps : GCCBuiltin<"__builtin_ia32_subps">,
  30               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  31                          llvm_v4f32_ty], [InstrNoMem]>;
  32   def int_x86_sse_mul_ss : GCCBuiltin<"__builtin_ia32_mulss">,
  33               Intrinsic<[llvm_float_ty, llvm_float_ty,
  34                          llvm_float_ty], [InstrNoMem]>;
  35   def int_x86_sse_mul_ps : GCCBuiltin<"__builtin_ia32_mulps">,
  36               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  37                          llvm_v4f32_ty], [InstrNoMem]>;
  38   def int_x86_sse_div_ss : GCCBuiltin<"__builtin_ia32_divss">,
  39               Intrinsic<[llvm_float_ty, llvm_float_ty,
  40                          llvm_float_ty], [InstrNoMem]>;
  41   def int_x86_sse_div_ps : GCCBuiltin<"__builtin_ia32_divps">,
  42               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  43                          llvm_v4f32_ty], [InstrNoMem]>;
  44   def int_x86_sse_sqrt_ss : GCCBuiltin<"__builtin_ia32_sqrtss">,
  45               Intrinsic<[llvm_float_ty, llvm_float_ty,
  46                          llvm_float_ty], [InstrNoMem]>;
  47   def int_x86_sse_sqrt_ps : GCCBuiltin<"__builtin_ia32_sqrtps">,
  48               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  49                          llvm_v4f32_ty], [InstrNoMem]>;
  50   def int_x86_sse_rcp_ss : GCCBuiltin<"__builtin_ia32_rcpss">,
  51               Intrinsic<[llvm_float_ty, llvm_float_ty,
  52                          llvm_float_ty], [InstrNoMem]>;
  53   def int_x86_sse_rcp_ps : GCCBuiltin<"__builtin_ia32_rcpps">,
  54               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  55                          llvm_v4f32_ty], [InstrNoMem]>;
  56   def int_x86_sse_rsqrt_ss : GCCBuiltin<"__builtin_ia32_rsqrtss">,
  57               Intrinsic<[llvm_float_ty, llvm_float_ty,
  58                          llvm_float_ty], [InstrNoMem]>;
  59   def int_x86_sse_rsqrt_ps : GCCBuiltin<"__builtin_ia32_rsqrtps">,
  60               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  61                          llvm_v4f32_ty], [InstrNoMem]>;
  62   def int_x86_sse_min_ss : GCCBuiltin<"__builtin_ia32_minss">,
  63               Intrinsic<[llvm_float_ty, llvm_float_ty,
  64                          llvm_float_ty], [InstrNoMem]>;
  65   def int_x86_sse_min_ps : GCCBuiltin<"__builtin_ia32_minps">,
  66               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  67                          llvm_v4f32_ty], [InstrNoMem]>;
  68   def int_x86_sse_max_ss : GCCBuiltin<"__builtin_ia32_maxss">,
  69               Intrinsic<[llvm_float_ty, llvm_float_ty,
  70                          llvm_float_ty], [InstrNoMem]>;
  71   def int_x86_sse_max_ps : GCCBuiltin<"__builtin_ia32_maxps">,
  72               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  73                          llvm_v4f32_ty], [InstrNoMem]>;
  74 }
  75
  76 // Logical ops
  77 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
  78   def int_x86_sse_and_ps : GCCBuiltin<"__builtin_ia32_andps">,
  79               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  80                          llvm_v4f32_ty], [InstrNoMem]>;
  81   def int_x86_sse_andnot_ps : GCCBuiltin<"__builtin_ia32_andnotps">,
  82               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  83                          llvm_v4f32_ty], [InstrNoMem]>;
  84   def int_x86_sse_or_ps : GCCBuiltin<"__builtin_ia32_orps">,
  85               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  86                          llvm_v4f32_ty], [InstrNoMem]>;
  87   def int_x86_sse_xor_ps : GCCBuiltin<"__builtin_ia32_xorps">,
  88               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  89                          llvm_v4f32_ty], [InstrNoMem]>;
  90 }
  91
  92 // Comparison ops
  93 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
  94   def int_x86_sse_cmpeq_ss : GCCBuiltin<"__builtin_ia32_cmpeqss">,
  95               Intrinsic<[llvm_float_ty, llvm_float_ty,
  96                          llvm_v4f32_ty], [InstrNoMem]>;
  97   def int_x86_sse_cmpeq_ps : GCCBuiltin<"__builtin_ia32_cmpeqps">,
  98               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  99                          llvm_v4f32_ty], [InstrNoMem]>;
 100   def int_x86_sse_cmplt_ss : GCCBuiltin<"__builtin_ia32_cmpltss">,
 101               Intrinsic<[llvm_float_ty, llvm_float_ty,
 102                          llvm_float_ty], [InstrNoMem]>;
 103   def int_x86_sse_cmplt_ps : GCCBuiltin<"__builtin_ia32_cmpltps">,
 104               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 105                          llvm_v4f32_ty], [InstrNoMem]>;
 106   def int_x86_sse_cmple_ss : GCCBuiltin<"__builtin_ia32_cmpless">,
 107               Intrinsic<[llvm_float_ty, llvm_float_ty,
 108                          llvm_float_ty], [InstrNoMem]>;
 109   def int_x86_sse_cmple_ps : GCCBuiltin<"__builtin_ia32_cmpleps">,
 110               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 111                          llvm_v4f32_ty], [InstrNoMem]>;
 112   def int_x86_sse_cmpgt_ss : GCCBuiltin<"__builtin_ia32_cmpgtss">,
 113               Intrinsic<[llvm_float_ty, llvm_float_ty,
 114                          llvm_float_ty], [InstrNoMem]>;
 115   def int_x86_sse_cmpgt_ps : GCCBuiltin<"__builtin_ia32_cmpgtps">,
 116               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 117                          llvm_v4f32_ty], [InstrNoMem]>;
 118   def int_x86_sse_cmpge_ss : GCCBuiltin<"__builtin_ia32_cmpgess">,
 119               Intrinsic<[llvm_float_ty, llvm_float_ty,
 120                          llvm_float_ty], [InstrNoMem]>;
 121   def int_x86_sse_cmpge_ps : GCCBuiltin<"__builtin_ia32_cmpgeps">,
 122               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 123                          llvm_v4f32_ty], [InstrNoMem]>;
 124   def int_x86_sse_cmpneq_ss : GCCBuiltin<"__builtin_ia32_cmpneqss">,
 125               Intrinsic<[llvm_float_ty, llvm_float_ty,
 126                          llvm_float_ty], [InstrNoMem]>;
 127   def int_x86_sse_cmpneq_ps : GCCBuiltin<"__builtin_ia32_cmpneqps">,
 128               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 129                          llvm_v4f32_ty], [InstrNoMem]>;
 130   def int_x86_sse_cmpnlt_ss : GCCBuiltin<"__builtin_ia32_cmpnltss">,
 131               Intrinsic<[llvm_float_ty, llvm_float_ty,
 132                          llvm_float_ty], [InstrNoMem]>;
 133   def int_x86_sse_cmpnlt_ps : GCCBuiltin<"__builtin_ia32_cmpnltps">,
 134               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 135                          llvm_v4f32_ty], [InstrNoMem]>;
 136   def int_x86_sse_cmpnle_ss : GCCBuiltin<"__builtin_ia32_cmpnless">,
 137               Intrinsic<[llvm_float_ty, llvm_float_ty,
 138                          llvm_float_ty], [InstrNoMem]>;
 139   def int_x86_sse_cmpnle_ps : GCCBuiltin<"__builtin_ia32_cmpnleps">,
 140               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 141                          llvm_v4f32_ty], [InstrNoMem]>;
 142   def int_x86_sse_cmpngt_ss : GCCBuiltin<"__builtin_ia32_cmpngtss">,
 143               Intrinsic<[llvm_float_ty, llvm_float_ty,
 144                          llvm_float_ty], [InstrNoMem]>;
 145   def int_x86_sse_cmpngt_ps : GCCBuiltin<"__builtin_ia32_cmpngtps">,
 146               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 147                          llvm_v4f32_ty], [InstrNoMem]>;
 148   def int_x86_sse_cmpnge_ss : GCCBuiltin<"__builtin_ia32_cmpngess">,
 149               Intrinsic<[llvm_float_ty, llvm_float_ty,
 150                          llvm_float_ty], [InstrNoMem]>;
 151   def int_x86_sse_cmpnge_ps : GCCBuiltin<"__builtin_ia32_cmpngeps">,
 152               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 153                          llvm_v4f32_ty], [InstrNoMem]>;
 154   def int_x86_sse_cmpord_ss : GCCBuiltin<"__builtin_ia32_cmpordss">,
 155               Intrinsic<[llvm_float_ty, llvm_float_ty,
 156                          llvm_float_ty], [InstrNoMem]>;
 157   def int_x86_sse_cmpord_ps : GCCBuiltin<"__builtin_ia32_cmpordps">,
 158               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 159                          llvm_v4f32_ty], [InstrNoMem]>;
 160   def int_x86_sse_cmpunord_ss : GCCBuiltin<"__builtin_ia32_cmpunordss">,
 161               Intrinsic<[llvm_float_ty, llvm_float_ty,
 162                          llvm_float_ty], [InstrNoMem]>;
 163   def int_x86_sse_cmpunord_ps : GCCBuiltin<"__builtin_ia32_cmpunordps">,
 164               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 165                          llvm_v4f32_ty], [InstrNoMem]>;
 166   def int_x86_sse_comieq_ss : GCCBuiltin<"__builtin_ia32_comieq">,
 167               Intrinsic<[llvm_int_ty, llvm_float_ty,
 168                          llvm_float_ty], [InstrNoMem]>;
 169   def int_x86_sse_comilt_ss : GCCBuiltin<"__builtin_ia32_comilt">,
 170               Intrinsic<[llvm_int_ty, llvm_float_ty,
 171                          llvm_float_ty], [InstrNoMem]>;
 172   def int_x86_sse_comile_ss : GCCBuiltin<"__Builtin_ia32_comile">,
 173               Intrinsic<[llvm_int_ty, llvm_float_ty,
 174                          llvm_float_ty], [InstrNoMem]>;
 175   def int_x86_sse_comigt_ss : GCCBuiltin<"__builtin_ia32_comigt">,
 176               Intrinsic<[llvm_int_ty, llvm_float_ty,
 177                          llvm_float_ty], [InstrNoMem]>;
 178   def int_x86_sse_comige_ss : GCCBuiltin<"__builtin_ia32_comige">,
 179               Intrinsic<[llvm_int_ty, llvm_float_ty,
 180                          llvm_float_ty], [InstrNoMem]>;
 181   def int_x86_sse_comineq_ss : GCCBuiltin<"__builtin_ia32_comineq">,
 182               Intrinsic<[llvm_int_ty, llvm_float_ty,
 183                          llvm_float_ty], [InstrNoMem]>;
 184   def int_x86_sse_ucomieq_ss : GCCBuiltin<"__builtin_ia32_ucomieq">,
 185               Intrinsic<[llvm_int_ty, llvm_float_ty,
 186                          llvm_float_ty], [InstrNoMem]>;
 187   def int_x86_sse_ucomilt_ss : GCCBuiltin<"__builtin_ia32_ucomilt">,
 188               Intrinsic<[llvm_int_ty, llvm_float_ty,
 189                          llvm_float_ty], [InstrNoMem]>;
 190   def int_x86_sse_ucomile_ss : GCCBuiltin<"__Builtin_ia32_ucomile">,
 191               Intrinsic<[llvm_int_ty, llvm_float_ty,
 192                          llvm_float_ty], [InstrNoMem]>;
 193   def int_x86_sse_ucomigt_ss : GCCBuiltin<"__builtin_ia32_ucomigt">,
 194               Intrinsic<[llvm_int_ty, llvm_float_ty,
 195                          llvm_float_ty], [InstrNoMem]>;
 196   def int_x86_sse_ucomige_ss : GCCBuiltin<"__builtin_ia32_ucomige">,
 197               Intrinsic<[llvm_int_ty, llvm_float_ty,
 198                          llvm_float_ty], [InstrNoMem]>;
 199   def int_x86_sse_ucomineq_ss : GCCBuiltin<"__builtin_ia32_ucomineq">,
 200               Intrinsic<[llvm_int_ty, llvm_float_ty,
 201                          llvm_float_ty], [InstrNoMem]>;
 202 }
 203
 204
 205 // Conversion ops
 206 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 207   def int_x86_sse_cvtss2si : GCCBuiltin<"__builtin_ia32_cvtss2si">,
 208               Intrinsic<[llvm_int_ty, llvm_float_ty], [InstrNoMem]>;
 209   def int_x86_sse_cvtps2pi : GCCBuiltin<"__builtin_ia32_cvtps2pi">,
 210               Intrinsic<[llvm_v2i32_ty, llvm_v4i32_ty], [InstrNoMem]>;
 211   def int_x86_sse_cvttss2si : GCCBuiltin<"__builtin_ia32_cvttss2si">,
 212               Intrinsic<[llvm_int_ty, llvm_float_ty], [InstrNoMem]>;
 213   def int_x86_sse_cvttps2pi : GCCBuiltin<"__builtin_ia32_cvttps2pi">,
 214               Intrinsic<[llvm_v2i32_ty, llvm_v4i32_ty], [InstrNoMem]>;
 215   def int_x86_sse_cvtsi2ss : GCCBuiltin<"__builtin_ia32_cvtsi2ss">,
 216               Intrinsic<[llvm_float_ty, llvm_int_ty], [InstrNoMem]>;
 217   def int_x86_sse_cvtpi2ps : GCCBuiltin<"__builtin_ia32_cvtpi2ps">,
 218               Intrinsic<[llvm_v4f32_ty, llvm_v2i32_ty], [InstrNoMem]>;
 219 }
 220
 221 // SIMD load ops
 222 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 223   def int_x86_sse_loadh_ps : GCCBuiltin<"__builtin_ia32_loadhps">,
 224               Intrinsic<[llvm_v4f32_ty, llvm_ptr_ty], [IntrReadMem]>;
 225   def int_x86_sse_loadl_ps : GCCBuiltin<"__builtin_ia32_loadlps">,
 226               Intrinsic<[llvm_v4f32_ty, llvm_ptr_ty], [IntrReadMem]>;
 227   def int_x86_sse_loadu_ps : GCCBuiltin<"__builtin_ia32_loadups">,
 228               Intrinsic<[llvm_v4f32_ty, llvm_ptr_ty], [IntrReadMem]>;
 229 }
 230
 231 // SIMD store ops
 232 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 233   def int_x86_sse_storeh_ps : GCCBuiltin<"__builtin_ia32_storehps">,
 234               Intrinsic<[llvm_ptr_ty, llvm_v4f32_ty], [IntrWriteMem]>;
 235   def int_x86_sse_storel_ps : GCCBuiltin<"__builtin_ia32_storelps">,
 236               Intrinsic<[llvm_ptr_ty, llvm_v4f32_ty], [IntrWriteMem]>;
 237   def int_x86_sse_storeu_ps : GCCBuiltin<"__builtin_ia32_storeups">,
 238               Intrinsic<[llvm_ptr_ty, llvm_v4f32_ty], [IntrWriteMem]>;
 239 }
 240
 241 // Cacheability support ops
 242 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 243   def int_x86_sse_prefetch : GCCBuiltin<"__builtin_ia32_prefetch">,
 244               Intrinsic<[llvm_ptr_ty, llvm_int_ty], [IntrWriteMem]>;
 245   def int_x86_sse_movntq : GCCBuiltin<"__builtin_ia32_movntq">,
 246               Intrinsic<[llvm_ptr_ty, llvm_v2i32_ty], [IntrWriteMem]>;
 247   def int_x86_sse_movntps : GCCBuiltin<"__builtin_ia32_movntps">,
 248               Intrinsic<[llvm_ptr_ty, llvm_v4f32_ty], [IntrWriteMem]>;
 249   def int_x86_sse_sfence : GCCBuiltin<"__builtin_ia32_sfence">,
 250               Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
 251 }
 252
 253 // Misc.
 254 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 255   def int_x86_sse_movmsk_ps : GCCBuiltin<"__builtin_ia32_movmskps">,
 256               Intrinsic<[llvm_int_ty, llvm_v4f32_ty], [InstrNoMem]>;
 257   def int_x86_sse_ldmxcsr : GCCBuiltin<"__builtin_ia32_ldmxcsr">,
 258               Intrinsic<[llvm_void_ty, llvm_ptr_ty], [IntrWriteMem]>;
 259 }
 260
 261 //===----------------------------------------------------------------------===//
 262 // SSE2
 263
 264 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 265   def int_x86_sse2_movmskpd : GCCBuiltin<"__builtin_ia32_movmskpd">,
 266               Intrinsic<[llvm_int_ty, llvm_v2f64_ty], [InstrNoMem]>;
 267 }