include/llvm/IntrinsicsX86.td

   1 //===- IntrinsicsX86.td - Defines X86 intrinsics -----------*- tablegen -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file was developed by Chris Lattner and is distributed under the
   6 // University of Illinois Open Source License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file defines all of the X86-specific intrinsics.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14
  15 //===----------------------------------------------------------------------===//
  16 // SSE1
  17
  18 // Arithmetic ops
  19 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
  20   def int_x86_sse_add_ss : GCCBuiltin<"__builtin_ia32_addss">,
  21               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  22                          llvm_v4f32_ty], [IntrNoMem]>;
  23   def int_x86_sse_sub_ss : GCCBuiltin<"__builtin_ia32_subss">,
  24               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  25                          llvm_v4f32_ty], [IntrNoMem]>;
  26   def int_x86_sse_mul_ss : GCCBuiltin<"__builtin_ia32_mulss">,
  27               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  28                          llvm_v4f32_ty], [IntrNoMem]>;
  29   def int_x86_sse_div_ss : GCCBuiltin<"__builtin_ia32_divss">,
  30               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  31                          llvm_v4f32_ty], [IntrNoMem]>;
  32   def int_x86_sse_sqrt_ss : GCCBuiltin<"__builtin_ia32_sqrtss">,
  33               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  34                         [IntrNoMem]>;
  35   def int_x86_sse_sqrt_ps : GCCBuiltin<"__builtin_ia32_sqrtps">,
  36               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  37                         [IntrNoMem]>;
  38   def int_x86_sse_rcp_ss : GCCBuiltin<"__builtin_ia32_rcpss">,
  39               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  40                         [IntrNoMem]>;
  41   def int_x86_sse_rcp_ps : GCCBuiltin<"__builtin_ia32_rcpps">,
  42               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  43                         [IntrNoMem]>;
  44   def int_x86_sse_rsqrt_ss : GCCBuiltin<"__builtin_ia32_rsqrtss">,
  45               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  46                         [IntrNoMem]>;
  47   def int_x86_sse_rsqrt_ps : GCCBuiltin<"__builtin_ia32_rsqrtps">,
  48               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  49                         [IntrNoMem]>;
  50   def int_x86_sse_min_ss : GCCBuiltin<"__builtin_ia32_minss">,
  51               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  52                          llvm_v4f32_ty], [IntrNoMem]>;
  53   def int_x86_sse_min_ps : GCCBuiltin<"__builtin_ia32_minps">,
  54               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  55                          llvm_v4f32_ty], [IntrNoMem]>;
  56   def int_x86_sse_max_ss : GCCBuiltin<"__builtin_ia32_maxss">,
  57               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  58                          llvm_v4f32_ty], [IntrNoMem]>;
  59   def int_x86_sse_max_ps : GCCBuiltin<"__builtin_ia32_maxps">,
  60               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  61                          llvm_v4f32_ty], [IntrNoMem]>;
  62 }
  63
  64 // Comparison ops
  65 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
  66   def int_x86_sse_cmp_ss :
  67               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  68                          llvm_v4f32_ty, llvm_sbyte_ty], [IntrNoMem]>;
  69   def int_x86_sse_cmp_ps :
  70               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  71                          llvm_v4f32_ty, llvm_sbyte_ty], [IntrNoMem]>;
  72   def int_x86_sse_comieq_ss : GCCBuiltin<"__builtin_ia32_comieq">,
  73               Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
  74                          llvm_v4f32_ty], [IntrNoMem]>;
  75   def int_x86_sse_comilt_ss : GCCBuiltin<"__builtin_ia32_comilt">,
  76               Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
  77                          llvm_v4f32_ty], [IntrNoMem]>;
  78   def int_x86_sse_comile_ss : GCCBuiltin<"__builtin_ia32_comile">,
  79               Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
  80                          llvm_v4f32_ty], [IntrNoMem]>;
  81   def int_x86_sse_comigt_ss : GCCBuiltin<"__builtin_ia32_comigt">,
  82               Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
  83                          llvm_v4f32_ty], [IntrNoMem]>;
  84   def int_x86_sse_comige_ss : GCCBuiltin<"__builtin_ia32_comige">,
  85               Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
  86                          llvm_v4f32_ty], [IntrNoMem]>;
  87   def int_x86_sse_comineq_ss : GCCBuiltin<"__builtin_ia32_comineq">,
  88               Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
  89                          llvm_v4f32_ty], [IntrNoMem]>;
  90   def int_x86_sse_ucomieq_ss : GCCBuiltin<"__builtin_ia32_ucomieq">,
  91               Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
  92                          llvm_v4f32_ty], [IntrNoMem]>;
  93   def int_x86_sse_ucomilt_ss : GCCBuiltin<"__builtin_ia32_ucomilt">,
  94               Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
  95                          llvm_v4f32_ty], [IntrNoMem]>;
  96   def int_x86_sse_ucomile_ss : GCCBuiltin<"__builtin_ia32_ucomile">,
  97               Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
  98                          llvm_v4f32_ty], [IntrNoMem]>;
  99   def int_x86_sse_ucomigt_ss : GCCBuiltin<"__builtin_ia32_ucomigt">,
 100               Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
 101                          llvm_v4f32_ty], [IntrNoMem]>;
 102   def int_x86_sse_ucomige_ss : GCCBuiltin<"__builtin_ia32_ucomige">,
 103               Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
 104                          llvm_v4f32_ty], [IntrNoMem]>;
 105   def int_x86_sse_ucomineq_ss : GCCBuiltin<"__builtin_ia32_ucomineq">,
 106               Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
 107                          llvm_v4f32_ty], [IntrNoMem]>;
 108 }
 109
 110
 111 // Conversion ops
 112 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 113   def int_x86_sse_cvtss2si : GCCBuiltin<"__builtin_ia32_cvtss2si">,
 114               Intrinsic<[llvm_int_ty, llvm_v4f32_ty], [IntrNoMem]>;
 115   def int_x86_sse_cvtps2pi : GCCBuiltin<"__builtin_ia32_cvtps2pi">,
 116               Intrinsic<[llvm_v2i32_ty, llvm_v4i32_ty], [IntrNoMem]>;
 117   def int_x86_sse_cvttss2si : GCCBuiltin<"__builtin_ia32_cvttss2si">,
 118               Intrinsic<[llvm_int_ty, llvm_v4f32_ty], [IntrNoMem]>;
 119   def int_x86_sse_cvttps2pi : GCCBuiltin<"__builtin_ia32_cvttps2pi">,
 120               Intrinsic<[llvm_v2i32_ty, llvm_v4i32_ty], [IntrNoMem]>;
 121   def int_x86_sse_cvtsi2ss : GCCBuiltin<"__builtin_ia32_cvtsi2ss">,
 122               Intrinsic<[llvm_v4f32_ty, llvm_int_ty], [IntrNoMem]>;
 123   def int_x86_sse_cvtpi2ps : GCCBuiltin<"__builtin_ia32_cvtpi2ps">,
 124               Intrinsic<[llvm_v4f32_ty, llvm_v2i32_ty], [IntrNoMem]>;
 125 }
 126
 127 // SIMD load ops
 128 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 129   def int_x86_sse_loadu_ps : GCCBuiltin<"__builtin_ia32_loadups">,
 130               Intrinsic<[llvm_v4f32_ty, llvm_ptr_ty], [IntrReadMem]>;
 131 }
 132
 133 // SIMD store ops
 134 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 135   def int_x86_sse_storeu_ps : GCCBuiltin<"__builtin_ia32_storeups">,
 136               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 137                          llvm_v4f32_ty], [IntrWriteMem]>;
 138 }
 139
 140 // Cacheability support ops
 141 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 142   def int_x86_sse_prefetch : GCCBuiltin<"__builtin_ia32_prefetch">,
 143               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 144                          llvm_int_ty], [IntrWriteMem]>;
 145   def int_x86_sse_movnt_ps : GCCBuiltin<"__builtin_ia32_movntps">,
 146               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 147                          llvm_v4f32_ty], [IntrWriteMem]>;
 148   def int_x86_sse_sfence : GCCBuiltin<"__builtin_ia32_sfence">,
 149               Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
 150 }
 151
 152 // Control register.
 153 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 154   def int_x86_sse_stmxcsr :
 155               Intrinsic<[llvm_void_ty, llvm_ptr_ty], [IntrWriteMem]>;
 156   def int_x86_sse_ldmxcsr :
 157               Intrinsic<[llvm_void_ty, llvm_ptr_ty], [IntrWriteMem]>;
 158 }
 159
 160 // Misc.
 161 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 162   def int_x86_sse_movmsk_ps : GCCBuiltin<"__builtin_ia32_movmskps">,
 163               Intrinsic<[llvm_int_ty, llvm_v4f32_ty], [IntrNoMem]>;
 164 }
 165
 166 //===----------------------------------------------------------------------===//
 167 // SSE2
 168
 169 // FP arithmetic ops
 170 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 171   def int_x86_sse2_add_sd : GCCBuiltin<"__builtin_ia32_addsd">,
 172               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 173                          llvm_v2f64_ty], [IntrNoMem]>;
 174   def int_x86_sse2_sub_sd : GCCBuiltin<"__builtin_ia32_subsd">,
 175               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 176                          llvm_v2f64_ty], [IntrNoMem]>;
 177   def int_x86_sse2_mul_sd : GCCBuiltin<"__builtin_ia32_mulsd">,
 178               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 179                          llvm_v2f64_ty], [IntrNoMem]>;
 180   def int_x86_sse2_div_sd : GCCBuiltin<"__builtin_ia32_divsd">,
 181               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 182                          llvm_v2f64_ty], [IntrNoMem]>;
 183   def int_x86_sse2_sqrt_sd : GCCBuiltin<"__builtin_ia32_sqrtsd">,
 184               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
 185                         [IntrNoMem]>;
 186   def int_x86_sse2_sqrt_pd : GCCBuiltin<"__builtin_ia32_sqrtpd">,
 187               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
 188                         [IntrNoMem]>;
 189   def int_x86_sse2_rcp_sd : GCCBuiltin<"__builtin_ia32_rcpsd">,
 190               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
 191                         [IntrNoMem]>;
 192   def int_x86_sse2_rcp_pd : GCCBuiltin<"__builtin_ia32_rcppd">,
 193               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
 194                         [IntrNoMem]>;
 195   def int_x86_sse2_rsqrt_sd : GCCBuiltin<"__builtin_ia32_rsqrtsd">,
 196               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
 197                         [IntrNoMem]>;
 198   def int_x86_sse2_rsqrt_pd : GCCBuiltin<"__builtin_ia32_rsqrtpd">,
 199               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
 200                         [IntrNoMem]>;
 201   def int_x86_sse2_min_sd : GCCBuiltin<"__builtin_ia32_minsd">,
 202               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 203                          llvm_v2f64_ty], [IntrNoMem]>;
 204   def int_x86_sse2_min_pd : GCCBuiltin<"__builtin_ia32_minpd">,
 205               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 206                          llvm_v2f64_ty], [IntrNoMem]>;
 207   def int_x86_sse2_max_sd : GCCBuiltin<"__builtin_ia32_maxsd">,
 208               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 209                          llvm_v2f64_ty], [IntrNoMem]>;
 210   def int_x86_sse2_max_pd : GCCBuiltin<"__builtin_ia32_maxpd">,
 211               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 212                          llvm_v2f64_ty], [IntrNoMem]>;
 213 }
 214
 215 // FP comparison ops
 216 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 217   def int_x86_sse2_cmp_sd :
 218               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 219                          llvm_v2f64_ty, llvm_sbyte_ty], [IntrNoMem]>;
 220   def int_x86_sse2_cmp_pd :
 221               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 222                          llvm_v2f64_ty, llvm_sbyte_ty], [IntrNoMem]>;
 223   def int_x86_sse2_comieq_sd : GCCBuiltin<"__builtin_ia32_comisdeq">,
 224               Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
 225                          llvm_v2f64_ty], [IntrNoMem]>;
 226   def int_x86_sse2_comilt_sd : GCCBuiltin<"__builtin_ia32_comisdlt">,
 227               Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
 228                          llvm_v2f64_ty], [IntrNoMem]>;
 229   def int_x86_sse2_comile_sd : GCCBuiltin<"__builtin_ia32_comisdle">,
 230               Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
 231                          llvm_v2f64_ty], [IntrNoMem]>;
 232   def int_x86_sse2_comigt_sd : GCCBuiltin<"__builtin_ia32_comisdgt">,
 233               Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
 234                          llvm_v2f64_ty], [IntrNoMem]>;
 235   def int_x86_sse2_comige_sd : GCCBuiltin<"__builtin_ia32_comisdge">,
 236               Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
 237                          llvm_v2f64_ty], [IntrNoMem]>;
 238   def int_x86_sse2_comineq_sd : GCCBuiltin<"__builtin_ia32_comisdneq">,
 239               Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
 240                          llvm_v2f64_ty], [IntrNoMem]>;
 241   def int_x86_sse2_ucomieq_sd : GCCBuiltin<"__builtin_ia32_ucomisdeq">,
 242               Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
 243                          llvm_v2f64_ty], [IntrNoMem]>;
 244   def int_x86_sse2_ucomilt_sd : GCCBuiltin<"__builtin_ia32_ucomisdlt">,
 245               Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
 246                          llvm_v2f64_ty], [IntrNoMem]>;
 247   def int_x86_sse2_ucomile_sd : GCCBuiltin<"__builtin_ia32_ucomisdle">,
 248               Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
 249                          llvm_v2f64_ty], [IntrNoMem]>;
 250   def int_x86_sse2_ucomigt_sd : GCCBuiltin<"__builtin_ia32_ucomisdgt">,
 251               Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
 252                          llvm_v2f64_ty], [IntrNoMem]>;
 253   def int_x86_sse2_ucomige_sd : GCCBuiltin<"__builtin_ia32_ucomisdge">,
 254               Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
 255                          llvm_v2f64_ty], [IntrNoMem]>;
 256   def int_x86_sse2_ucomineq_sd : GCCBuiltin<"__builtin_ia32_ucomisdneq">,
 257               Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
 258                          llvm_v2f64_ty], [IntrNoMem]>;
 259 }
 260
 261 // Integer shift ops.
 262 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 263   def int_x86_sse2_psll_dq : GCCBuiltin<"__builtin_ia32_pslldqi128">,
 264               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 265                          llvm_int_ty], [IntrNoMem]>;
 266   def int_x86_sse2_psrl_dq : GCCBuiltin<"__builtin_ia32_psrldqi128">,
 267               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 268                          llvm_int_ty], [IntrNoMem]>;
 269 }
 270
 271 // SIMD load ops
 272 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 273   def int_x86_sse2_loadu_pd : GCCBuiltin<"__builtin_ia32_loadupd">,
 274               Intrinsic<[llvm_v2f64_ty, llvm_ptr_ty], [IntrReadMem]>;
 275 }
 276
 277 // SIMD store ops
 278 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 279   def int_x86_sse2_storeu_pd : GCCBuiltin<"__builtin_ia32_storeupd">,
 280               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 281                          llvm_v2f64_ty], [IntrWriteMem]>;
 282 }
 283
 284 // Cacheability support ops
 285 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 286   def int_x86_sse2_movnt_dq : GCCBuiltin<"__builtin_ia32_movntdq">,
 287               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 288                          llvm_v2i64_ty], [IntrWriteMem]>;
 289   def int_x86_sse2_movnt_pd : GCCBuiltin<"__builtin_ia32_movntpd">,
 290               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 291                          llvm_v2f64_ty], [IntrWriteMem]>;
 292   def int_x86_sse2_movnt_i : GCCBuiltin<"__builtin_ia32_movnti">,
 293               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 294                          llvm_int_ty], [IntrWriteMem]>;
 295 }
 296
 297 // Misc.
 298 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 299   def int_x86_sse2_packsswb_128 : GCCBuiltin<"__builtin_ia32_packsswb128">,
 300               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 301                          llvm_v8i16_ty], [IntrNoMem]>;
 302   def int_x86_sse2_packssdw_128 : GCCBuiltin<"__builtin_ia32_packssdw128">,
 303               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 304                          llvm_v4i32_ty], [IntrNoMem]>;
 305   def int_x86_sse2_packuswb_128 : GCCBuiltin<"__builtin_ia32_packuswb128">,
 306               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 307                          llvm_v8i16_ty], [IntrNoMem]>;
 308   def int_x86_sse2_movmskpd : GCCBuiltin<"__builtin_ia32_movmskpd">,
 309               Intrinsic<[llvm_int_ty, llvm_v2f64_ty], [IntrNoMem]>;
 310   def int_x86_sse2_pmovmskb_128 : GCCBuiltin<"__builtin_ia32_pmovmskb128">,
 311               Intrinsic<[llvm_int_ty, llvm_v16i8_ty], [IntrNoMem]>;
 312   def int_x86_sse2_maskmov_dqu : GCCBuiltin<"__builtin_ia32_maskmovdqu">,
 313               Intrinsic<[llvm_void_ty, llvm_v16i8_ty,
 314                          llvm_v16i8_ty, llvm_ptr_ty], [IntrWriteMem]>;
 315 }
 316
 317 //===----------------------------------------------------------------------===//
 318 // SSE3
 319
 320 // Horizontal ops.
 321 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 322   def int_x86_sse3_hadd_ps : GCCBuiltin<"__builtin_ia32_haddps">,
 323               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 324                          llvm_v4f32_ty], [IntrNoMem]>;
 325   def int_x86_sse3_hadd_pd : GCCBuiltin<"__builtin_ia32_haddpd">,
 326               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 327                          llvm_v2f64_ty], [IntrNoMem]>;
 328   def int_x86_sse3_hsub_ps : GCCBuiltin<"__builtin_ia32_hsubps">,
 329               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 330                          llvm_v4f32_ty], [IntrNoMem]>;
 331   def int_x86_sse3_hsub_pd : GCCBuiltin<"__builtin_ia32_hsubpd">,
 332               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 333                          llvm_v2f64_ty], [IntrNoMem]>;
 334 }