1 //===- IntrinsicsX86.td - Defines X86 intrinsics -----------*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by Chris Lattner and is distributed under the
6 // University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines all of the X86-specific intrinsics.
12 //===----------------------------------------------------------------------===//
15 //===----------------------------------------------------------------------===//
19 let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
20 def int_x86_sse_add_ss : GCCBuiltin<"__builtin_ia32_addss">,
21 Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
22 llvm_v4f32_ty], [InstrNoMem]>;
23 def int_x86_sse_sub_ss : GCCBuiltin<"__builtin_ia32_subss">,
24 Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
25 llvm_v4f32_ty], [InstrNoMem]>;
26 def int_x86_sse_mul_ss : GCCBuiltin<"__builtin_ia32_mulss">,
27 Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
28 llvm_v4f32_ty], [InstrNoMem]>;
29 def int_x86_sse_div_ss : GCCBuiltin<"__builtin_ia32_divss">,
30 Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
31 llvm_v4f32_ty], [InstrNoMem]>;
32 def int_x86_sse_sqrt_ss : GCCBuiltin<"__builtin_ia32_sqrtss">,
33 Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
35 def int_x86_sse_sqrt_ps : GCCBuiltin<"__builtin_ia32_sqrtps">,
36 Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
38 def int_x86_sse_rcp_ss : GCCBuiltin<"__builtin_ia32_rcpss">,
39 Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
41 def int_x86_sse_rcp_ps : GCCBuiltin<"__builtin_ia32_rcpps">,
42 Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
44 def int_x86_sse_rsqrt_ss : GCCBuiltin<"__builtin_ia32_rsqrtss">,
45 Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
47 def int_x86_sse_rsqrt_ps : GCCBuiltin<"__builtin_ia32_rsqrtps">,
48 Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
50 def int_x86_sse_min_ss : GCCBuiltin<"__builtin_ia32_minss">,
51 Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
52 llvm_v4f32_ty], [InstrNoMem]>;
53 def int_x86_sse_min_ps : GCCBuiltin<"__builtin_ia32_minps">,
54 Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
55 llvm_v4f32_ty], [InstrNoMem]>;
56 def int_x86_sse_max_ss : GCCBuiltin<"__builtin_ia32_maxss">,
57 Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
58 llvm_v4f32_ty], [InstrNoMem]>;
59 def int_x86_sse_max_ps : GCCBuiltin<"__builtin_ia32_maxps">,
60 Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
61 llvm_v4f32_ty], [InstrNoMem]>;
65 let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
66 def int_x86_sse_cmp_ss :
67 Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
68 llvm_v4f32_ty, llvm_sbyte_ty], [InstrNoMem]>;
69 def int_x86_sse_cmp_ps :
70 Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
71 llvm_v4f32_ty, llvm_sbyte_ty], [InstrNoMem]>;
72 def int_x86_sse_comieq_ss : GCCBuiltin<"__builtin_ia32_comieq">,
73 Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
74 llvm_v4f32_ty], [InstrNoMem]>;
75 def int_x86_sse_comilt_ss : GCCBuiltin<"__builtin_ia32_comilt">,
76 Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
77 llvm_v4f32_ty], [InstrNoMem]>;
78 def int_x86_sse_comile_ss : GCCBuiltin<"__builtin_ia32_comile">,
79 Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
80 llvm_v4f32_ty], [InstrNoMem]>;
81 def int_x86_sse_comigt_ss : GCCBuiltin<"__builtin_ia32_comigt">,
82 Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
83 llvm_v4f32_ty], [InstrNoMem]>;
84 def int_x86_sse_comige_ss : GCCBuiltin<"__builtin_ia32_comige">,
85 Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
86 llvm_v4f32_ty], [InstrNoMem]>;
87 def int_x86_sse_comineq_ss : GCCBuiltin<"__builtin_ia32_comineq">,
88 Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
89 llvm_v4f32_ty], [InstrNoMem]>;
90 def int_x86_sse_ucomieq_ss : GCCBuiltin<"__builtin_ia32_ucomieq">,
91 Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
92 llvm_v4f32_ty], [InstrNoMem]>;
93 def int_x86_sse_ucomilt_ss : GCCBuiltin<"__builtin_ia32_ucomilt">,
94 Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
95 llvm_v4f32_ty], [InstrNoMem]>;
96 def int_x86_sse_ucomile_ss : GCCBuiltin<"__builtin_ia32_ucomile">,
97 Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
98 llvm_v4f32_ty], [InstrNoMem]>;
99 def int_x86_sse_ucomigt_ss : GCCBuiltin<"__builtin_ia32_ucomigt">,
100 Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
101 llvm_v4f32_ty], [InstrNoMem]>;
102 def int_x86_sse_ucomige_ss : GCCBuiltin<"__builtin_ia32_ucomige">,
103 Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
104 llvm_v4f32_ty], [InstrNoMem]>;
105 def int_x86_sse_ucomineq_ss : GCCBuiltin<"__builtin_ia32_ucomineq">,
106 Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
107 llvm_v4f32_ty], [InstrNoMem]>;
112 let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
113 def int_x86_sse_cvtss2si : GCCBuiltin<"__builtin_ia32_cvtss2si">,
114 Intrinsic<[llvm_int_ty, llvm_v4f32_ty], [InstrNoMem]>;
115 def int_x86_sse_cvtps2pi : GCCBuiltin<"__builtin_ia32_cvtps2pi">,
116 Intrinsic<[llvm_v2i32_ty, llvm_v4i32_ty], [InstrNoMem]>;
117 def int_x86_sse_cvttss2si : GCCBuiltin<"__builtin_ia32_cvttss2si">,
118 Intrinsic<[llvm_int_ty, llvm_v4f32_ty], [InstrNoMem]>;
119 def int_x86_sse_cvttps2pi : GCCBuiltin<"__builtin_ia32_cvttps2pi">,
120 Intrinsic<[llvm_v2i32_ty, llvm_v4i32_ty], [InstrNoMem]>;
121 def int_x86_sse_cvtsi2ss : GCCBuiltin<"__builtin_ia32_cvtsi2ss">,
122 Intrinsic<[llvm_v4f32_ty, llvm_int_ty], [InstrNoMem]>;
123 def int_x86_sse_cvtpi2ps : GCCBuiltin<"__builtin_ia32_cvtpi2ps">,
124 Intrinsic<[llvm_v4f32_ty, llvm_v2i32_ty], [InstrNoMem]>;
128 let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
129 def int_x86_sse_loadu_ps : GCCBuiltin<"__builtin_ia32_loadups">,
130 Intrinsic<[llvm_v4f32_ty, llvm_ptr_ty], [IntrReadMem]>;
134 let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
135 def int_x86_sse_storeu_ps : GCCBuiltin<"__builtin_ia32_storeups">,
136 Intrinsic<[llvm_ptr_ty, llvm_v4f32_ty], [IntrWriteMem]>;
139 // Cacheability support ops
140 let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
141 def int_x86_sse_prefetch : GCCBuiltin<"__builtin_ia32_prefetch">,
142 Intrinsic<[llvm_ptr_ty, llvm_int_ty], [IntrWriteMem]>;
143 def int_x86_sse_movntq : GCCBuiltin<"__builtin_ia32_movntq">,
144 Intrinsic<[llvm_ptr_ty, llvm_v2i32_ty], [IntrWriteMem]>;
145 def int_x86_sse_movntps : GCCBuiltin<"__builtin_ia32_movntps">,
146 Intrinsic<[llvm_ptr_ty, llvm_v4f32_ty], [IntrWriteMem]>;
147 def int_x86_sse_sfence : GCCBuiltin<"__builtin_ia32_sfence">,
148 Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
152 let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
153 def int_x86_sse_stmxcsr :
154 Intrinsic<[llvm_void_ty, llvm_ptr_ty], [IntrWriteMem]>;
155 def int_x86_sse_ldmxcsr :
156 Intrinsic<[llvm_void_ty, llvm_ptr_ty], [IntrWriteMem]>;
160 let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
161 def int_x86_sse_movmsk_ps : GCCBuiltin<"__builtin_ia32_movmskps">,
162 Intrinsic<[llvm_int_ty, llvm_v4f32_ty], [InstrNoMem]>;
165 //===----------------------------------------------------------------------===//
169 let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
170 def int_x86_sse2_add_sd : GCCBuiltin<"__builtin_ia32_addsd">,
171 Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
172 llvm_v2f64_ty], [InstrNoMem]>;
173 def int_x86_sse2_sub_sd : GCCBuiltin<"__builtin_ia32_subsd">,
174 Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
175 llvm_v2f64_ty], [InstrNoMem]>;
176 def int_x86_sse2_mul_sd : GCCBuiltin<"__builtin_ia32_mulsd">,
177 Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
178 llvm_v2f64_ty], [InstrNoMem]>;
179 def int_x86_sse2_div_sd : GCCBuiltin<"__builtin_ia32_divsd">,
180 Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
181 llvm_v2f64_ty], [InstrNoMem]>;
182 def int_x86_sse2_sqrt_sd : GCCBuiltin<"__builtin_ia32_sqrtsd">,
183 Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
185 def int_x86_sse2_sqrt_pd : GCCBuiltin<"__builtin_ia32_sqrtpd">,
186 Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
188 def int_x86_sse2_rcp_sd : GCCBuiltin<"__builtin_ia32_rcpsd">,
189 Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
191 def int_x86_sse2_rcp_pd : GCCBuiltin<"__builtin_ia32_rcppd">,
192 Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
194 def int_x86_sse2_rsqrt_sd : GCCBuiltin<"__builtin_ia32_rsqrtsd">,
195 Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
197 def int_x86_sse2_rsqrt_pd : GCCBuiltin<"__builtin_ia32_rsqrtpd">,
198 Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
200 def int_x86_sse2_min_sd : GCCBuiltin<"__builtin_ia32_minsd">,
201 Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
202 llvm_v2f64_ty], [InstrNoMem]>;
203 def int_x86_sse2_min_pd : GCCBuiltin<"__builtin_ia32_minpd">,
204 Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
205 llvm_v2f64_ty], [InstrNoMem]>;
206 def int_x86_sse2_max_sd : GCCBuiltin<"__builtin_ia32_maxsd">,
207 Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
208 llvm_v2f64_ty], [InstrNoMem]>;
209 def int_x86_sse2_max_pd : GCCBuiltin<"__builtin_ia32_maxpd">,
210 Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
211 llvm_v2f64_ty], [InstrNoMem]>;
215 let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
216 def int_x86_sse2_cmp_sd :
217 Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
218 llvm_v2f64_ty, llvm_sbyte_ty], [InstrNoMem]>;
219 def int_x86_sse2_cmp_pd :
220 Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
221 llvm_v2f64_ty, llvm_sbyte_ty], [InstrNoMem]>;
222 def int_x86_sse2_comieq_sd : GCCBuiltin<"__builtin_ia32_comisdeq">,
223 Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
224 llvm_v2f64_ty], [InstrNoMem]>;
225 def int_x86_sse2_comilt_sd : GCCBuiltin<"__builtin_ia32_comisdlt">,
226 Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
227 llvm_v2f64_ty], [InstrNoMem]>;
228 def int_x86_sse2_comile_sd : GCCBuiltin<"__builtin_ia32_comisdle">,
229 Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
230 llvm_v2f64_ty], [InstrNoMem]>;
231 def int_x86_sse2_comigt_sd : GCCBuiltin<"__builtin_ia32_comisdgt">,
232 Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
233 llvm_v2f64_ty], [InstrNoMem]>;
234 def int_x86_sse2_comige_sd : GCCBuiltin<"__builtin_ia32_comisdge">,
235 Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
236 llvm_v2f64_ty], [InstrNoMem]>;
237 def int_x86_sse2_comineq_sd : GCCBuiltin<"__builtin_ia32_comisdneq">,
238 Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
239 llvm_v2f64_ty], [InstrNoMem]>;
240 def int_x86_sse2_ucomieq_sd : GCCBuiltin<"__builtin_ia32_ucomisdeq">,
241 Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
242 llvm_v2f64_ty], [InstrNoMem]>;
243 def int_x86_sse2_ucomilt_sd : GCCBuiltin<"__builtin_ia32_ucomisdlt">,
244 Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
245 llvm_v2f64_ty], [InstrNoMem]>;
246 def int_x86_sse2_ucomile_sd : GCCBuiltin<"__builtin_ia32_ucomisdle">,
247 Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
248 llvm_v2f64_ty], [InstrNoMem]>;
249 def int_x86_sse2_ucomigt_sd : GCCBuiltin<"__builtin_ia32_ucomisdgt">,
250 Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
251 llvm_v2f64_ty], [InstrNoMem]>;
252 def int_x86_sse2_ucomige_sd : GCCBuiltin<"__builtin_ia32_ucomisdge">,
253 Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
254 llvm_v2f64_ty], [InstrNoMem]>;
255 def int_x86_sse2_ucomineq_sd : GCCBuiltin<"__builtin_ia32_ucomisdneq">,
256 Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
257 llvm_v2f64_ty], [InstrNoMem]>;
260 // Integer shift ops.
261 let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
262 def int_x86_sse2_psll_dq : GCCBuiltin<"__builtin_ia32_pslldqi128">,
263 Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
264 llvm_int_ty], [InstrNoMem]>;
265 def int_x86_sse2_psrl_dq : GCCBuiltin<"__builtin_ia32_psrldqi128">,
266 Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
267 llvm_int_ty], [InstrNoMem]>;
271 let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
272 def int_x86_sse2_packsswb_128 : GCCBuiltin<"__builtin_ia32_packsswb128">,
273 Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
274 llvm_v8i16_ty], [InstrNoMem]>;
275 def int_x86_sse2_packssdw_128 : GCCBuiltin<"__builtin_ia32_packssdw128">,
276 Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
277 llvm_v4i32_ty], [InstrNoMem]>;
278 def int_x86_sse2_packuswb_128 : GCCBuiltin<"__builtin_ia32_packuswb128">,
279 Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
280 llvm_v8i16_ty], [InstrNoMem]>;
281 def int_x86_sse2_movmskpd : GCCBuiltin<"__builtin_ia32_movmskpd">,
282 Intrinsic<[llvm_int_ty, llvm_v2f64_ty], [InstrNoMem]>;
283 def int_x86_sse2_pmovmskb_128 : GCCBuiltin<"__builtin_ia32_pmovmskb128">,
284 Intrinsic<[llvm_int_ty, llvm_v16i8_ty], [InstrNoMem]>;
287 //===----------------------------------------------------------------------===//
291 let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
292 def int_x86_sse3_hadd_ps : GCCBuiltin<"__builtin_ia32_haddps">,
293 Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
294 llvm_v4f32_ty], [InstrNoMem]>;
295 def int_x86_sse3_hadd_pd : GCCBuiltin<"__builtin_ia32_haddpd">,
296 Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
297 llvm_v2f64_ty], [InstrNoMem]>;
298 def int_x86_sse3_hsub_ps : GCCBuiltin<"__builtin_ia32_hsubps">,
299 Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
300 llvm_v4f32_ty], [InstrNoMem]>;
301 def int_x86_sse3_hsub_pd : GCCBuiltin<"__builtin_ia32_hsubpd">,
302 Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
303 llvm_v2f64_ty], [InstrNoMem]>;