include/llvm/IntrinsicsX86.td

   1 //===- IntrinsicsX86.td - Defines X86 intrinsics -----------*- tablegen -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file was developed by Chris Lattner and is distributed under the
   6 // University of Illinois Open Source License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file defines all of the X86-specific intrinsics.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14
  15 //===----------------------------------------------------------------------===//
  16 // SSE1
  17
  18 // Arithmetic ops
  19 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
  20   def int_x86_sse_add_ss : GCCBuiltin<"__builtin_ia32_addss">,
  21               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  22                          llvm_v4f32_ty], [IntrNoMem]>;
  23   def int_x86_sse_sub_ss : GCCBuiltin<"__builtin_ia32_subss">,
  24               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  25                          llvm_v4f32_ty], [IntrNoMem]>;
  26   def int_x86_sse_mul_ss : GCCBuiltin<"__builtin_ia32_mulss">,
  27               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  28                          llvm_v4f32_ty], [IntrNoMem]>;
  29   def int_x86_sse_div_ss : GCCBuiltin<"__builtin_ia32_divss">,
  30               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  31                          llvm_v4f32_ty], [IntrNoMem]>;
  32   def int_x86_sse_sqrt_ss : GCCBuiltin<"__builtin_ia32_sqrtss">,
  33               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  34                         [IntrNoMem]>;
  35   def int_x86_sse_sqrt_ps : GCCBuiltin<"__builtin_ia32_sqrtps">,
  36               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  37                         [IntrNoMem]>;
  38   def int_x86_sse_rcp_ss : GCCBuiltin<"__builtin_ia32_rcpss">,
  39               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  40                         [IntrNoMem]>;
  41   def int_x86_sse_rcp_ps : GCCBuiltin<"__builtin_ia32_rcpps">,
  42               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  43                         [IntrNoMem]>;
  44   def int_x86_sse_rsqrt_ss : GCCBuiltin<"__builtin_ia32_rsqrtss">,
  45               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  46                         [IntrNoMem]>;
  47   def int_x86_sse_rsqrt_ps : GCCBuiltin<"__builtin_ia32_rsqrtps">,
  48               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  49                         [IntrNoMem]>;
  50   def int_x86_sse_min_ss : GCCBuiltin<"__builtin_ia32_minss">,
  51               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  52                          llvm_v4f32_ty], [IntrNoMem]>;
  53   def int_x86_sse_min_ps : GCCBuiltin<"__builtin_ia32_minps">,
  54               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  55                          llvm_v4f32_ty], [IntrNoMem]>;
  56   def int_x86_sse_max_ss : GCCBuiltin<"__builtin_ia32_maxss">,
  57               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  58                          llvm_v4f32_ty], [IntrNoMem]>;
  59   def int_x86_sse_max_ps : GCCBuiltin<"__builtin_ia32_maxps">,
  60               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  61                          llvm_v4f32_ty], [IntrNoMem]>;
  62 }
  63
  64 // Comparison ops
  65 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
  66   def int_x86_sse_cmp_ss :
  67               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  68                          llvm_v4f32_ty, llvm_sbyte_ty], [IntrNoMem]>;
  69   def int_x86_sse_cmp_ps :
  70               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  71                          llvm_v4f32_ty, llvm_sbyte_ty], [IntrNoMem]>;
  72   def int_x86_sse_comieq_ss : GCCBuiltin<"__builtin_ia32_comieq">,
  73               Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
  74                          llvm_v4f32_ty], [IntrNoMem]>;
  75   def int_x86_sse_comilt_ss : GCCBuiltin<"__builtin_ia32_comilt">,
  76               Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
  77                          llvm_v4f32_ty], [IntrNoMem]>;
  78   def int_x86_sse_comile_ss : GCCBuiltin<"__builtin_ia32_comile">,
  79               Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
  80                          llvm_v4f32_ty], [IntrNoMem]>;
  81   def int_x86_sse_comigt_ss : GCCBuiltin<"__builtin_ia32_comigt">,
  82               Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
  83                          llvm_v4f32_ty], [IntrNoMem]>;
  84   def int_x86_sse_comige_ss : GCCBuiltin<"__builtin_ia32_comige">,
  85               Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
  86                          llvm_v4f32_ty], [IntrNoMem]>;
  87   def int_x86_sse_comineq_ss : GCCBuiltin<"__builtin_ia32_comineq">,
  88               Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
  89                          llvm_v4f32_ty], [IntrNoMem]>;
  90   def int_x86_sse_ucomieq_ss : GCCBuiltin<"__builtin_ia32_ucomieq">,
  91               Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
  92                          llvm_v4f32_ty], [IntrNoMem]>;
  93   def int_x86_sse_ucomilt_ss : GCCBuiltin<"__builtin_ia32_ucomilt">,
  94               Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
  95                          llvm_v4f32_ty], [IntrNoMem]>;
  96   def int_x86_sse_ucomile_ss : GCCBuiltin<"__builtin_ia32_ucomile">,
  97               Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
  98                          llvm_v4f32_ty], [IntrNoMem]>;
  99   def int_x86_sse_ucomigt_ss : GCCBuiltin<"__builtin_ia32_ucomigt">,
 100               Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
 101                          llvm_v4f32_ty], [IntrNoMem]>;
 102   def int_x86_sse_ucomige_ss : GCCBuiltin<"__builtin_ia32_ucomige">,
 103               Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
 104                          llvm_v4f32_ty], [IntrNoMem]>;
 105   def int_x86_sse_ucomineq_ss : GCCBuiltin<"__builtin_ia32_ucomineq">,
 106               Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
 107                          llvm_v4f32_ty], [IntrNoMem]>;
 108 }
 109
 110
 111 // Conversion ops
 112 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 113   def int_x86_sse_cvtss2si : GCCBuiltin<"__builtin_ia32_cvtss2si">,
 114               Intrinsic<[llvm_int_ty, llvm_v4f32_ty], [IntrNoMem]>;
 115   def int_x86_sse_cvttss2si : GCCBuiltin<"__builtin_ia32_cvttss2si">,
 116               Intrinsic<[llvm_int_ty, llvm_v4f32_ty], [IntrNoMem]>;
 117   def int_x86_sse_cvtsi2ss : GCCBuiltin<"__builtin_ia32_cvtsi2ss">,
 118               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 119                          llvm_int_ty], [IntrNoMem]>;
 120 }
 121
 122 // SIMD load ops
 123 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 124   def int_x86_sse_loadu_ps : GCCBuiltin<"__builtin_ia32_loadups">,
 125               Intrinsic<[llvm_v4f32_ty, llvm_ptr_ty], [IntrReadMem]>;
 126 }
 127
 128 // SIMD store ops
 129 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 130   def int_x86_sse_storeu_ps : GCCBuiltin<"__builtin_ia32_storeups">,
 131               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 132                          llvm_v4f32_ty], [IntrWriteMem]>;
 133 }
 134
 135 // Cacheability support ops
 136 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 137   def int_x86_sse_movnt_ps : GCCBuiltin<"__builtin_ia32_movntps">,
 138               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 139                          llvm_v4f32_ty], [IntrWriteMem]>;
 140   def int_x86_sse_sfence : GCCBuiltin<"__builtin_ia32_sfence">,
 141               Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
 142 }
 143
 144 // Control register.
 145 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 146   def int_x86_sse_stmxcsr :
 147               Intrinsic<[llvm_void_ty, llvm_ptr_ty], [IntrWriteMem]>;
 148   def int_x86_sse_ldmxcsr :
 149               Intrinsic<[llvm_void_ty, llvm_ptr_ty], [IntrWriteMem]>;
 150 }
 151
 152 // Misc.
 153 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 154   def int_x86_sse_movmsk_ps : GCCBuiltin<"__builtin_ia32_movmskps">,
 155               Intrinsic<[llvm_int_ty, llvm_v4f32_ty], [IntrNoMem]>;
 156 }
 157
 158 //===----------------------------------------------------------------------===//
 159 // SSE2
 160
 161 // FP arithmetic ops
 162 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 163   def int_x86_sse2_add_sd : GCCBuiltin<"__builtin_ia32_addsd">,
 164               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 165                          llvm_v2f64_ty], [IntrNoMem]>;
 166   def int_x86_sse2_sub_sd : GCCBuiltin<"__builtin_ia32_subsd">,
 167               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 168                          llvm_v2f64_ty], [IntrNoMem]>;
 169   def int_x86_sse2_mul_sd : GCCBuiltin<"__builtin_ia32_mulsd">,
 170               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 171                          llvm_v2f64_ty], [IntrNoMem]>;
 172   def int_x86_sse2_div_sd : GCCBuiltin<"__builtin_ia32_divsd">,
 173               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 174                          llvm_v2f64_ty], [IntrNoMem]>;
 175   def int_x86_sse2_sqrt_sd : GCCBuiltin<"__builtin_ia32_sqrtsd">,
 176               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
 177                         [IntrNoMem]>;
 178   def int_x86_sse2_sqrt_pd : GCCBuiltin<"__builtin_ia32_sqrtpd">,
 179               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
 180                         [IntrNoMem]>;
 181   def int_x86_sse2_rcp_sd : GCCBuiltin<"__builtin_ia32_rcpsd">,
 182               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
 183                         [IntrNoMem]>;
 184   def int_x86_sse2_rcp_pd : GCCBuiltin<"__builtin_ia32_rcppd">,
 185               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
 186                         [IntrNoMem]>;
 187   def int_x86_sse2_rsqrt_sd : GCCBuiltin<"__builtin_ia32_rsqrtsd">,
 188               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
 189                         [IntrNoMem]>;
 190   def int_x86_sse2_rsqrt_pd : GCCBuiltin<"__builtin_ia32_rsqrtpd">,
 191               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
 192                         [IntrNoMem]>;
 193   def int_x86_sse2_min_sd : GCCBuiltin<"__builtin_ia32_minsd">,
 194               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 195                          llvm_v2f64_ty], [IntrNoMem]>;
 196   def int_x86_sse2_min_pd : GCCBuiltin<"__builtin_ia32_minpd">,
 197               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 198                          llvm_v2f64_ty], [IntrNoMem]>;
 199   def int_x86_sse2_max_sd : GCCBuiltin<"__builtin_ia32_maxsd">,
 200               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 201                          llvm_v2f64_ty], [IntrNoMem]>;
 202   def int_x86_sse2_max_pd : GCCBuiltin<"__builtin_ia32_maxpd">,
 203               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 204                          llvm_v2f64_ty], [IntrNoMem]>;
 205 }
 206
 207 // FP comparison ops
 208 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 209   def int_x86_sse2_cmp_sd :
 210               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 211                          llvm_v2f64_ty, llvm_sbyte_ty], [IntrNoMem]>;
 212   def int_x86_sse2_cmp_pd :
 213               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 214                          llvm_v2f64_ty, llvm_sbyte_ty], [IntrNoMem]>;
 215   def int_x86_sse2_comieq_sd : GCCBuiltin<"__builtin_ia32_comisdeq">,
 216               Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
 217                          llvm_v2f64_ty], [IntrNoMem]>;
 218   def int_x86_sse2_comilt_sd : GCCBuiltin<"__builtin_ia32_comisdlt">,
 219               Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
 220                          llvm_v2f64_ty], [IntrNoMem]>;
 221   def int_x86_sse2_comile_sd : GCCBuiltin<"__builtin_ia32_comisdle">,
 222               Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
 223                          llvm_v2f64_ty], [IntrNoMem]>;
 224   def int_x86_sse2_comigt_sd : GCCBuiltin<"__builtin_ia32_comisdgt">,
 225               Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
 226                          llvm_v2f64_ty], [IntrNoMem]>;
 227   def int_x86_sse2_comige_sd : GCCBuiltin<"__builtin_ia32_comisdge">,
 228               Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
 229                          llvm_v2f64_ty], [IntrNoMem]>;
 230   def int_x86_sse2_comineq_sd : GCCBuiltin<"__builtin_ia32_comisdneq">,
 231               Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
 232                          llvm_v2f64_ty], [IntrNoMem]>;
 233   def int_x86_sse2_ucomieq_sd : GCCBuiltin<"__builtin_ia32_ucomisdeq">,
 234               Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
 235                          llvm_v2f64_ty], [IntrNoMem]>;
 236   def int_x86_sse2_ucomilt_sd : GCCBuiltin<"__builtin_ia32_ucomisdlt">,
 237               Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
 238                          llvm_v2f64_ty], [IntrNoMem]>;
 239   def int_x86_sse2_ucomile_sd : GCCBuiltin<"__builtin_ia32_ucomisdle">,
 240               Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
 241                          llvm_v2f64_ty], [IntrNoMem]>;
 242   def int_x86_sse2_ucomigt_sd : GCCBuiltin<"__builtin_ia32_ucomisdgt">,
 243               Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
 244                          llvm_v2f64_ty], [IntrNoMem]>;
 245   def int_x86_sse2_ucomige_sd : GCCBuiltin<"__builtin_ia32_ucomisdge">,
 246               Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
 247                          llvm_v2f64_ty], [IntrNoMem]>;
 248   def int_x86_sse2_ucomineq_sd : GCCBuiltin<"__builtin_ia32_ucomisdneq">,
 249               Intrinsic<[llvm_int_ty, llvm_v2f64_ty,
 250                          llvm_v2f64_ty], [IntrNoMem]>;
 251 }
 252
 253 // Integer shift ops.
 254 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 255   def int_x86_sse2_psll_dq : GCCBuiltin<"__builtin_ia32_pslldqi128">,
 256               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 257                          llvm_int_ty], [IntrNoMem]>;
 258   def int_x86_sse2_psrl_dq : GCCBuiltin<"__builtin_ia32_psrldqi128">,
 259               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 260                          llvm_int_ty], [IntrNoMem]>;
 261 }
 262
 263 // Conversion ops
 264 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 265   def int_x86_sse2_cvtdq2pd : GCCBuiltin<"__builtin_ia32_cvtdq2pd">,
 266               Intrinsic<[llvm_v2f64_ty, llvm_v4i32_ty], [IntrNoMem]>;
 267   def int_x86_sse2_cvtdq2ps : GCCBuiltin<"__builtin_ia32_cvtdq2ps">,
 268               Intrinsic<[llvm_v4f32_ty, llvm_v4i32_ty], [IntrNoMem]>;
 269   def int_x86_sse2_cvtpd2dq : GCCBuiltin<"__builtin_ia32_cvtpd2dq">,
 270               Intrinsic<[llvm_v4i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 271   def int_x86_sse2_cvttpd2dq : GCCBuiltin<"__builtin_ia32_cvttpd2dq">,
 272               Intrinsic<[llvm_v4i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 273   def int_x86_sse2_cvtpd2ps : GCCBuiltin<"__builtin_ia32_cvtpd2ps">,
 274               Intrinsic<[llvm_v4f32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 275   def int_x86_sse2_cvtps2dq : GCCBuiltin<"__builtin_ia32_cvtps2dq">,
 276               Intrinsic<[llvm_v4i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
 277   def int_x86_sse2_cvttps2dq : GCCBuiltin<"__builtin_ia32_cvttps2dq">,
 278               Intrinsic<[llvm_v4i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
 279   def int_x86_sse2_cvtps2pd : GCCBuiltin<"__builtin_ia32_cvtps2pd">,
 280               Intrinsic<[llvm_v2f64_ty, llvm_v4f32_ty], [IntrNoMem]>;
 281   def int_x86_sse2_cvtsd2si : GCCBuiltin<"__builtin_ia32_cvtsd2si">,
 282               Intrinsic<[llvm_int_ty, llvm_v2f64_ty], [IntrNoMem]>;
 283   def int_x86_sse2_cvttsd2si : GCCBuiltin<"__builtin_ia32_cvttsd2si">,
 284               Intrinsic<[llvm_int_ty, llvm_v2f64_ty], [IntrNoMem]>;
 285   def int_x86_sse2_cvtsi2sd : GCCBuiltin<"__builtin_ia32_cvtsi2sd">,
 286               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 287                          llvm_int_ty], [IntrNoMem]>;
 288   def int_x86_sse2_cvtsd2ss : GCCBuiltin<"__builtin_ia32_cvtsd2ss">,
 289               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 290                          llvm_v2f64_ty], [IntrNoMem]>;
 291   def int_x86_sse2_cvtss2sd : GCCBuiltin<"__builtin_ia32_cvtss2sd">,
 292               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 293                          llvm_v4f32_ty], [IntrNoMem]>;
 294 }
 295
 296 // SIMD load ops
 297 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 298   def int_x86_sse2_loadu_pd : GCCBuiltin<"__builtin_ia32_loadupd">,
 299               Intrinsic<[llvm_v2f64_ty, llvm_ptr_ty], [IntrReadMem]>;
 300   def int_x86_sse2_loadu_dq : GCCBuiltin<"__builtin_ia32_loaddqu">,
 301               Intrinsic<[llvm_v16i8_ty, llvm_ptr_ty], [IntrReadMem]>;
 302 }
 303
 304 // SIMD store ops
 305 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 306   def int_x86_sse2_storeu_pd : GCCBuiltin<"__builtin_ia32_storeupd">,
 307               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 308                          llvm_v2f64_ty], [IntrWriteMem]>;
 309   def int_x86_sse2_storeu_dq : GCCBuiltin<"__builtin_ia32_storedqu">,
 310               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 311                          llvm_v16i8_ty], [IntrWriteMem]>;
 312   def int_x86_sse2_storel_dq : GCCBuiltin<"__builtin_ia32_storelv4si">,
 313               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 314                          llvm_v4i32_ty], [IntrWriteMem]>;
 315 }
 316
 317 // Cacheability support ops
 318 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 319   def int_x86_sse2_movnt_dq : GCCBuiltin<"__builtin_ia32_movntdq">,
 320               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 321                          llvm_v2i64_ty], [IntrWriteMem]>;
 322   def int_x86_sse2_movnt_pd : GCCBuiltin<"__builtin_ia32_movntpd">,
 323               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 324                          llvm_v2f64_ty], [IntrWriteMem]>;
 325   def int_x86_sse2_movnt_i : GCCBuiltin<"__builtin_ia32_movnti">,
 326               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 327                          llvm_int_ty], [IntrWriteMem]>;
 328 }
 329
 330 // Misc.
 331 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 332   def int_x86_sse2_packsswb_128 : GCCBuiltin<"__builtin_ia32_packsswb128">,
 333               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 334                          llvm_v8i16_ty], [IntrNoMem]>;
 335   def int_x86_sse2_packssdw_128 : GCCBuiltin<"__builtin_ia32_packssdw128">,
 336               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 337                          llvm_v4i32_ty], [IntrNoMem]>;
 338   def int_x86_sse2_packuswb_128 : GCCBuiltin<"__builtin_ia32_packuswb128">,
 339               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 340                          llvm_v8i16_ty], [IntrNoMem]>;
 341   // FIXME: Temporary workaround since 2-wide shuffle is broken.
 342   def int_x86_sse2_movl_dq : GCCBuiltin<"__builtin_ia32_movqv4si">,
 343               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty], [IntrNoMem]>;
 344   def int_x86_sse2_movmskpd : GCCBuiltin<"__builtin_ia32_movmskpd">,
 345               Intrinsic<[llvm_int_ty, llvm_v2f64_ty], [IntrNoMem]>;
 346   def int_x86_sse2_pmovmskb_128 : GCCBuiltin<"__builtin_ia32_pmovmskb128">,
 347               Intrinsic<[llvm_int_ty, llvm_v16i8_ty], [IntrNoMem]>;
 348   def int_x86_sse2_maskmov_dqu : GCCBuiltin<"__builtin_ia32_maskmovdqu">,
 349               Intrinsic<[llvm_void_ty, llvm_v16i8_ty,
 350                          llvm_v16i8_ty, llvm_ptr_ty], [IntrWriteMem]>;
 351 }
 352
 353 //===----------------------------------------------------------------------===//
 354 // SSE3
 355
 356 // Horizontal ops.
 357 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 358   def int_x86_sse3_hadd_ps : GCCBuiltin<"__builtin_ia32_haddps">,
 359               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 360                          llvm_v4f32_ty], [IntrNoMem]>;
 361   def int_x86_sse3_hadd_pd : GCCBuiltin<"__builtin_ia32_haddpd">,
 362               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 363                          llvm_v2f64_ty], [IntrNoMem]>;
 364   def int_x86_sse3_hsub_ps : GCCBuiltin<"__builtin_ia32_hsubps">,
 365               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 366                          llvm_v4f32_ty], [IntrNoMem]>;
 367   def int_x86_sse3_hsub_pd : GCCBuiltin<"__builtin_ia32_hsubpd">,
 368               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 369                          llvm_v2f64_ty], [IntrNoMem]>;
 370 }