include/llvm/IntrinsicsX86.td

   1 //===- IntrinsicsX86.td - Defines X86 intrinsics -----------*- tablegen -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file defines all of the X86-specific intrinsics.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14
  15 //===----------------------------------------------------------------------===//
  16 // SSE1
  17
  18 // Arithmetic ops
  19 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
  20   def int_x86_sse_add_ss : GCCBuiltin<"__builtin_ia32_addss">,
  21               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  22                          llvm_v4f32_ty], [IntrNoMem]>;
  23   def int_x86_sse_sub_ss : GCCBuiltin<"__builtin_ia32_subss">,
  24               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  25                          llvm_v4f32_ty], [IntrNoMem]>;
  26   def int_x86_sse_mul_ss : GCCBuiltin<"__builtin_ia32_mulss">,
  27               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  28                          llvm_v4f32_ty], [IntrNoMem]>;
  29   def int_x86_sse_div_ss : GCCBuiltin<"__builtin_ia32_divss">,
  30               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  31                          llvm_v4f32_ty], [IntrNoMem]>;
  32   def int_x86_sse_sqrt_ss : GCCBuiltin<"__builtin_ia32_sqrtss">,
  33               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  34                         [IntrNoMem]>;
  35   def int_x86_sse_sqrt_ps : GCCBuiltin<"__builtin_ia32_sqrtps">,
  36               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  37                         [IntrNoMem]>;
  38   def int_x86_sse_rcp_ss : GCCBuiltin<"__builtin_ia32_rcpss">,
  39               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  40                         [IntrNoMem]>;
  41   def int_x86_sse_rcp_ps : GCCBuiltin<"__builtin_ia32_rcpps">,
  42               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  43                         [IntrNoMem]>;
  44   def int_x86_sse_rsqrt_ss : GCCBuiltin<"__builtin_ia32_rsqrtss">,
  45               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  46                         [IntrNoMem]>;
  47   def int_x86_sse_rsqrt_ps : GCCBuiltin<"__builtin_ia32_rsqrtps">,
  48               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  49                         [IntrNoMem]>;
  50   def int_x86_sse_min_ss : GCCBuiltin<"__builtin_ia32_minss">,
  51               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  52                          llvm_v4f32_ty], [IntrNoMem]>;
  53   def int_x86_sse_min_ps : GCCBuiltin<"__builtin_ia32_minps">,
  54               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  55                          llvm_v4f32_ty], [IntrNoMem]>;
  56   def int_x86_sse_max_ss : GCCBuiltin<"__builtin_ia32_maxss">,
  57               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  58                          llvm_v4f32_ty], [IntrNoMem]>;
  59   def int_x86_sse_max_ps : GCCBuiltin<"__builtin_ia32_maxps">,
  60               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  61                          llvm_v4f32_ty], [IntrNoMem]>;
  62 }
  63
  64 // Comparison ops
  65 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
  66   def int_x86_sse_cmp_ss :
  67               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  68                          llvm_v4f32_ty, llvm_i8_ty], [IntrNoMem]>;
  69   def int_x86_sse_cmp_ps :
  70               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  71                          llvm_v4f32_ty, llvm_i8_ty], [IntrNoMem]>;
  72   def int_x86_sse_comieq_ss : GCCBuiltin<"__builtin_ia32_comieq">,
  73               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  74                          llvm_v4f32_ty], [IntrNoMem]>;
  75   def int_x86_sse_comilt_ss : GCCBuiltin<"__builtin_ia32_comilt">,
  76               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  77                          llvm_v4f32_ty], [IntrNoMem]>;
  78   def int_x86_sse_comile_ss : GCCBuiltin<"__builtin_ia32_comile">,
  79               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  80                          llvm_v4f32_ty], [IntrNoMem]>;
  81   def int_x86_sse_comigt_ss : GCCBuiltin<"__builtin_ia32_comigt">,
  82               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  83                          llvm_v4f32_ty], [IntrNoMem]>;
  84   def int_x86_sse_comige_ss : GCCBuiltin<"__builtin_ia32_comige">,
  85               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  86                          llvm_v4f32_ty], [IntrNoMem]>;
  87   def int_x86_sse_comineq_ss : GCCBuiltin<"__builtin_ia32_comineq">,
  88               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  89                          llvm_v4f32_ty], [IntrNoMem]>;
  90   def int_x86_sse_ucomieq_ss : GCCBuiltin<"__builtin_ia32_ucomieq">,
  91               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  92                          llvm_v4f32_ty], [IntrNoMem]>;
  93   def int_x86_sse_ucomilt_ss : GCCBuiltin<"__builtin_ia32_ucomilt">,
  94               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  95                          llvm_v4f32_ty], [IntrNoMem]>;
  96   def int_x86_sse_ucomile_ss : GCCBuiltin<"__builtin_ia32_ucomile">,
  97               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  98                          llvm_v4f32_ty], [IntrNoMem]>;
  99   def int_x86_sse_ucomigt_ss : GCCBuiltin<"__builtin_ia32_ucomigt">,
 100               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
 101                          llvm_v4f32_ty], [IntrNoMem]>;
 102   def int_x86_sse_ucomige_ss : GCCBuiltin<"__builtin_ia32_ucomige">,
 103               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
 104                          llvm_v4f32_ty], [IntrNoMem]>;
 105   def int_x86_sse_ucomineq_ss : GCCBuiltin<"__builtin_ia32_ucomineq">,
 106               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
 107                          llvm_v4f32_ty], [IntrNoMem]>;
 108 }
 109
 110
 111 // Conversion ops
 112 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 113   def int_x86_sse_cvtss2si : GCCBuiltin<"__builtin_ia32_cvtss2si">,
 114               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
 115   def int_x86_sse_cvtss2si64 : GCCBuiltin<"__builtin_ia32_cvtss2si64">,
 116               Intrinsic<[llvm_i64_ty, llvm_v4f32_ty], [IntrNoMem]>;
 117   def int_x86_sse_cvttss2si : GCCBuiltin<"__builtin_ia32_cvttss2si">,
 118               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
 119   def int_x86_sse_cvttss2si64 : GCCBuiltin<"__builtin_ia32_cvttss2si64">,
 120               Intrinsic<[llvm_i64_ty, llvm_v4f32_ty], [IntrNoMem]>;
 121   def int_x86_sse_cvtsi2ss : GCCBuiltin<"__builtin_ia32_cvtsi2ss">,
 122               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 123                          llvm_i32_ty], [IntrNoMem]>;
 124   def int_x86_sse_cvtsi642ss : GCCBuiltin<"__builtin_ia32_cvtsi642ss">,
 125               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 126                          llvm_i64_ty], [IntrNoMem]>;
 127   def int_x86_sse_cvtps2pi : GCCBuiltin<"__builtin_ia32_cvtps2pi">,
 128               Intrinsic<[llvm_v2i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
 129   def int_x86_sse_cvttps2pi: GCCBuiltin<"__builtin_ia32_cvttps2pi">,
 130               Intrinsic<[llvm_v2i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
 131   def int_x86_sse_cvtpi2ps : GCCBuiltin<"__builtin_ia32_cvtpi2ps">,
 132               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 133                          llvm_v2i32_ty], [IntrNoMem]>;
 134 }
 135
 136 // SIMD load ops
 137 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 138   def int_x86_sse_loadu_ps : GCCBuiltin<"__builtin_ia32_loadups">,
 139               Intrinsic<[llvm_v4f32_ty, llvm_ptr_ty], [IntrReadMem]>;
 140 }
 141
 142 // SIMD store ops
 143 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 144   def int_x86_sse_storeu_ps : GCCBuiltin<"__builtin_ia32_storeups">,
 145               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 146                          llvm_v4f32_ty], [IntrWriteMem]>;
 147 }
 148
 149 // Cacheability support ops
 150 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 151   def int_x86_sse_movnt_ps : GCCBuiltin<"__builtin_ia32_movntps">,
 152               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 153                          llvm_v4f32_ty], [IntrWriteMem]>;
 154   def int_x86_sse_sfence : GCCBuiltin<"__builtin_ia32_sfence">,
 155               Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
 156 }
 157
 158 // Control register.
 159 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 160   def int_x86_sse_stmxcsr :
 161               Intrinsic<[llvm_void_ty, llvm_ptr_ty], [IntrWriteMem]>;
 162   def int_x86_sse_ldmxcsr :
 163               Intrinsic<[llvm_void_ty, llvm_ptr_ty], [IntrWriteMem]>;
 164 }
 165
 166 // Misc.
 167 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 168   def int_x86_sse_movmsk_ps : GCCBuiltin<"__builtin_ia32_movmskps">,
 169               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
 170 }
 171
 172 //===----------------------------------------------------------------------===//
 173 // SSE2
 174
 175 // FP arithmetic ops
 176 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 177   def int_x86_sse2_add_sd : GCCBuiltin<"__builtin_ia32_addsd">,
 178               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 179                          llvm_v2f64_ty], [IntrNoMem]>;
 180   def int_x86_sse2_sub_sd : GCCBuiltin<"__builtin_ia32_subsd">,
 181               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 182                          llvm_v2f64_ty], [IntrNoMem]>;
 183   def int_x86_sse2_mul_sd : GCCBuiltin<"__builtin_ia32_mulsd">,
 184               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 185                          llvm_v2f64_ty], [IntrNoMem]>;
 186   def int_x86_sse2_div_sd : GCCBuiltin<"__builtin_ia32_divsd">,
 187               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 188                          llvm_v2f64_ty], [IntrNoMem]>;
 189   def int_x86_sse2_sqrt_sd : GCCBuiltin<"__builtin_ia32_sqrtsd">,
 190               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
 191                         [IntrNoMem]>;
 192   def int_x86_sse2_sqrt_pd : GCCBuiltin<"__builtin_ia32_sqrtpd">,
 193               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
 194                         [IntrNoMem]>;
 195   def int_x86_sse2_min_sd : GCCBuiltin<"__builtin_ia32_minsd">,
 196               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 197                          llvm_v2f64_ty], [IntrNoMem]>;
 198   def int_x86_sse2_min_pd : GCCBuiltin<"__builtin_ia32_minpd">,
 199               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 200                          llvm_v2f64_ty], [IntrNoMem]>;
 201   def int_x86_sse2_max_sd : GCCBuiltin<"__builtin_ia32_maxsd">,
 202               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 203                          llvm_v2f64_ty], [IntrNoMem]>;
 204   def int_x86_sse2_max_pd : GCCBuiltin<"__builtin_ia32_maxpd">,
 205               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 206                          llvm_v2f64_ty], [IntrNoMem]>;
 207 }
 208
 209 // FP comparison ops
 210 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 211   def int_x86_sse2_cmp_sd :
 212               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 213                          llvm_v2f64_ty, llvm_i8_ty], [IntrNoMem]>;
 214   def int_x86_sse2_cmp_pd :
 215               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 216                          llvm_v2f64_ty, llvm_i8_ty], [IntrNoMem]>;
 217   def int_x86_sse2_comieq_sd : GCCBuiltin<"__builtin_ia32_comisdeq">,
 218               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 219                          llvm_v2f64_ty], [IntrNoMem]>;
 220   def int_x86_sse2_comilt_sd : GCCBuiltin<"__builtin_ia32_comisdlt">,
 221               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 222                          llvm_v2f64_ty], [IntrNoMem]>;
 223   def int_x86_sse2_comile_sd : GCCBuiltin<"__builtin_ia32_comisdle">,
 224               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 225                          llvm_v2f64_ty], [IntrNoMem]>;
 226   def int_x86_sse2_comigt_sd : GCCBuiltin<"__builtin_ia32_comisdgt">,
 227               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 228                          llvm_v2f64_ty], [IntrNoMem]>;
 229   def int_x86_sse2_comige_sd : GCCBuiltin<"__builtin_ia32_comisdge">,
 230               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 231                          llvm_v2f64_ty], [IntrNoMem]>;
 232   def int_x86_sse2_comineq_sd : GCCBuiltin<"__builtin_ia32_comisdneq">,
 233               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 234                          llvm_v2f64_ty], [IntrNoMem]>;
 235   def int_x86_sse2_ucomieq_sd : GCCBuiltin<"__builtin_ia32_ucomisdeq">,
 236               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 237                          llvm_v2f64_ty], [IntrNoMem]>;
 238   def int_x86_sse2_ucomilt_sd : GCCBuiltin<"__builtin_ia32_ucomisdlt">,
 239               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 240                          llvm_v2f64_ty], [IntrNoMem]>;
 241   def int_x86_sse2_ucomile_sd : GCCBuiltin<"__builtin_ia32_ucomisdle">,
 242               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 243                          llvm_v2f64_ty], [IntrNoMem]>;
 244   def int_x86_sse2_ucomigt_sd : GCCBuiltin<"__builtin_ia32_ucomisdgt">,
 245               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 246                          llvm_v2f64_ty], [IntrNoMem]>;
 247   def int_x86_sse2_ucomige_sd : GCCBuiltin<"__builtin_ia32_ucomisdge">,
 248               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 249                          llvm_v2f64_ty], [IntrNoMem]>;
 250   def int_x86_sse2_ucomineq_sd : GCCBuiltin<"__builtin_ia32_ucomisdneq">,
 251               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 252                          llvm_v2f64_ty], [IntrNoMem]>;
 253 }
 254
 255 // Integer arithmetic ops.
 256 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 257   def int_x86_sse2_padds_b : GCCBuiltin<"__builtin_ia32_paddsb128">,
 258               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 259                          llvm_v16i8_ty], [IntrNoMem]>;
 260   def int_x86_sse2_padds_w : GCCBuiltin<"__builtin_ia32_paddsw128">,
 261               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 262                          llvm_v8i16_ty], [IntrNoMem]>;
 263   def int_x86_sse2_paddus_b : GCCBuiltin<"__builtin_ia32_paddusb128">,
 264               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 265                          llvm_v16i8_ty], [IntrNoMem]>;
 266   def int_x86_sse2_paddus_w : GCCBuiltin<"__builtin_ia32_paddusw128">,
 267               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 268                          llvm_v8i16_ty], [IntrNoMem]>;
 269   def int_x86_sse2_psubs_b : GCCBuiltin<"__builtin_ia32_psubsb128">,
 270               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 271                          llvm_v16i8_ty], [IntrNoMem]>;
 272   def int_x86_sse2_psubs_w : GCCBuiltin<"__builtin_ia32_psubsw128">,
 273               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 274                          llvm_v8i16_ty], [IntrNoMem]>;
 275   def int_x86_sse2_psubus_b : GCCBuiltin<"__builtin_ia32_psubusb128">,
 276               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 277                          llvm_v16i8_ty], [IntrNoMem]>;
 278   def int_x86_sse2_psubus_w : GCCBuiltin<"__builtin_ia32_psubusw128">,
 279               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 280                          llvm_v8i16_ty], [IntrNoMem]>;
 281   def int_x86_sse2_pmulhu_w : GCCBuiltin<"__builtin_ia32_pmulhuw128">,
 282               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 283                          llvm_v8i16_ty], [IntrNoMem]>;
 284   def int_x86_sse2_pmulh_w : GCCBuiltin<"__builtin_ia32_pmulhw128">,
 285               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 286                          llvm_v8i16_ty], [IntrNoMem]>;
 287   def int_x86_sse2_pmulu_dq : GCCBuiltin<"__builtin_ia32_pmuludq128">,
 288               Intrinsic<[llvm_v2i64_ty, llvm_v4i32_ty,
 289                          llvm_v4i32_ty], [IntrNoMem]>;
 290   def int_x86_sse2_pmadd_wd : GCCBuiltin<"__builtin_ia32_pmaddwd128">,
 291               Intrinsic<[llvm_v4i32_ty, llvm_v8i16_ty,
 292                          llvm_v8i16_ty], [IntrNoMem]>;
 293   def int_x86_sse2_pavg_b : GCCBuiltin<"__builtin_ia32_pavgb128">,
 294               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 295                          llvm_v16i8_ty], [IntrNoMem]>;
 296   def int_x86_sse2_pavg_w : GCCBuiltin<"__builtin_ia32_pavgw128">,
 297               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 298                          llvm_v8i16_ty], [IntrNoMem]>;
 299   def int_x86_sse2_pmaxu_b : GCCBuiltin<"__builtin_ia32_pmaxub128">,
 300               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 301                          llvm_v16i8_ty], [IntrNoMem]>;
 302   def int_x86_sse2_pmaxs_w : GCCBuiltin<"__builtin_ia32_pmaxsw128">,
 303               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 304                          llvm_v8i16_ty], [IntrNoMem]>;
 305   def int_x86_sse2_pminu_b : GCCBuiltin<"__builtin_ia32_pminub128">,
 306               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 307                          llvm_v16i8_ty], [IntrNoMem]>;
 308   def int_x86_sse2_pmins_w : GCCBuiltin<"__builtin_ia32_pminsw128">,
 309               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 310                          llvm_v8i16_ty], [IntrNoMem]>;
 311   def int_x86_sse2_psad_bw : GCCBuiltin<"__builtin_ia32_psadbw128">,
 312               Intrinsic<[llvm_v2i64_ty, llvm_v16i8_ty,
 313                          llvm_v16i8_ty], [IntrNoMem]>;
 314 }
 315
 316 // Integer shift ops.
 317 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 318   def int_x86_sse2_psll_w : GCCBuiltin<"__builtin_ia32_psllw128">,
 319               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 320                          llvm_v8i16_ty], [IntrNoMem]>;
 321   def int_x86_sse2_psll_d : GCCBuiltin<"__builtin_ia32_pslld128">,
 322               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 323                          llvm_v4i32_ty], [IntrNoMem]>;
 324   def int_x86_sse2_psll_q : GCCBuiltin<"__builtin_ia32_psllq128">,
 325               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 326                          llvm_v2i64_ty], [IntrNoMem]>;
 327   def int_x86_sse2_psrl_w : GCCBuiltin<"__builtin_ia32_psrlw128">,
 328               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 329                          llvm_v8i16_ty], [IntrNoMem]>;
 330   def int_x86_sse2_psrl_d : GCCBuiltin<"__builtin_ia32_psrld128">,
 331               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 332                          llvm_v4i32_ty], [IntrNoMem]>;
 333   def int_x86_sse2_psrl_q : GCCBuiltin<"__builtin_ia32_psrlq128">,
 334               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 335                          llvm_v2i64_ty], [IntrNoMem]>;
 336   def int_x86_sse2_psra_w : GCCBuiltin<"__builtin_ia32_psraw128">,
 337               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 338                          llvm_v8i16_ty], [IntrNoMem]>;
 339   def int_x86_sse2_psra_d : GCCBuiltin<"__builtin_ia32_psrad128">,
 340               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 341                          llvm_v4i32_ty], [IntrNoMem]>;
 342
 343   def int_x86_sse2_pslli_w : GCCBuiltin<"__builtin_ia32_psllwi128">,
 344               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 345                          llvm_i32_ty], [IntrNoMem]>;
 346   def int_x86_sse2_pslli_d : GCCBuiltin<"__builtin_ia32_pslldi128">,
 347               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 348                          llvm_i32_ty], [IntrNoMem]>;
 349   def int_x86_sse2_pslli_q : GCCBuiltin<"__builtin_ia32_psllqi128">,
 350               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 351                          llvm_i32_ty], [IntrNoMem]>;
 352   def int_x86_sse2_psrli_w : GCCBuiltin<"__builtin_ia32_psrlwi128">,
 353               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 354                          llvm_i32_ty], [IntrNoMem]>;
 355   def int_x86_sse2_psrli_d : GCCBuiltin<"__builtin_ia32_psrldi128">,
 356               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 357                          llvm_i32_ty], [IntrNoMem]>;
 358   def int_x86_sse2_psrli_q : GCCBuiltin<"__builtin_ia32_psrlqi128">,
 359               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 360                          llvm_i32_ty], [IntrNoMem]>;
 361   def int_x86_sse2_psrai_w : GCCBuiltin<"__builtin_ia32_psrawi128">,
 362               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 363                          llvm_i32_ty], [IntrNoMem]>;
 364   def int_x86_sse2_psrai_d : GCCBuiltin<"__builtin_ia32_psradi128">,
 365               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 366                          llvm_i32_ty], [IntrNoMem]>;
 367
 368   def int_x86_sse2_psll_dq : GCCBuiltin<"__builtin_ia32_pslldqi128">,
 369               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 370                          llvm_i32_ty], [IntrNoMem]>;
 371   def int_x86_sse2_psrl_dq : GCCBuiltin<"__builtin_ia32_psrldqi128">,
 372               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 373                          llvm_i32_ty], [IntrNoMem]>;
 374 }
 375
 376 // Integer comparison ops
 377 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 378   def int_x86_sse2_pcmpeq_b : GCCBuiltin<"__builtin_ia32_pcmpeqb128">,
 379               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 380                          llvm_v16i8_ty], [IntrNoMem]>;
 381   def int_x86_sse2_pcmpeq_w : GCCBuiltin<"__builtin_ia32_pcmpeqw128">,
 382               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 383                          llvm_v8i16_ty], [IntrNoMem]>;
 384   def int_x86_sse2_pcmpeq_d : GCCBuiltin<"__builtin_ia32_pcmpeqd128">,
 385               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 386                          llvm_v4i32_ty], [IntrNoMem]>;
 387   def int_x86_sse2_pcmpgt_b : GCCBuiltin<"__builtin_ia32_pcmpgtb128">,
 388               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 389                          llvm_v16i8_ty], [IntrNoMem]>;
 390   def int_x86_sse2_pcmpgt_w : GCCBuiltin<"__builtin_ia32_pcmpgtw128">,
 391               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 392                          llvm_v8i16_ty], [IntrNoMem]>;
 393   def int_x86_sse2_pcmpgt_d : GCCBuiltin<"__builtin_ia32_pcmpgtd128">,
 394               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 395                          llvm_v4i32_ty], [IntrNoMem]>;
 396 }
 397
 398 // Conversion ops
 399 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 400   def int_x86_sse2_cvtdq2pd : GCCBuiltin<"__builtin_ia32_cvtdq2pd">,
 401               Intrinsic<[llvm_v2f64_ty, llvm_v4i32_ty], [IntrNoMem]>;
 402   def int_x86_sse2_cvtdq2ps : GCCBuiltin<"__builtin_ia32_cvtdq2ps">,
 403               Intrinsic<[llvm_v4f32_ty, llvm_v4i32_ty], [IntrNoMem]>;
 404   def int_x86_sse2_cvtpd2dq : GCCBuiltin<"__builtin_ia32_cvtpd2dq">,
 405               Intrinsic<[llvm_v4i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 406   def int_x86_sse2_cvttpd2dq : GCCBuiltin<"__builtin_ia32_cvttpd2dq">,
 407               Intrinsic<[llvm_v4i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 408   def int_x86_sse2_cvtpd2ps : GCCBuiltin<"__builtin_ia32_cvtpd2ps">,
 409               Intrinsic<[llvm_v4f32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 410   def int_x86_sse2_cvtps2dq : GCCBuiltin<"__builtin_ia32_cvtps2dq">,
 411               Intrinsic<[llvm_v4i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
 412   def int_x86_sse2_cvttps2dq : GCCBuiltin<"__builtin_ia32_cvttps2dq">,
 413               Intrinsic<[llvm_v4i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
 414   def int_x86_sse2_cvtps2pd : GCCBuiltin<"__builtin_ia32_cvtps2pd">,
 415               Intrinsic<[llvm_v2f64_ty, llvm_v4f32_ty], [IntrNoMem]>;
 416   def int_x86_sse2_cvtsd2si : GCCBuiltin<"__builtin_ia32_cvtsd2si">,
 417               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 418   def int_x86_sse2_cvtsd2si64 : GCCBuiltin<"__builtin_ia32_cvtsd2si64">,
 419               Intrinsic<[llvm_i64_ty, llvm_v2f64_ty], [IntrNoMem]>;
 420   def int_x86_sse2_cvttsd2si : GCCBuiltin<"__builtin_ia32_cvttsd2si">,
 421               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 422   def int_x86_sse2_cvttsd2si64 : GCCBuiltin<"__builtin_ia32_cvttsd2si64">,
 423               Intrinsic<[llvm_i64_ty, llvm_v2f64_ty], [IntrNoMem]>;
 424   def int_x86_sse2_cvtsi2sd : GCCBuiltin<"__builtin_ia32_cvtsi2sd">,
 425               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 426                          llvm_i32_ty], [IntrNoMem]>;
 427   def int_x86_sse2_cvtsi642sd : GCCBuiltin<"__builtin_ia32_cvtsi642sd">,
 428               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 429                          llvm_i64_ty], [IntrNoMem]>;
 430   def int_x86_sse2_cvtsd2ss : GCCBuiltin<"__builtin_ia32_cvtsd2ss">,
 431               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 432                          llvm_v2f64_ty], [IntrNoMem]>;
 433   def int_x86_sse2_cvtss2sd : GCCBuiltin<"__builtin_ia32_cvtss2sd">,
 434               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 435                          llvm_v4f32_ty], [IntrNoMem]>;
 436   def int_x86_sse_cvtpd2pi : GCCBuiltin<"__builtin_ia32_cvtpd2pi">,
 437               Intrinsic<[llvm_v2i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 438   def int_x86_sse_cvttpd2pi: GCCBuiltin<"__builtin_ia32_cvttpd2pi">,
 439               Intrinsic<[llvm_v2i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 440   def int_x86_sse_cvtpi2pd : GCCBuiltin<"__builtin_ia32_cvtpi2pd">,
 441               Intrinsic<[llvm_v2f64_ty, llvm_v2i32_ty], [IntrNoMem]>;
 442 }
 443
 444 // SIMD load ops
 445 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 446   def int_x86_sse2_loadu_pd : GCCBuiltin<"__builtin_ia32_loadupd">,
 447               Intrinsic<[llvm_v2f64_ty, llvm_ptr_ty], [IntrReadMem]>;
 448   def int_x86_sse2_loadu_dq : GCCBuiltin<"__builtin_ia32_loaddqu">,
 449               Intrinsic<[llvm_v16i8_ty, llvm_ptr_ty], [IntrReadMem]>;
 450 }
 451
 452 // SIMD store ops
 453 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 454   def int_x86_sse2_storeu_pd : GCCBuiltin<"__builtin_ia32_storeupd">,
 455               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 456                          llvm_v2f64_ty], [IntrWriteMem]>;
 457   def int_x86_sse2_storeu_dq : GCCBuiltin<"__builtin_ia32_storedqu">,
 458               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 459                          llvm_v16i8_ty], [IntrWriteMem]>;
 460   def int_x86_sse2_storel_dq : GCCBuiltin<"__builtin_ia32_storelv4si">,
 461               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 462                          llvm_v4i32_ty], [IntrWriteMem]>;
 463 }
 464
 465 // Cacheability support ops
 466 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 467   def int_x86_sse2_movnt_dq : GCCBuiltin<"__builtin_ia32_movntdq">,
 468               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 469                          llvm_v2i64_ty], [IntrWriteMem]>;
 470   def int_x86_sse2_movnt_pd : GCCBuiltin<"__builtin_ia32_movntpd">,
 471               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 472                          llvm_v2f64_ty], [IntrWriteMem]>;
 473   def int_x86_sse2_movnt_i : GCCBuiltin<"__builtin_ia32_movnti">,
 474               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 475                          llvm_i32_ty], [IntrWriteMem]>;
 476 }
 477
 478 // Misc.
 479 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 480   def int_x86_sse2_packsswb_128 : GCCBuiltin<"__builtin_ia32_packsswb128">,
 481               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 482                          llvm_v8i16_ty], [IntrNoMem]>;
 483   def int_x86_sse2_packssdw_128 : GCCBuiltin<"__builtin_ia32_packssdw128">,
 484               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 485                          llvm_v4i32_ty], [IntrNoMem]>;
 486   def int_x86_sse2_packuswb_128 : GCCBuiltin<"__builtin_ia32_packuswb128">,
 487               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 488                          llvm_v8i16_ty], [IntrNoMem]>;
 489   def int_x86_sse2_movmsk_pd : GCCBuiltin<"__builtin_ia32_movmskpd">,
 490               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 491   def int_x86_sse2_pmovmskb_128 : GCCBuiltin<"__builtin_ia32_pmovmskb128">,
 492               Intrinsic<[llvm_i32_ty, llvm_v16i8_ty], [IntrNoMem]>;
 493   def int_x86_sse2_maskmov_dqu : GCCBuiltin<"__builtin_ia32_maskmovdqu">,
 494               Intrinsic<[llvm_void_ty, llvm_v16i8_ty,
 495                          llvm_v16i8_ty, llvm_ptr_ty], [IntrWriteMem]>;
 496   def int_x86_sse2_clflush : GCCBuiltin<"__builtin_ia32_clflush">,
 497               Intrinsic<[llvm_void_ty, llvm_ptr_ty], [IntrWriteMem]>;
 498   def int_x86_sse2_lfence : GCCBuiltin<"__builtin_ia32_lfence">,
 499               Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
 500   def int_x86_sse2_mfence : GCCBuiltin<"__builtin_ia32_mfence">,
 501               Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
 502 }
 503
 504 // Shuffles.
 505 // FIXME: Temporary workarounds since 2-wide shuffle is broken.
 506 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 507   def int_x86_sse2_punpckh_qdq : GCCBuiltin<"__builtin_ia32_punpckhqdq128">,
 508               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 509                          llvm_v2i64_ty], [IntrNoMem]>;
 510   def int_x86_sse2_punpckl_qdq : GCCBuiltin<"__builtin_ia32_punpcklqdq128">,
 511               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 512                          llvm_v2i64_ty], [IntrNoMem]>;
 513 }
 514
 515 //===----------------------------------------------------------------------===//
 516 // SSE3
 517
 518 // Addition / subtraction ops.
 519 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 520   def int_x86_sse3_addsub_ps : GCCBuiltin<"__builtin_ia32_addsubps">,
 521               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 522                          llvm_v4f32_ty], [IntrNoMem]>;
 523   def int_x86_sse3_addsub_pd : GCCBuiltin<"__builtin_ia32_addsubpd">,
 524               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 525                          llvm_v2f64_ty], [IntrNoMem]>;
 526 }
 527
 528 // Horizontal ops.
 529 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 530   def int_x86_sse3_hadd_ps : GCCBuiltin<"__builtin_ia32_haddps">,
 531               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 532                          llvm_v4f32_ty], [IntrNoMem]>;
 533   def int_x86_sse3_hadd_pd : GCCBuiltin<"__builtin_ia32_haddpd">,
 534               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 535                          llvm_v2f64_ty], [IntrNoMem]>;
 536   def int_x86_sse3_hsub_ps : GCCBuiltin<"__builtin_ia32_hsubps">,
 537               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 538                          llvm_v4f32_ty], [IntrNoMem]>;
 539   def int_x86_sse3_hsub_pd : GCCBuiltin<"__builtin_ia32_hsubpd">,
 540               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 541                          llvm_v2f64_ty], [IntrNoMem]>;
 542 }
 543
 544 // Specialized unaligned load.
 545 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 546   def int_x86_sse3_ldu_dq : GCCBuiltin<"__builtin_ia32_lddqu">,
 547               Intrinsic<[llvm_v16i8_ty, llvm_ptr_ty], [IntrReadMem]>;
 548 }
 549
 550 // Thread synchronization ops.
 551 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 552   def int_x86_sse3_monitor : GCCBuiltin<"__builtin_ia32_monitor">,
 553               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 554                          llvm_i32_ty, llvm_i32_ty], [IntrWriteMem]>;
 555   def int_x86_sse3_mwait : GCCBuiltin<"__builtin_ia32_mwait">,
 556               Intrinsic<[llvm_void_ty, llvm_i32_ty,
 557                          llvm_i32_ty], [IntrWriteMem]>;
 558 }
 559
 560 //===----------------------------------------------------------------------===//
 561 // SSSE3
 562
 563 // Horizontal arithmetic ops
 564 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 565   def int_x86_ssse3_phadd_w         : GCCBuiltin<"__builtin_ia32_phaddw">,
 566               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 567                          llvm_v4i16_ty], [IntrNoMem]>;
 568   def int_x86_ssse3_phadd_w_128     : GCCBuiltin<"__builtin_ia32_phaddw128">,
 569               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 570                          llvm_v8i16_ty], [IntrNoMem]>;
 571
 572   def int_x86_ssse3_phadd_d         : GCCBuiltin<"__builtin_ia32_phaddd">,
 573               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 574                          llvm_v2i32_ty], [IntrNoMem]>;
 575   def int_x86_ssse3_phadd_d_128     : GCCBuiltin<"__builtin_ia32_phaddd128">,
 576               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 577                          llvm_v4i32_ty], [IntrNoMem]>;
 578
 579   def int_x86_ssse3_phadd_sw        : GCCBuiltin<"__builtin_ia32_phaddsw">,
 580               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 581                          llvm_v4i16_ty], [IntrNoMem]>;
 582   def int_x86_ssse3_phadd_sw_128    : GCCBuiltin<"__builtin_ia32_phaddsw128">,
 583               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 584                          llvm_v4i32_ty], [IntrNoMem]>;
 585
 586   def int_x86_ssse3_phsub_w         : GCCBuiltin<"__builtin_ia32_phsubw">,
 587               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 588                          llvm_v4i16_ty], [IntrNoMem]>;
 589   def int_x86_ssse3_phsub_w_128     : GCCBuiltin<"__builtin_ia32_phsubw128">,
 590               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 591                          llvm_v8i16_ty], [IntrNoMem]>;
 592
 593   def int_x86_ssse3_phsub_d         : GCCBuiltin<"__builtin_ia32_phsubd">,
 594               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 595                          llvm_v2i32_ty], [IntrNoMem]>;
 596   def int_x86_ssse3_phsub_d_128     : GCCBuiltin<"__builtin_ia32_phsubd128">,
 597               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 598                          llvm_v4i32_ty], [IntrNoMem]>;
 599
 600   def int_x86_ssse3_phsub_sw        : GCCBuiltin<"__builtin_ia32_phsubsw">,
 601               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 602                          llvm_v4i16_ty], [IntrNoMem]>;
 603   def int_x86_ssse3_phsub_sw_128    : GCCBuiltin<"__builtin_ia32_phsubsw128">,
 604               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 605                          llvm_v8i16_ty], [IntrNoMem]>;
 606
 607   def int_x86_ssse3_pmadd_ub_sw     : GCCBuiltin<"__builtin_ia32_pmaddubsw">,
 608               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 609                          llvm_v4i16_ty], [IntrNoMem]>;
 610   def int_x86_ssse3_pmadd_ub_sw_128 : GCCBuiltin<"__builtin_ia32_pmaddubsw128">,
 611               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 612                          llvm_v8i16_ty], [IntrNoMem]>;
 613
 614   def int_x86_ssse3_pmul_hr_sw      : GCCBuiltin<"__builtin_ia32_pmulhrsw">,
 615               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 616                          llvm_v4i16_ty], [IntrNoMem]>;
 617   def int_x86_ssse3_pmul_hr_sw_128  : GCCBuiltin<"__builtin_ia32_pmulhrsw128">,
 618               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 619                          llvm_v8i16_ty], [IntrNoMem]>;
 620 }
 621
 622 // Shuffle ops
 623 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 624   def int_x86_ssse3_pshuf_b         : GCCBuiltin<"__builtin_ia32_pshufb">,
 625               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 626                          llvm_v8i8_ty], [IntrNoMem]>;
 627   def int_x86_ssse3_pshuf_b_128     : GCCBuiltin<"__builtin_ia32_pshufb128">,
 628               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 629                          llvm_v16i8_ty], [IntrNoMem]>;
 630 }
 631
 632 // Sign ops
 633 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 634   def int_x86_ssse3_psign_b         : GCCBuiltin<"__builtin_ia32_psignb">,
 635               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 636                          llvm_v8i8_ty], [IntrNoMem]>;
 637   def int_x86_ssse3_psign_b_128     : GCCBuiltin<"__builtin_ia32_psignb128">,
 638               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 639                          llvm_v16i8_ty], [IntrNoMem]>;
 640
 641   def int_x86_ssse3_psign_w         : GCCBuiltin<"__builtin_ia32_psignw">,
 642               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 643                          llvm_v4i16_ty], [IntrNoMem]>;
 644   def int_x86_ssse3_psign_w_128     : GCCBuiltin<"__builtin_ia32_psignw128">,
 645               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 646                          llvm_v8i16_ty], [IntrNoMem]>;
 647
 648   def int_x86_ssse3_psign_d         : GCCBuiltin<"__builtin_ia32_psignd">,
 649               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 650                          llvm_v2i32_ty], [IntrNoMem]>;
 651   def int_x86_ssse3_psign_d_128     : GCCBuiltin<"__builtin_ia32_psignd128">,
 652               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 653                          llvm_v4i32_ty], [IntrNoMem]>;
 654 }
 655
 656 // Absolute value ops
 657 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 658   def int_x86_ssse3_pabs_b     : GCCBuiltin<"__builtin_ia32_pabsb">,
 659               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty], [IntrNoMem]>;
 660   def int_x86_ssse3_pabs_b_128 : GCCBuiltin<"__builtin_ia32_pabsb128">,
 661               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty], [IntrNoMem]>;
 662
 663   def int_x86_ssse3_pabs_w     : GCCBuiltin<"__builtin_ia32_pabsw">,
 664               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty], [IntrNoMem]>;
 665   def int_x86_ssse3_pabs_w_128 : GCCBuiltin<"__builtin_ia32_pabsw128">,
 666               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty], [IntrNoMem]>;
 667
 668   def int_x86_ssse3_pabs_d     : GCCBuiltin<"__builtin_ia32_pabsd">,
 669               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty], [IntrNoMem]>;
 670   def int_x86_ssse3_pabs_d_128 : GCCBuiltin<"__builtin_ia32_pabsd128">,
 671               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty], [IntrNoMem]>;
 672 }
 673
 674 // Align ops
 675 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 676   def int_x86_ssse3_palign_r        : GCCBuiltin<"__builtin_ia32_palignr">,
 677               Intrinsic<[llvm_v1i64_ty, llvm_v1i64_ty,
 678                          llvm_v1i64_ty, llvm_i16_ty], [IntrNoMem]>;
 679   def int_x86_ssse3_palign_r_128    : GCCBuiltin<"__builtin_ia32_palignr128">,
 680               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 681                          llvm_v2i64_ty, llvm_i32_ty], [IntrNoMem]>;
 682 }
 683
 684 //===----------------------------------------------------------------------===//
 685 // SSE4.1
 686
 687 // FP rounding ops
 688 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 689   def int_x86_sse41_round_ss        : GCCBuiltin<"__builtin_ia32_roundss">,
 690               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 691                          llvm_i32_ty], [IntrNoMem]>;
 692   def int_x86_sse41_round_ps        : GCCBuiltin<"__builtin_ia32_roundps">,
 693               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 694                          llvm_i32_ty], [IntrNoMem]>;
 695   def int_x86_sse41_round_sd        : GCCBuiltin<"__builtin_ia32_roundsd">,
 696               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 697                          llvm_i32_ty], [IntrNoMem]>;
 698   def int_x86_sse41_round_pd        : GCCBuiltin<"__builtin_ia32_roundpd">,
 699               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 700                          llvm_i32_ty], [IntrNoMem]>;
 701 }
 702
 703 // Vector sign and zero extend
 704 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 705   def int_x86_sse41_pmovsxbd        : GCCBuiltin<"__builtin_ia32_pmovsxbd128">,
 706               Intrinsic<[llvm_v4i32_ty, llvm_v16i8_ty]>;
 707   def int_x86_sse41_pmovsxbq        : GCCBuiltin<"__builtin_ia32_pmovsxbq128">,
 708               Intrinsic<[llvm_v2i64_ty, llvm_v16i8_ty]>;
 709   def int_x86_sse41_pmovsxbw        : GCCBuiltin<"__builtin_ia32_pmovsxbw128">,
 710               Intrinsic<[llvm_v8i16_ty, llvm_v16i8_ty]>;
 711   def int_x86_sse41_pmovsxdq        : GCCBuiltin<"__builtin_ia32_pmovsxdq128">,
 712               Intrinsic<[llvm_v2i64_ty, llvm_v4i32_ty]>;
 713   def int_x86_sse41_pmovsxwd        : GCCBuiltin<"__builtin_ia32_pmovsxwd128">,
 714               Intrinsic<[llvm_v4i32_ty, llvm_v8i16_ty]>;
 715   def int_x86_sse41_pmovsxwq        : GCCBuiltin<"__builtin_ia32_pmovsxwq128">,
 716               Intrinsic<[llvm_v2i64_ty, llvm_v8i16_ty]>;
 717   def int_x86_sse41_pmovzxbd        : GCCBuiltin<"__builtin_ia32_pmovzxbd128">,
 718               Intrinsic<[llvm_v4i32_ty, llvm_v16i8_ty]>;
 719   def int_x86_sse41_pmovzxbq        : GCCBuiltin<"__builtin_ia32_pmovzxbq128">,
 720               Intrinsic<[llvm_v2i64_ty, llvm_v16i8_ty]>;
 721   def int_x86_sse41_pmovzxbw        : GCCBuiltin<"__builtin_ia32_pmovzxbw128">,
 722               Intrinsic<[llvm_v8i16_ty, llvm_v16i8_ty]>;
 723   def int_x86_sse41_pmovzxdq        : GCCBuiltin<"__builtin_ia32_pmovzxdq128">,
 724               Intrinsic<[llvm_v2i64_ty, llvm_v4i32_ty]>;
 725   def int_x86_sse41_pmovzxwd        : GCCBuiltin<"__builtin_ia32_pmovzxwd128">,
 726               Intrinsic<[llvm_v4i32_ty, llvm_v8i16_ty]>;
 727   def int_x86_sse41_pmovzxwq        : GCCBuiltin<"__builtin_ia32_pmovzxwq128">,
 728               Intrinsic<[llvm_v2i64_ty, llvm_v8i16_ty]>;
 729 }
 730
 731 // Vector min element
 732 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 733   def int_x86_sse41_phminposuw     : GCCBuiltin<"__builtin_ia32_phminposuw128">,
 734               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty]>;
 735 }
 736
 737 // Vector compare, min, max
 738 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 739   def int_x86_sse41_pcmpeqq         : GCCBuiltin<"__builtin_ia32_pcmpeqq">,
 740               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty, llvm_v2i64_ty]>;
 741   def int_x86_sse41_pmaxsb          : GCCBuiltin<"__builtin_ia32_pmaxsb128">,
 742               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty, llvm_v16i8_ty]>;
 743   def int_x86_sse41_pmaxsd          : GCCBuiltin<"__builtin_ia32_pmaxsd128">,
 744               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty, llvm_v4i32_ty]>;
 745   def int_x86_sse41_pmaxud          : GCCBuiltin<"__builtin_ia32_pmaxud128">,
 746               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty, llvm_v4i32_ty]>;
 747   def int_x86_sse41_pmaxuw          : GCCBuiltin<"__builtin_ia32_pmaxuw128">,
 748               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty, llvm_v8i16_ty]>;
 749   def int_x86_sse41_pminsb          : GCCBuiltin<"__builtin_ia32_pminsb128">,
 750               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty, llvm_v16i8_ty]>;
 751   def int_x86_sse41_pminsd          : GCCBuiltin<"__builtin_ia32_pminsd128">,
 752               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty, llvm_v4i32_ty]>;
 753   def int_x86_sse41_pminud          : GCCBuiltin<"__builtin_ia32_pminud128">,
 754               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty, llvm_v4i32_ty]>;
 755   def int_x86_sse41_pminuw          : GCCBuiltin<"__builtin_ia32_pminuw128">,
 756               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty, llvm_v8i16_ty]>;
 757 }
 758
 759 // Vector pack
 760 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 761   def int_x86_sse41_packusdw        : GCCBuiltin<"__builtin_ia32_packusdw128">,
 762               Intrinsic<[llvm_v8i16_ty, llvm_v4i32_ty, llvm_v4i32_ty]>;
 763 }
 764
 765 // Vector multiply
 766 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 767   def int_x86_sse41_pmuldq          : GCCBuiltin<"__builtin_ia32_pmuldq128">,
 768               Intrinsic<[llvm_v2i64_ty, llvm_v4i32_ty, llvm_v4i32_ty]>;
 769   def int_x86_sse41_pmulld          : GCCBuiltin<"__builtin_ia32_pmulld128">,
 770               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty, llvm_v4i32_ty]>;
 771 }
 772
 773 // Vector extract
 774 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 775   def int_x86_sse41_pextrb         :
 776               Intrinsic<[llvm_i32_ty, llvm_v16i8_ty, llvm_i32_ty]>;
 777   def int_x86_sse41_pextrd         :
 778               Intrinsic<[llvm_i32_ty, llvm_v4i32_ty, llvm_i32_ty]>;
 779   def int_x86_sse41_pextrq         :
 780               Intrinsic<[llvm_i64_ty, llvm_v2i64_ty, llvm_i32_ty]>;
 781   def int_x86_sse41_extractps      : GCCBuiltin<"__builtin_ia32_extractps128">,
 782               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty, llvm_i32_ty]>;
 783 }
 784
 785 // Vector insert
 786 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 787   def int_x86_sse41_pinsrb         : GCCBuiltin<"__builtin_ia32_vec_set_v16qi">,
 788           Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty, llvm_i32_ty, llvm_i32_ty]>;
 789   def int_x86_sse41_pinsrd         : GCCBuiltin<"__builtin_ia32_vec_set_v4si">,
 790           Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty, llvm_i32_ty, llvm_i32_ty]>;
 791   def int_x86_sse41_pinsrq         : GCCBuiltin<"__builtin_ia32_vec_set_v2di">,
 792           Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty, llvm_i64_ty, llvm_i32_ty]>;
 793   def int_x86_sse41_insertps       : GCCBuiltin<"__builtin_ia32_insertps128">,
 794           Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty, llvm_i32_ty]>;
 795 }
 796
 797 // Vector blend
 798 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 799   def int_x86_sse41_pblendvb         : GCCBuiltin<"__builtin_ia32_pblendvb128">,
 800         Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty, llvm_v16i8_ty, llvm_v16i8_ty]>;
 801   def int_x86_sse41_pblendw          : GCCBuiltin<"__builtin_ia32_pblendw128">,
 802         Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty, llvm_v8i16_ty, llvm_i32_ty]>;
 803   def int_x86_sse41_blendpd          : GCCBuiltin<"__builtin_ia32_blendpd">,
 804         Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty, llvm_v2f64_ty, llvm_i32_ty]>;
 805   def int_x86_sse41_blendps          : GCCBuiltin<"__builtin_ia32_blendps">,
 806         Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty, llvm_i32_ty]>;
 807   def int_x86_sse41_blendvpd         : GCCBuiltin<"__builtin_ia32_blendvpd">,
 808         Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty, llvm_v2f64_ty, llvm_v2f64_ty]>;
 809   def int_x86_sse41_blendvps         : GCCBuiltin<"__builtin_ia32_blendvps">,
 810         Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty]>;
 811 }
 812
 813 // Vector dot product
 814 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 815   def int_x86_sse41_dppd            : GCCBuiltin<"__builtin_ia32_dppd">,
 816           Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty, llvm_v2f64_ty, llvm_i32_ty]>;
 817   def int_x86_sse41_dpps            : GCCBuiltin<"__builtin_ia32_dpps">,
 818           Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty, llvm_i32_ty]>;
 819 }
 820
 821 // Vector sum of absolute differences
 822 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 823   def int_x86_sse41_mpsadbw         : GCCBuiltin<"__builtin_ia32_mpsadbw128">,
 824           Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty, llvm_v16i8_ty, llvm_i32_ty]>;
 825 }
 826
 827 // Vector sum of absolute differences
 828 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 829   def int_x86_sse41_movntdqa        : GCCBuiltin<"__builtin_ia32_movntdqa">,
 830           Intrinsic<[llvm_v2i64_ty, llvm_ptr_ty], [IntrReadMem]>;
 831 }
 832
 833
 834 //===----------------------------------------------------------------------===//
 835 // MMX
 836
 837 // Empty MMX state op.
 838 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 839   def int_x86_mmx_emms  : GCCBuiltin<"__builtin_ia32_emms">,
 840               Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
 841   def int_x86_mmx_femms : GCCBuiltin<"__builtin_ia32_femms">,
 842               Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
 843 }
 844
 845 // Integer arithmetic ops.
 846 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 847   // Addition
 848   def int_x86_mmx_padds_b : GCCBuiltin<"__builtin_ia32_paddsb">,
 849               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 850                          llvm_v8i8_ty], [IntrNoMem]>;
 851   def int_x86_mmx_padds_w : GCCBuiltin<"__builtin_ia32_paddsw">,
 852               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 853                          llvm_v4i16_ty], [IntrNoMem]>;
 854
 855   def int_x86_mmx_paddus_b : GCCBuiltin<"__builtin_ia32_paddusb">,
 856               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 857                          llvm_v8i8_ty], [IntrNoMem]>;
 858   def int_x86_mmx_paddus_w : GCCBuiltin<"__builtin_ia32_paddusw">,
 859               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 860                          llvm_v4i16_ty], [IntrNoMem]>;
 861
 862   // Subtraction
 863   def int_x86_mmx_psubs_b : GCCBuiltin<"__builtin_ia32_psubsb">,
 864               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 865                          llvm_v8i8_ty], [IntrNoMem]>;
 866   def int_x86_mmx_psubs_w : GCCBuiltin<"__builtin_ia32_psubsw">,
 867               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 868                          llvm_v4i16_ty], [IntrNoMem]>;
 869
 870   def int_x86_mmx_psubus_b : GCCBuiltin<"__builtin_ia32_psubusb">,
 871               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 872                          llvm_v8i8_ty], [IntrNoMem]>;
 873   def int_x86_mmx_psubus_w : GCCBuiltin<"__builtin_ia32_psubusw">,
 874               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 875                          llvm_v4i16_ty], [IntrNoMem]>;
 876
 877   // Multiplication
 878   def int_x86_mmx_pmulh_w : GCCBuiltin<"__builtin_ia32_pmulhw">,
 879               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 880                          llvm_v4i16_ty], [IntrNoMem]>;
 881   def int_x86_mmx_pmulhu_w : GCCBuiltin<"__builtin_ia32_pmulhuw">,
 882               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 883                          llvm_v4i16_ty], [IntrNoMem]>;
 884   def int_x86_mmx_pmulu_dq : GCCBuiltin<"__builtin_ia32_pmuludq">,
 885               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 886                          llvm_v2i32_ty], [IntrNoMem]>;
 887   def int_x86_mmx_pmadd_wd : GCCBuiltin<"__builtin_ia32_pmaddwd">,
 888               Intrinsic<[llvm_v2i32_ty, llvm_v4i16_ty,
 889                          llvm_v4i16_ty], [IntrNoMem]>;
 890
 891   // Averages
 892   def int_x86_mmx_pavg_b : GCCBuiltin<"__builtin_ia32_pavgb">,
 893               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 894                          llvm_v8i8_ty], [IntrNoMem]>;
 895   def int_x86_mmx_pavg_w : GCCBuiltin<"__builtin_ia32_pavgw">,
 896               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 897                          llvm_v4i16_ty], [IntrNoMem]>;
 898
 899   // Maximum
 900   def int_x86_mmx_pmaxu_b : GCCBuiltin<"__builtin_ia32_pmaxub">,
 901               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 902                          llvm_v8i8_ty], [IntrNoMem]>;
 903   def int_x86_mmx_pmaxs_w : GCCBuiltin<"__builtin_ia32_pmaxsw">,
 904               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 905                          llvm_v4i16_ty], [IntrNoMem]>;
 906
 907   // Minimum
 908   def int_x86_mmx_pminu_b : GCCBuiltin<"__builtin_ia32_pminub">,
 909               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 910                          llvm_v8i8_ty], [IntrNoMem]>;
 911   def int_x86_mmx_pmins_w : GCCBuiltin<"__builtin_ia32_pminsw">,
 912               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 913                          llvm_v4i16_ty], [IntrNoMem]>;
 914
 915   // Packed sum of absolute differences
 916   def int_x86_mmx_psad_bw : GCCBuiltin<"__builtin_ia32_psadbw">,
 917               Intrinsic<[llvm_v4i16_ty, llvm_v8i8_ty,
 918                          llvm_v8i8_ty], [IntrNoMem]>;
 919 }
 920
 921 // Integer shift ops.
 922 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 923   // Shift left logical
 924   def int_x86_mmx_psll_w : GCCBuiltin<"__builtin_ia32_psllw">,
 925               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 926                          llvm_v1i64_ty], [IntrNoMem]>;
 927   def int_x86_mmx_psll_d : GCCBuiltin<"__builtin_ia32_pslld">,
 928               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 929                          llvm_v1i64_ty], [IntrNoMem]>;
 930   def int_x86_mmx_psll_q : GCCBuiltin<"__builtin_ia32_psllq">,
 931               Intrinsic<[llvm_v1i64_ty, llvm_v1i64_ty,
 932                          llvm_v1i64_ty], [IntrNoMem]>;
 933
 934   def int_x86_mmx_psrl_w : GCCBuiltin<"__builtin_ia32_psrlw">,
 935               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 936                          llvm_v1i64_ty], [IntrNoMem]>;
 937   def int_x86_mmx_psrl_d : GCCBuiltin<"__builtin_ia32_psrld">,
 938               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 939                          llvm_v1i64_ty], [IntrNoMem]>;
 940   def int_x86_mmx_psrl_q : GCCBuiltin<"__builtin_ia32_psrlq">,
 941               Intrinsic<[llvm_v1i64_ty,   llvm_v1i64_ty,
 942                          llvm_v1i64_ty], [IntrNoMem]>;
 943
 944   def int_x86_mmx_psra_w : GCCBuiltin<"__builtin_ia32_psraw">,
 945               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 946                          llvm_v1i64_ty], [IntrNoMem]>;
 947   def int_x86_mmx_psra_d : GCCBuiltin<"__builtin_ia32_psrad">,
 948               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 949                          llvm_v1i64_ty], [IntrNoMem]>;
 950
 951   def int_x86_mmx_pslli_w : GCCBuiltin<"__builtin_ia32_psllwi">,
 952               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 953                          llvm_i32_ty], [IntrNoMem]>;
 954   def int_x86_mmx_pslli_d : GCCBuiltin<"__builtin_ia32_pslldi">,
 955               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 956                          llvm_i32_ty], [IntrNoMem]>;
 957   def int_x86_mmx_pslli_q : GCCBuiltin<"__builtin_ia32_psllqi">,
 958               Intrinsic<[llvm_v1i64_ty, llvm_v1i64_ty,
 959                          llvm_i32_ty], [IntrNoMem]>;
 960
 961   def int_x86_mmx_psrli_w : GCCBuiltin<"__builtin_ia32_psrlwi">,
 962               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 963                          llvm_i32_ty], [IntrNoMem]>;
 964   def int_x86_mmx_psrli_d : GCCBuiltin<"__builtin_ia32_psrldi">,
 965               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 966                          llvm_i32_ty], [IntrNoMem]>;
 967   def int_x86_mmx_psrli_q : GCCBuiltin<"__builtin_ia32_psrlqi">,
 968               Intrinsic<[llvm_v1i64_ty,   llvm_v1i64_ty,
 969                          llvm_i32_ty], [IntrNoMem]>;
 970
 971   def int_x86_mmx_psrai_w : GCCBuiltin<"__builtin_ia32_psrawi">,
 972               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 973                          llvm_i32_ty], [IntrNoMem]>;
 974   def int_x86_mmx_psrai_d : GCCBuiltin<"__builtin_ia32_psradi">,
 975               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 976                          llvm_i32_ty], [IntrNoMem]>;
 977 }
 978
 979 // Pack ops.
 980 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 981   def int_x86_mmx_packsswb : GCCBuiltin<"__builtin_ia32_packsswb">,
 982               Intrinsic<[llvm_v8i8_ty, llvm_v4i16_ty,
 983                          llvm_v4i16_ty], [IntrNoMem]>;
 984   def int_x86_mmx_packssdw : GCCBuiltin<"__builtin_ia32_packssdw">,
 985               Intrinsic<[llvm_v4i16_ty, llvm_v2i32_ty,
 986                          llvm_v2i32_ty], [IntrNoMem]>;
 987   def int_x86_mmx_packuswb : GCCBuiltin<"__builtin_ia32_packuswb">,
 988               Intrinsic<[llvm_v8i8_ty, llvm_v4i16_ty,
 989                          llvm_v4i16_ty], [IntrNoMem]>;
 990 }
 991
 992 // Integer comparison ops
 993 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 994   def int_x86_mmx_pcmpeq_b : GCCBuiltin<"__builtin_ia32_pcmpeqb">,
 995               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 996                          llvm_v8i8_ty], [IntrNoMem]>;
 997   def int_x86_mmx_pcmpeq_w : GCCBuiltin<"__builtin_ia32_pcmpeqw">,
 998               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 999                          llvm_v4i16_ty], [IntrNoMem]>;
1000   def int_x86_mmx_pcmpeq_d : GCCBuiltin<"__builtin_ia32_pcmpeqd">,
1001               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
1002                          llvm_v2i32_ty], [IntrNoMem]>;
1003
1004   def int_x86_mmx_pcmpgt_b : GCCBuiltin<"__builtin_ia32_pcmpgtb">,
1005               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
1006                          llvm_v8i8_ty], [IntrNoMem]>;
1007   def int_x86_mmx_pcmpgt_w : GCCBuiltin<"__builtin_ia32_pcmpgtw">,
1008               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
1009                          llvm_v4i16_ty], [IntrNoMem]>;
1010   def int_x86_mmx_pcmpgt_d : GCCBuiltin<"__builtin_ia32_pcmpgtd">,
1011               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
1012                          llvm_v2i32_ty], [IntrNoMem]>;
1013 }
1014
1015 // Misc.
1016 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
1017   def int_x86_mmx_maskmovq : GCCBuiltin<"__builtin_ia32_maskmovq">,
1018               Intrinsic<[llvm_void_ty, llvm_v8i8_ty, llvm_v8i8_ty, llvm_ptr_ty],
1019                         [IntrWriteMem]>;
1020
1021   def int_x86_mmx_pmovmskb : GCCBuiltin<"__builtin_ia32_pmovmskb">,
1022               Intrinsic<[llvm_i32_ty, llvm_v8i8_ty], [IntrNoMem]>;
1023
1024   def int_x86_mmx_movnt_dq : GCCBuiltin<"__builtin_ia32_movntq">,
1025               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
1026                          llvm_v1i64_ty], [IntrWriteMem]>;
1027 }