1 //===-- llvm/MC/MCInst.h - MCInst class -------------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the declaration of the MCInst and MCOperand classes, which
11 // is the basic representation used to represent low-level machine code
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_MC_MCINST_H
17 #define LLVM_MC_MCINST_H
19 #include "llvm/ADT/SmallVector.h"
20 #include "llvm/System/DataTypes.h"
27 /// MCOperand - Instances of this class represent operands of the MCInst class.
28 /// This is a simple discriminated union.
30 enum MachineOperandType {
31 kInvalid, ///< Uninitialized.
32 kRegister, ///< Register operand.
33 kImmediate, ///< Immediate operand.
34 kExpr ///< Relocatable immediate operand.
41 const MCExpr *ExprVal;
45 MCOperand() : Kind(kInvalid) {}
47 bool isValid() const { return Kind != kInvalid; }
48 bool isReg() const { return Kind == kRegister; }
49 bool isImm() const { return Kind == kImmediate; }
50 bool isExpr() const { return Kind == kExpr; }
52 /// getReg - Returns the register number.
53 unsigned getReg() const {
54 assert(isReg() && "This is not a register operand!");
58 /// setReg - Set the register number.
59 void setReg(unsigned Reg) {
60 assert(isReg() && "This is not a register operand!");
64 int64_t getImm() const {
65 assert(isImm() && "This is not an immediate");
68 void setImm(int64_t Val) {
69 assert(isImm() && "This is not an immediate");
73 const MCExpr *getExpr() const {
74 assert(isExpr() && "This is not an expression");
77 void setExpr(const MCExpr *Val) {
78 assert(isExpr() && "This is not an expression");
82 static MCOperand CreateReg(unsigned Reg) {
88 static MCOperand CreateImm(int64_t Val) {
94 static MCOperand CreateExpr(const MCExpr *Val) {
101 void print(raw_ostream &OS, const MCAsmInfo *MAI) const;
106 /// MCInst - Instances of this class represent a single low-level machine
110 SmallVector<MCOperand, 8> Operands;
112 MCInst() : Opcode(0) {}
114 void setOpcode(unsigned Op) { Opcode = Op; }
116 unsigned getOpcode() const { return Opcode; }
118 const MCOperand &getOperand(unsigned i) const { return Operands[i]; }
119 MCOperand &getOperand(unsigned i) { return Operands[i]; }
120 unsigned getNumOperands() const { return Operands.size(); }
122 void addOperand(const MCOperand &Op) {
123 Operands.push_back(Op);
126 void print(raw_ostream &OS, const MCAsmInfo *MAI) const;
131 } // end namespace llvm