1 //===-- llvm/MC/MCInst.h - MCInst class -------------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the declaration of the MCInst and MCOperand classes, which
11 // is the basic representation used to represent low-level machine code
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_MC_MCINST_H
17 #define LLVM_MC_MCINST_H
19 #include "llvm/ADT/SmallVector.h"
20 #include "llvm/ADT/StringRef.h"
21 #include "llvm/System/DataTypes.h"
29 /// MCOperand - Instances of this class represent operands of the MCInst class.
30 /// This is a simple discriminated union.
32 enum MachineOperandType {
33 kInvalid, ///< Uninitialized.
34 kRegister, ///< Register operand.
35 kImmediate, ///< Immediate operand.
36 kFPImmediate, ///< Floating-point immediate operand.
37 kExpr ///< Relocatable immediate operand.
45 const MCExpr *ExprVal;
49 MCOperand() : Kind(kInvalid), FPImmVal(0.0) {}
51 bool isValid() const { return Kind != kInvalid; }
52 bool isReg() const { return Kind == kRegister; }
53 bool isImm() const { return Kind == kImmediate; }
54 bool isFPImm() const { return Kind == kFPImmediate; }
55 bool isExpr() const { return Kind == kExpr; }
57 /// getReg - Returns the register number.
58 unsigned getReg() const {
59 assert(isReg() && "This is not a register operand!");
63 /// setReg - Set the register number.
64 void setReg(unsigned Reg) {
65 assert(isReg() && "This is not a register operand!");
69 int64_t getImm() const {
70 assert(isImm() && "This is not an immediate");
73 void setImm(int64_t Val) {
74 assert(isImm() && "This is not an immediate");
78 double getFPImm() const {
79 assert(isFPImm() && "This is not an FP immediate");
83 void setFPImm(double Val) {
84 assert(isFPImm() && "This is not an FP immediate");
88 const MCExpr *getExpr() const {
89 assert(isExpr() && "This is not an expression");
92 void setExpr(const MCExpr *Val) {
93 assert(isExpr() && "This is not an expression");
97 static MCOperand CreateReg(unsigned Reg) {
103 static MCOperand CreateImm(int64_t Val) {
105 Op.Kind = kImmediate;
109 static MCOperand CreateFPImm(double Val) {
111 Op.Kind = kFPImmediate;
115 static MCOperand CreateExpr(const MCExpr *Val) {
122 void print(raw_ostream &OS, const MCAsmInfo *MAI) const;
127 /// MCInst - Instances of this class represent a single low-level machine
131 SmallVector<MCOperand, 8> Operands;
133 MCInst() : Opcode(0) {}
135 void setOpcode(unsigned Op) { Opcode = Op; }
137 unsigned getOpcode() const { return Opcode; }
139 const MCOperand &getOperand(unsigned i) const { return Operands[i]; }
140 MCOperand &getOperand(unsigned i) { return Operands[i]; }
141 unsigned getNumOperands() const { return Operands.size(); }
143 void addOperand(const MCOperand &Op) {
144 Operands.push_back(Op);
147 void print(raw_ostream &OS, const MCAsmInfo *MAI) const;
150 /// \brief Dump the MCInst as prettily as possible using the additional MC
151 /// structures, if given. Operators are separated by the \arg Separator
153 void dump_pretty(raw_ostream &OS, const MCAsmInfo *MAI = 0,
154 const MCInstPrinter *Printer = 0,
155 StringRef Separator = " ") const;
159 } // end namespace llvm