1 //===-- llvm/MC/MCInst.h - MCInst class -------------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the declaration of the MCInst and MCOperand classes, which
11 // is the basic representation used to represent low-level machine code
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_MC_MCINST_H
17 #define LLVM_MC_MCINST_H
19 #include "llvm/ADT/SmallVector.h"
20 #include "llvm/Support/DataTypes.h"
21 #include "llvm/Support/DebugLoc.h"
28 /// MCOperand - Instances of this class represent operands of the MCInst class.
29 /// This is a simple discriminated union.
31 enum MachineOperandType {
32 kInvalid, ///< Uninitialized.
33 kRegister, ///< Register operand.
34 kImmediate, ///< Immediate operand.
35 kMBBLabel, ///< Basic block label.
36 kExpr ///< Relocatable immediate operand.
43 const MCExpr *ExprVal;
51 MCOperand() : Kind(kInvalid) {}
52 MCOperand(const MCOperand &RHS) { *this = RHS; }
54 bool isValid() const { return Kind != kInvalid; }
55 bool isReg() const { return Kind == kRegister; }
56 bool isImm() const { return Kind == kImmediate; }
57 bool isMBBLabel() const { return Kind == kMBBLabel; }
58 bool isExpr() const { return Kind == kExpr; }
60 /// getReg - Returns the register number.
61 unsigned getReg() const {
62 assert(isReg() && "This is not a register operand!");
66 /// setReg - Set the register number.
67 void setReg(unsigned Reg) {
68 assert(isReg() && "This is not a register operand!");
72 int64_t getImm() const {
73 assert(isImm() && "This is not an immediate");
76 void setImm(int64_t Val) {
77 assert(isImm() && "This is not an immediate");
81 unsigned getMBBLabelFunction() const {
82 assert(isMBBLabel() && "This is not a machine basic block");
83 return MBBLabel.FunctionNo;
85 unsigned getMBBLabelBlock() const {
86 assert(isMBBLabel() && "This is not a machine basic block");
87 return MBBLabel.BlockNo;
90 const MCExpr *getExpr() const {
91 assert(isExpr() && "This is not an expression");
94 void setExpr(const MCExpr *Val) {
95 assert(isExpr() && "This is not an expression");
99 static MCOperand CreateReg(unsigned Reg) {
105 static MCOperand CreateImm(int64_t Val) {
107 Op.Kind = kImmediate;
111 static MCOperand CreateMBBLabel(unsigned Fn, unsigned MBB) {
114 Op.MBBLabel.FunctionNo = Fn;
115 Op.MBBLabel.BlockNo = MBB;
118 static MCOperand CreateExpr(const MCExpr *Val) {
125 void print(raw_ostream &OS, const MCAsmInfo *MAI) const;
130 /// MCInst - Instances of this class represent a single low-level machine
134 SmallVector<MCOperand, 8> Operands;
136 MCInst() : Opcode(~0U) {}
138 void setOpcode(unsigned Op) { Opcode = Op; }
140 unsigned getOpcode() const { return Opcode; }
141 DebugLoc getDebugLoc() const { return DebugLoc(); }
143 const MCOperand &getOperand(unsigned i) const { return Operands[i]; }
144 MCOperand &getOperand(unsigned i) { return Operands[i]; }
145 unsigned getNumOperands() const { return Operands.size(); }
147 void addOperand(const MCOperand &Op) {
148 Operands.push_back(Op);
151 void print(raw_ostream &OS, const MCAsmInfo *MAI) const;
156 } // end namespace llvm