1 //=== MC/MCRegisterInfo.h - Target Register Description ---------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file describes an abstract interface used to get information about a
11 // target machines register file. This information is used for a variety of
12 // purposed, especially register allocation.
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_MC_MCREGISTERINFO_H
17 #define LLVM_MC_MCREGISTERINFO_H
23 /// MCRegisterDesc - This record contains all of the information known about
24 /// a particular register. The Overlaps field contains a pointer to a zero
25 /// terminated array of registers that this register aliases, starting with
26 /// itself. This is needed for architectures like X86 which have AL alias AX
27 /// alias EAX. The SubRegs field is a zero terminated array of registers that
28 /// are sub-registers of the specific register, e.g. AL, AH are sub-registers of
29 /// AX. The SuperRegs field is a zero terminated array of registers that are
30 /// super-registers of the specific register, e.g. RAX, EAX, are super-registers
33 struct MCRegisterDesc {
34 const char *Name; // Printable name for the reg (for debugging)
35 const unsigned *Overlaps; // Overlapping registers, described above
36 const unsigned *SubRegs; // Sub-register set, described above
37 const unsigned *SuperRegs; // Super-register set, described above
40 /// MCRegisterInfo base class - We assume that the target defines a static
41 /// array of MCRegisterDesc objects that represent all of the machine
42 /// registers that the target has. As such, we simply have to track a pointer
43 /// to this array so that we can turn register number into a register
46 /// Note this class is designed to be a base class of TargetRegisterInfo, which
47 /// is the interface used by codegen. However, specific targets *should never*
48 /// specialize this class. MCRegisterInfo should only contain getters to access
49 /// TableGen generated physical register data. It must not be extended with
52 class MCRegisterInfo {
54 const MCRegisterDesc *Desc; // Pointer to the descriptor array
55 unsigned NumRegs; // Number of entries in the array
58 /// InitMCRegisterInfo - Initialize MCRegisterInfo, called by TableGen
59 /// auto-generated routines. *DO NOT USE*.
60 void InitMCRegisterInfo(const MCRegisterDesc *D, unsigned NR) {
65 const MCRegisterDesc &operator[](unsigned RegNo) const {
66 assert(RegNo < NumRegs &&
67 "Attempting to access record for invalid register number!");
71 /// Provide a get method, equivalent to [], but more useful if we have a
72 /// pointer to this object.
74 const MCRegisterDesc &get(unsigned RegNo) const {
75 return operator[](RegNo);
78 /// getAliasSet - Return the set of registers aliased by the specified
79 /// register, or a null list of there are none. The list returned is zero
82 const unsigned *getAliasSet(unsigned RegNo) const {
83 // The Overlaps set always begins with Reg itself.
84 return get(RegNo).Overlaps + 1;
87 /// getOverlaps - Return a list of registers that overlap Reg, including
88 /// itself. This is the same as the alias set except Reg is included in the
90 /// These are exactly the registers in { x | regsOverlap(x, Reg) }.
92 const unsigned *getOverlaps(unsigned RegNo) const {
93 return get(RegNo).Overlaps;
96 /// getSubRegisters - Return the list of registers that are sub-registers of
97 /// the specified register, or a null list of there are none. The list
98 /// returned is zero terminated and sorted according to super-sub register
99 /// relations. e.g. X86::RAX's sub-register list is EAX, AX, AL, AH.
101 const unsigned *getSubRegisters(unsigned RegNo) const {
102 return get(RegNo).SubRegs;
105 /// getSuperRegisters - Return the list of registers that are super-registers
106 /// of the specified register, or a null list of there are none. The list
107 /// returned is zero terminated and sorted according to super-sub register
108 /// relations. e.g. X86::AL's super-register list is AX, EAX, RAX.
110 const unsigned *getSuperRegisters(unsigned RegNo) const {
111 return get(RegNo).SuperRegs;
114 /// getName - Return the human-readable symbolic target-specific name for the
115 /// specified physical register.
116 const char *getName(unsigned RegNo) const {
117 return get(RegNo).Name;
120 /// getNumRegs - Return the number of registers this target has (useful for
121 /// sizing arrays holding per register information)
122 unsigned getNumRegs() const {
127 } // End llvm namespace