1 //===-- llvm/MC/MCTargetAsmParser.h - Target Assembly Parser ----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #ifndef LLVM_MC_MCTARGETASMPARSER_H
11 #define LLVM_MC_MCTARGETASMPARSER_H
13 #include "llvm/MC/MCExpr.h"
14 #include "llvm/MC/MCParser/MCAsmParserExtension.h"
15 #include "llvm/MC/MCTargetOptions.h"
21 class MCParsedAsmOperand;
23 class MCSubtargetInfo;
26 template <typename T> class SmallVectorImpl;
28 typedef SmallVectorImpl<std::unique_ptr<MCParsedAsmOperand>> OperandVector;
31 AOK_Delete = 0, // Rewrite should be ignored.
32 AOK_Align, // Rewrite align as .align.
33 AOK_DotOperator, // Rewrite a dot operator expression as an immediate.
34 // E.g., [eax].foo.bar -> [eax].8
35 AOK_Emit, // Rewrite _emit as .byte.
36 AOK_Imm, // Rewrite as $$N.
37 AOK_ImmPrefix, // Add $$ before a parsed Imm.
38 AOK_Input, // Rewrite in terms of $N.
39 AOK_Output, // Rewrite in terms of $N.
40 AOK_SizeDirective, // Add a sizing directive (e.g., dword ptr).
41 AOK_Label, // Rewrite local labels.
42 AOK_Skip // Skip emission (e.g., offset/type operators).
45 const char AsmRewritePrecedence [] = {
54 5, // AOK_SizeDirective
66 AsmRewrite(AsmRewriteKind kind, SMLoc loc, unsigned len = 0, unsigned val = 0)
67 : Kind(kind), Loc(loc), Len(len), Val(val) {}
68 AsmRewrite(AsmRewriteKind kind, SMLoc loc, unsigned len, StringRef label)
69 : Kind(kind), Loc(loc), Len(len), Val(0), Label(label) {}
72 struct ParseInstructionInfo {
74 SmallVectorImpl<AsmRewrite> *AsmRewrites;
76 ParseInstructionInfo() : AsmRewrites(nullptr) {}
77 ParseInstructionInfo(SmallVectorImpl<AsmRewrite> *rewrites)
78 : AsmRewrites(rewrites) {}
81 /// MCTargetAsmParser - Generic interface to target specific assembly parsers.
82 class MCTargetAsmParser : public MCAsmParserExtension {
89 FIRST_TARGET_MATCH_RESULT_TY
93 MCTargetAsmParser(const MCTargetAsmParser &) = delete;
94 void operator=(const MCTargetAsmParser &) = delete;
95 protected: // Can only create subclasses.
96 MCTargetAsmParser(MCTargetOptions const &, const MCSubtargetInfo &STI);
98 /// Create a copy of STI and return a non-const reference to it.
99 MCSubtargetInfo ©STI();
101 /// AvailableFeatures - The current set of available features.
102 uint64_t AvailableFeatures;
104 /// ParsingInlineAsm - Are we parsing ms-style inline assembly?
105 bool ParsingInlineAsm;
107 /// SemaCallback - The Sema callback implementation. Must be set when parsing
108 /// ms-style inline assembly.
109 MCAsmParserSemaCallback *SemaCallback;
111 /// Set of options which affects instrumentation of inline assembly.
112 MCTargetOptions MCOptions;
115 const MCSubtargetInfo *STI;
118 ~MCTargetAsmParser() override;
120 const MCSubtargetInfo &getSTI() const;
122 uint64_t getAvailableFeatures() const { return AvailableFeatures; }
123 void setAvailableFeatures(uint64_t Value) { AvailableFeatures = Value; }
125 bool isParsingInlineAsm () { return ParsingInlineAsm; }
126 void setParsingInlineAsm (bool Value) { ParsingInlineAsm = Value; }
128 MCTargetOptions getTargetOptions() const { return MCOptions; }
130 void setSemaCallback(MCAsmParserSemaCallback *Callback) {
131 SemaCallback = Callback;
134 virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc,
137 /// Sets frame register corresponding to the current MachineFunction.
138 virtual void SetFrameRegister(unsigned RegNo) {}
140 /// ParseInstruction - Parse one assembly instruction.
142 /// The parser is positioned following the instruction name. The target
143 /// specific instruction parser should parse the entire instruction and
144 /// construct the appropriate MCInst, or emit an error. On success, the entire
145 /// line should be parsed up to and including the end-of-statement token. On
146 /// failure, the parser is not required to read to the end of the line.
148 /// \param Name - The instruction name.
149 /// \param NameLoc - The source location of the name.
150 /// \param Operands [out] - The list of parsed operands, this returns
151 /// ownership of them to the caller.
152 /// \return True on failure.
153 virtual bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
154 SMLoc NameLoc, OperandVector &Operands) = 0;
155 virtual bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
156 AsmToken Token, OperandVector &Operands) {
157 return ParseInstruction(Info, Name, Token.getLoc(), Operands);
160 /// ParseDirective - Parse a target specific assembler directive
162 /// The parser is positioned following the directive name. The target
163 /// specific directive parser should parse the entire directive doing or
164 /// recording any target specific work, or return true and do nothing if the
165 /// directive is not target specific. If the directive is specific for
166 /// the target, the entire line is parsed up to and including the
167 /// end-of-statement token and false is returned.
169 /// \param DirectiveID - the identifier token of the directive.
170 virtual bool ParseDirective(AsmToken DirectiveID) = 0;
172 /// mnemonicIsValid - This returns true if this is a valid mnemonic and false
174 virtual bool mnemonicIsValid(StringRef Mnemonic, unsigned VariantID) = 0;
176 /// MatchAndEmitInstruction - Recognize a series of operands of a parsed
177 /// instruction as an actual MCInst and emit it to the specified MCStreamer.
178 /// This returns false on success and returns true on failure to match.
180 /// On failure, the target parser is responsible for emitting a diagnostic
181 /// explaining the match failure.
182 virtual bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
183 OperandVector &Operands, MCStreamer &Out,
185 bool MatchingInlineAsm) = 0;
187 /// Allows targets to let registers opt out of clobber lists.
188 virtual bool OmitRegisterFromClobberLists(unsigned RegNo) { return false; }
190 /// Allow a target to add special case operand matching for things that
191 /// tblgen doesn't/can't handle effectively. For example, literal
192 /// immediates on ARM. TableGen expects a token operand, but the parser
193 /// will recognize them as immediates.
194 virtual unsigned validateTargetOperandClass(MCParsedAsmOperand &Op,
196 return Match_InvalidOperand;
199 /// checkTargetMatchPredicate - Validate the instruction match against
200 /// any complex target predicates not expressible via match classes.
201 virtual unsigned checkTargetMatchPredicate(MCInst &Inst) {
202 return Match_Success;
205 virtual void convertToMapAndConstraints(unsigned Kind,
206 const OperandVector &Operands) = 0;
208 // Return whether this parser uses assignment statements with equals tokens
209 virtual bool equalIsAsmAssignment() { return true; };
210 // Return whether this start of statement identifier is a label
211 virtual bool isLabel(AsmToken &Token) { return true; };
213 virtual const MCExpr *applyModifierToExpr(const MCExpr *E,
214 MCSymbolRefExpr::VariantKind,
219 virtual void onLabelParsed(MCSymbol *Symbol) { }
222 } // End llvm namespace