1 //===- Target/MRegisterInfo.h - Target Register Information -----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file describes an abstract interface used to get information about a
11 // target machines register file. This information is used for a variety of
12 // purposed, especially register allocation.
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_TARGET_MREGISTERINFO_H
17 #define LLVM_TARGET_MREGISTERINFO_H
19 #include "llvm/CodeGen/MachineBasicBlock.h"
26 class MachineFunction;
28 class TargetRegisterClass;
30 /// TargetRegisterDesc - This record contains all of the information known about
31 /// a particular register. The AliasSet field (if not null) contains a pointer
32 /// to a Zero terminated array of registers that this register aliases. This is
33 /// needed for architectures like X86 which have AL alias AX alias EAX.
34 /// Registers that this does not apply to simply should set this to null.
36 struct TargetRegisterDesc {
37 const char *Name; // Assembly language name for the register
38 const unsigned *AliasSet; // Register Alias Set, described above
41 class TargetRegisterClass {
43 typedef const unsigned* iterator;
44 typedef const unsigned* const_iterator;
47 const unsigned RegSize, Alignment; // Size & Alignment of register in bytes
48 const iterator RegsBegin, RegsEnd;
50 TargetRegisterClass(unsigned RS, unsigned Al, iterator RB, iterator RE)
51 : RegSize(RS), Alignment(Al), RegsBegin(RB), RegsEnd(RE) {}
52 virtual ~TargetRegisterClass() {} // Allow subclasses
54 // begin/end - Return all of the registers in this class.
55 iterator begin() const { return RegsBegin; }
56 iterator end() const { return RegsEnd; }
58 // getNumRegs - Return the number of registers in this class
59 unsigned getNumRegs() const { return RegsEnd-RegsBegin; }
61 // getRegister - Return the specified register in the class
62 unsigned getRegister(unsigned i) const {
63 assert(i < getNumRegs() && "Register number out of range!");
67 /// contains - Return true if the specified register is included in this
69 bool contains(unsigned Reg) const {
70 for (iterator I = begin(), E = end(); I != E; ++I)
71 if (*I == Reg) return true;
75 /// allocation_order_begin/end - These methods define a range of registers
76 /// which specify the registers in this class that are valid to register
77 /// allocate, and the preferred order to allocate them in. For example,
78 /// callee saved registers should be at the end of the list, because it is
79 /// cheaper to allocate caller saved registers.
81 /// These methods take a MachineFunction argument, which can be used to tune
82 /// the allocatable registers based on the characteristics of the function.
83 /// One simple example is that the frame pointer register can be used if
84 /// frame-pointer-elimination is performed.
86 /// By default, these methods return all registers in the class.
88 virtual iterator allocation_order_begin(MachineFunction &MF) const {
91 virtual iterator allocation_order_end(MachineFunction &MF) const {
97 /// getSize - Return the size of the register in bytes, which is also the size
98 /// of a stack slot allocated to hold a spilled copy of this register.
99 unsigned getSize() const { return RegSize; }
101 /// getAlignment - Return the minimum required alignment for a register of
103 unsigned getAlignment() const { return Alignment; }
107 /// MRegisterInfo base class - We assume that the target defines a static array
108 /// of TargetRegisterDesc objects that represent all of the machine registers
109 /// that the target has. As such, we simply have to track a pointer to this
110 /// array so that we can turn register number into a register descriptor.
112 class MRegisterInfo {
114 typedef const TargetRegisterClass * const * regclass_iterator;
116 const TargetRegisterDesc *Desc; // Pointer to the descriptor array
117 unsigned NumRegs; // Number of entries in the array
119 regclass_iterator RegClassBegin, RegClassEnd; // List of regclasses
121 int CallFrameSetupOpcode, CallFrameDestroyOpcode;
123 MRegisterInfo(const TargetRegisterDesc *D, unsigned NR,
124 regclass_iterator RegClassBegin, regclass_iterator RegClassEnd,
125 int CallFrameSetupOpcode = -1, int CallFrameDestroyOpcode = -1);
126 virtual ~MRegisterInfo();
129 enum { // Define some target independent constants
130 /// NoRegister - This 'hard' register is a 'noop' register for all backends.
131 /// This is used as the destination register for instructions that do not
132 /// produce a value. Some frontends may use this as an operand register to
133 /// mean special things, for example, the Sparc backend uses R0 to mean %g0
134 /// which always PRODUCES the value 0. The X86 backend does not use this
135 /// value as an operand register, except for memory references.
139 /// FirstVirtualRegister - This is the first register number that is
140 /// considered to be a 'virtual' register, which is part of the SSA
141 /// namespace. This must be the same for all targets, which means that each
142 /// target is limited to 1024 registers.
144 FirstVirtualRegister = 1024,
147 /// isPhysicalRegister - Return true if the specified register number is in
148 /// the physical register namespace.
149 static bool isPhysicalRegister(unsigned Reg) {
150 assert(Reg && "this is not a register!");
151 return Reg < FirstVirtualRegister;
154 /// isVirtualRegister - Return true if the specified register number is in
155 /// the virtual register namespace.
156 static bool isVirtualRegister(unsigned Reg) {
157 assert(Reg && "this is not a register!");
158 return Reg >= FirstVirtualRegister;
161 /// getAllocatableSet - Returns a bitset indexed by register number
162 /// indicating if a register is allocatable or not.
163 std::vector<bool> getAllocatableSet(MachineFunction &MF) const;
165 const TargetRegisterDesc &operator[](unsigned RegNo) const {
166 assert(RegNo < NumRegs &&
167 "Attempting to access record for invalid register number!");
171 /// Provide a get method, equivalent to [], but more useful if we have a
172 /// pointer to this object.
174 const TargetRegisterDesc &get(unsigned RegNo) const {
175 return operator[](RegNo);
178 /// getAliasSet - Return the set of registers aliased by the specified
179 /// register, or a null list of there are none. The list returned is zero
182 const unsigned *getAliasSet(unsigned RegNo) const {
183 return get(RegNo).AliasSet;
186 /// getName - Return the symbolic target specific name for the specified
187 /// physical register.
188 const char *getName(unsigned RegNo) const {
189 return get(RegNo).Name;
192 /// getNumRegs - Return the number of registers this target has
193 /// (useful for sizing arrays holding per register information)
194 unsigned getNumRegs() const {
198 /// areAliases - Returns true if the two registers alias each other,
200 bool areAliases(unsigned regA, unsigned regB) const {
201 for (const unsigned *Alias = getAliasSet(regA); *Alias; ++Alias)
202 if (*Alias == regB) return true;
206 /// getCalleeSaveRegs - Return a null-terminated list of all of the
207 /// callee-save registers on this target.
208 virtual const unsigned* getCalleeSaveRegs() const = 0;
210 /// getCalleeSaveRegClasses - Return a null-terminated list of the preferred
211 /// register classes to spill each callee-saved register with. The order and
212 /// length of this list match the getCalleeSaveRegs() list.
213 virtual const TargetRegisterClass* const *getCalleeSaveRegClasses() const = 0;
215 //===--------------------------------------------------------------------===//
216 // Register Class Information
219 /// Register class iterators
221 regclass_iterator regclass_begin() const { return RegClassBegin; }
222 regclass_iterator regclass_end() const { return RegClassEnd; }
224 unsigned getNumRegClasses() const {
225 return regclass_end()-regclass_begin();
228 //===--------------------------------------------------------------------===//
229 // Interfaces used by the register allocator and stack frame
230 // manipulation passes to move data around between registers,
231 // immediates and memory. The return value is the number of
232 // instructions added to (negative if removed from) the basic block.
235 virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
236 MachineBasicBlock::iterator MI,
237 unsigned SrcReg, int FrameIndex,
238 const TargetRegisterClass *RC) const = 0;
240 virtual void loadRegFromStackSlot(MachineBasicBlock &MBB,
241 MachineBasicBlock::iterator MI,
242 unsigned DestReg, int FrameIndex,
243 const TargetRegisterClass *RC) const = 0;
245 virtual void copyRegToReg(MachineBasicBlock &MBB,
246 MachineBasicBlock::iterator MI,
247 unsigned DestReg, unsigned SrcReg,
248 const TargetRegisterClass *RC) const = 0;
250 /// isLoadFromStackSlot - If the specified machine instruction is a direct
251 /// load from a stack slot, return the virtual or physical register number of
252 /// the destination along with the FrameIndex of the loaded stack slot. If
253 /// not, return 0. This predicate must return false if the instruction has
254 /// any side effects other than loading from the stack slot.
255 virtual unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const{
259 /// foldMemoryOperand - Attempt to fold a load or store of the
260 /// specified stack slot into the specified machine instruction for
261 /// the specified operand. If this is possible, a new instruction
262 /// is returned with the specified operand folded, otherwise NULL is
263 /// returned. The client is responsible for removing the old
264 /// instruction and adding the new one in the instruction stream
265 virtual MachineInstr* foldMemoryOperand(MachineInstr* MI,
267 int FrameIndex) const {
271 /// getCallFrameSetup/DestroyOpcode - These methods return the opcode of the
272 /// frame setup/destroy instructions if they exist (-1 otherwise). Some
273 /// targets use pseudo instructions in order to abstract away the difference
274 /// between operating with a frame pointer and operating without, through the
275 /// use of these two instructions.
277 int getCallFrameSetupOpcode() const { return CallFrameSetupOpcode; }
278 int getCallFrameDestroyOpcode() const { return CallFrameDestroyOpcode; }
281 /// eliminateCallFramePseudoInstr - This method is called during prolog/epilog
282 /// code insertion to eliminate call frame setup and destroy pseudo
283 /// instructions (but only if the Target is using them). It is responsible
284 /// for eliminating these instructions, replacing them with concrete
285 /// instructions. This method need only be implemented if using call frame
286 /// setup/destroy pseudo instructions.
289 eliminateCallFramePseudoInstr(MachineFunction &MF,
290 MachineBasicBlock &MBB,
291 MachineBasicBlock::iterator MI) const {
292 assert(getCallFrameSetupOpcode()== -1 && getCallFrameDestroyOpcode()== -1 &&
293 "eliminateCallFramePseudoInstr must be implemented if using"
294 " call frame setup/destroy pseudo instructions!");
295 assert(0 && "Call Frame Pseudo Instructions do not exist on this target!");
298 /// processFunctionBeforeFrameFinalized - This method is called immediately
299 /// before the specified functions frame layout (MF.getFrameInfo()) is
300 /// finalized. Once the frame is finalized, MO_FrameIndex operands are
301 /// replaced with direct constants. This method is optional. The return value
302 /// is the number of instructions added to (negative if removed from) the
305 virtual void processFunctionBeforeFrameFinalized(MachineFunction &MF) const {
308 /// eliminateFrameIndex - This method must be overriden to eliminate abstract
309 /// frame indices from instructions which may use them. The instruction
310 /// referenced by the iterator contains an MO_FrameIndex operand which must be
311 /// eliminated by this method. This method may modify or replace the
312 /// specified instruction, as long as it keeps the iterator pointing the the
313 /// finished product. The return value is the number of instructions
314 /// added to (negative if removed from) the basic block.
316 virtual void eliminateFrameIndex(MachineBasicBlock::iterator MI) const = 0;
318 /// emitProlog/emitEpilog - These methods insert prolog and epilog code into
319 /// the function. The return value is the number of instructions
320 /// added to (negative if removed from) the basic block (entry for prologue).
322 virtual void emitPrologue(MachineFunction &MF) const = 0;
323 virtual void emitEpilogue(MachineFunction &MF,
324 MachineBasicBlock &MBB) const = 0;
327 // This is useful when building DenseMaps keyed on virtual registers
328 struct VirtReg2IndexFunctor : std::unary_function<unsigned, unsigned> {
329 unsigned operator()(unsigned Reg) const {
330 return Reg - MRegisterInfo::FirstVirtualRegister;
334 } // End llvm namespace