1 //===-- llvm/Target/TargetInstrItineraries.h - Scheduling -------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file describes the structures used for instruction
11 // itineraries, stages, and operand reads/writes. This is used by
12 // schedulers to determine instruction stages and latencies.
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_TARGET_TARGETINSTRITINERARIES_H
17 #define LLVM_TARGET_TARGETINSTRITINERARIES_H
23 //===----------------------------------------------------------------------===//
24 /// Instruction stage - These values represent a non-pipelined step in
25 /// the execution of an instruction. Cycles represents the number of
26 /// discrete time slots needed to complete the stage. Units represent
27 /// the choice of functional units that can be used to complete the
28 /// stage. Eg. IntUnit1, IntUnit2. NextCycles indicates how many
29 /// cycles should elapse from the start of this stage to the start of
30 /// the next stage in the itinerary. A value of -1 indicates that the
31 /// next stage should start immediately after the current one.
35 /// indicates that the stage occupies FU x for 1 cycle and that
36 /// the next stage starts immediately after this one.
39 /// indicates that the stage occupies either FU x or FU y for 2
40 /// consecuative cycles and that the next stage starts one cycle
41 /// after this stage starts. That is, the stage requirements
45 /// indicates that the stage occupies FU x for 1 cycle and that
46 /// the next stage starts in this same cycle. This can be used to
47 /// indicate that the instruction requires multiple stages at the
50 /// FU reservation can be of two different kinds:
51 /// - FUs which instruction actually requires
52 /// - FUs which instruction just reserves. Reserved unit is not available for
53 /// execution of other instruction. However, several instructions can reserve
54 /// the same unit several times.
55 /// Such two types of units reservation is used to model instruction domain
56 /// change stalls, FUs using the same resource (e.g. same register file), etc.
59 enum ReservationKinds {
64 unsigned Cycles_; ///< Length of stage in machine cycles
65 unsigned Units_; ///< Choice of functional units
66 int NextCycles_; ///< Number of machine cycles to next stage
67 ReservationKinds Kind_; ///< Kind of the FU reservation
69 /// getCycles - returns the number of cycles the stage is occupied
70 unsigned getCycles() const {
74 /// getUnits - returns the choice of FUs
75 unsigned getUnits() const {
79 ReservationKinds getReservationKind() const {
83 /// getNextCycles - returns the number of cycles from the start of
84 /// this stage to the start of the next stage in the itinerary
85 unsigned getNextCycles() const {
86 return (NextCycles_ >= 0) ? (unsigned)NextCycles_ : Cycles_;
91 //===----------------------------------------------------------------------===//
92 /// Instruction itinerary - An itinerary represents the scheduling
93 /// information for an instruction. This includes a set of stages
94 /// occupies by the instruction, and the pipeline cycle in which
95 /// operands are read and written.
97 struct InstrItinerary {
98 unsigned NumMicroOps; ///< # of micro-ops, 0 means it's variable
99 unsigned FirstStage; ///< Index of first stage in itinerary
100 unsigned LastStage; ///< Index of last + 1 stage in itinerary
101 unsigned FirstOperandCycle; ///< Index of first operand rd/wr
102 unsigned LastOperandCycle; ///< Index of last + 1 operand rd/wr
106 //===----------------------------------------------------------------------===//
107 /// Instruction itinerary Data - Itinerary data supplied by a subtarget to be
108 /// used by a target.
110 class InstrItineraryData {
112 const InstrStage *Stages; ///< Array of stages selected
113 const unsigned *OperandCycles; ///< Array of operand cycles selected
114 const InstrItinerary *Itineratries; ///< Array of itineraries selected
118 InstrItineraryData() : Stages(0), OperandCycles(0), Itineratries(0) {}
119 InstrItineraryData(const InstrStage *S, const unsigned *OS,
120 const InstrItinerary *I)
121 : Stages(S), OperandCycles(OS), Itineratries(I) {}
123 /// isEmpty - Returns true if there are no itineraries.
125 bool isEmpty() const { return Itineratries == 0; }
127 /// isEndMarker - Returns true if the index is for the end marker
130 bool isEndMarker(unsigned ItinClassIndx) const {
131 return ((Itineratries[ItinClassIndx].FirstStage == ~0U) &&
132 (Itineratries[ItinClassIndx].LastStage == ~0U));
135 /// beginStage - Return the first stage of the itinerary.
137 const InstrStage *beginStage(unsigned ItinClassIndx) const {
138 unsigned StageIdx = Itineratries[ItinClassIndx].FirstStage;
139 return Stages + StageIdx;
142 /// endStage - Return the last+1 stage of the itinerary.
144 const InstrStage *endStage(unsigned ItinClassIndx) const {
145 unsigned StageIdx = Itineratries[ItinClassIndx].LastStage;
146 return Stages + StageIdx;
149 /// getStageLatency - Return the total stage latency of the given
150 /// class. The latency is the maximum completion time for any stage
151 /// in the itinerary.
153 unsigned getStageLatency(unsigned ItinClassIndx) const {
154 // If the target doesn't provide itinerary information, use a
155 // simple non-zero default value for all instructions.
159 // Calculate the maximum completion time for any stage.
160 unsigned Latency = 0, StartCycle = 0;
161 for (const InstrStage *IS = beginStage(ItinClassIndx),
162 *E = endStage(ItinClassIndx); IS != E; ++IS) {
163 Latency = std::max(Latency, StartCycle + IS->getCycles());
164 StartCycle += IS->getNextCycles();
170 /// getOperandCycle - Return the cycle for the given class and
171 /// operand. Return -1 if no cycle is specified for the operand.
173 int getOperandCycle(unsigned ItinClassIndx, unsigned OperandIdx) const {
177 unsigned FirstIdx = Itineratries[ItinClassIndx].FirstOperandCycle;
178 unsigned LastIdx = Itineratries[ItinClassIndx].LastOperandCycle;
179 if ((FirstIdx + OperandIdx) >= LastIdx)
182 return (int)OperandCycles[FirstIdx + OperandIdx];
185 /// isMicroCoded - Return true if the instructions in the given class decode
186 /// to more than one micro-ops.
187 bool isMicroCoded(unsigned ItinClassIndx) const {
190 return Itineratries[ItinClassIndx].NumMicroOps != 1;
195 } // End llvm namespace