1 //===-- llvm/Target/TargetMachine.h - General Target Information -*- C++ -*-==//
3 // This file describes the general parts of a Target machine.
5 //===----------------------------------------------------------------------===//
7 #ifndef LLVM_TARGET_TARGETMACHINE_H
8 #define LLVM_TARGET_TARGETMACHINE_H
10 #include "llvm/Target/TargetData.h"
11 #include "Support/NonCopyable.h"
13 class MachineInstrInfo;
14 class MachineInstrDescriptor;
15 class MachineSchedInfo;
17 class MachineFrameInfo;
18 class MachineCacheInfo;
20 class MachineCodeEmitter;
25 //---------------------------------------------------------------------------
26 // class TargetMachine
29 // Primary interface to the complete machine description for the
30 // target machine. All target-specific information should be
31 // accessible through this interface.
33 //---------------------------------------------------------------------------
35 class TargetMachine : public NonCopyableV {
36 const std::string Name;
38 const TargetData DataLayout; // Calculates type size & alignment
41 TargetMachine(const std::string &name, // Can only create subclasses...
42 unsigned char SubWordSize = 1, unsigned char IntRegSize = 8,
43 unsigned char PtrSize = 8, unsigned char PtrAl = 8,
44 unsigned char DoubleAl = 8, unsigned char FloatAl = 4,
45 unsigned char LongAl = 8, unsigned char IntAl = 4,
46 unsigned char ShortAl = 2, unsigned char ByteAl = 1)
47 : Name(name), DataLayout(name, SubWordSize, IntRegSize, PtrSize, PtrAl,
48 DoubleAl, FloatAl, LongAl,
49 IntAl, ShortAl, ByteAl) {}
51 virtual ~TargetMachine() {}
53 const std::string &getName() const { return Name; }
56 // Interfaces to the major aspects of target machine information:
57 // -- Instruction opcode and operand information
58 // -- Pipelines and scheduling information
59 // -- Register information
60 // -- Stack frame information
61 // -- Cache hierarchy information
62 // -- Machine-level optimization information (peephole only)
64 virtual const MachineInstrInfo& getInstrInfo() const = 0;
65 virtual const MachineSchedInfo& getSchedInfo() const = 0;
66 virtual const MachineRegInfo& getRegInfo() const = 0;
67 virtual const MachineFrameInfo& getFrameInfo() const = 0;
68 virtual const MachineCacheInfo& getCacheInfo() const = 0;
69 virtual const MachineOptInfo& getOptInfo() const = 0;
71 /// getRegisterInfo - If register information is available, return it. If
72 /// not, return null. This is kept separate from RegInfo until RegInfo gets
75 virtual const MRegisterInfo* getRegisterInfo() const { return 0; }
77 // Data storage information
79 virtual unsigned findOptimalStorageSize(const Type* ty) const;
81 /// addPassesToJITCompile - Add passes to the specified pass manager to
82 /// implement a fast dynamic compiler for this target. Return true if this is
83 /// not supported for this target.
85 virtual bool addPassesToJITCompile(PassManager &PM) { return true; }
87 /// addPassesToEmitAssembly - Add passes to the specified pass manager to get
88 /// assembly langage code emitted. Typically this will involve several steps
89 /// of code generation. This method should return true if assembly emission
92 virtual bool addPassesToEmitAssembly(PassManager &PM, std::ostream &Out) {
96 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
97 /// get machine code emitted. This uses a MAchineCodeEmitter object to handle
98 /// actually outputting the machine code and resolving things like the address
99 /// of functions. This method should returns true if machine code emission is
102 virtual bool addPassesToEmitMachineCode(PassManager &PM,
103 MachineCodeEmitter *MCE) {