1 //===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the TargetMachine and LLVMTargetMachine classes.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_TARGET_TARGETMACHINE_H
15 #define LLVM_TARGET_TARGETMACHINE_H
17 #include "llvm/Target/TargetInstrItineraries.h"
25 class TargetSubtarget;
26 class TargetInstrInfo;
27 class TargetInstrDescriptor;
30 class TargetFrameInfo;
31 class MachineCodeEmitter;
34 class FunctionPassManager;
38 // Relocation model types.
43 PIC_, // Cannot be named PIC due to collision with -DPIC
59 //===----------------------------------------------------------------------===//
61 /// TargetMachine - Primary interface to the complete machine description for
62 /// the target machine. All target-specific information should be accessible
63 /// through this interface.
66 TargetMachine(const TargetMachine &); // DO NOT IMPLEMENT
67 void operator=(const TargetMachine &); // DO NOT IMPLEMENT
68 protected: // Can only create subclasses.
69 TargetMachine() : AsmInfo(NULL) { }
71 /// getSubtargetImpl - virtual method implemented by subclasses that returns
72 /// a reference to that target's TargetSubtarget-derived member variable.
73 virtual const TargetSubtarget *getSubtargetImpl() const { return 0; }
75 /// AsmInfo - Contains target specific asm information.
77 mutable const TargetAsmInfo *AsmInfo;
79 /// createTargetAsmInfo - Create a new instance of target specific asm
81 virtual const TargetAsmInfo *createTargetAsmInfo() const { return NULL; }
84 virtual ~TargetMachine();
86 /// getModuleMatchQuality - This static method should be implemented by
87 /// targets to indicate how closely they match the specified module. This is
88 /// used by the LLC tool to determine which target to use when an explicit
89 /// -march option is not specified. If a target returns zero, it will never
90 /// be chosen without an explicit -march option.
91 static unsigned getModuleMatchQuality(const Module &M) { return 0; }
93 /// getJITMatchQuality - This static method should be implemented by targets
94 /// that provide JIT capabilities to indicate how suitable they are for
95 /// execution on the current host. If a value of 0 is returned, the target
96 /// will not be used unless an explicit -march option is used.
97 static unsigned getJITMatchQuality() { return 0; }
99 // Interfaces to the major aspects of target machine information:
100 // -- Instruction opcode and operand information
101 // -- Pipelines and scheduling information
102 // -- Stack frame information
103 // -- Selection DAG lowering information
105 virtual const TargetInstrInfo *getInstrInfo() const { return 0; }
106 virtual const TargetFrameInfo *getFrameInfo() const { return 0; }
107 virtual TargetLowering *getTargetLowering() const { return 0; }
108 virtual const TargetData *getTargetData() const { return 0; }
111 /// getTargetAsmInfo - Return target specific asm information.
113 const TargetAsmInfo *getTargetAsmInfo() const {
114 if (!AsmInfo) AsmInfo = createTargetAsmInfo();
118 /// getSubtarget - This method returns a pointer to the specified type of
119 /// TargetSubtarget. In debug builds, it verifies that the object being
120 /// returned is of the correct type.
121 template<typename STC> const STC &getSubtarget() const {
122 const TargetSubtarget *TST = getSubtargetImpl();
123 assert(TST && dynamic_cast<const STC*>(TST) &&
124 "Not the right kind of subtarget!");
125 return *static_cast<const STC*>(TST);
128 /// getRegisterInfo - If register information is available, return it. If
129 /// not, return null. This is kept separate from RegInfo until RegInfo has
130 /// details of graph coloring register allocation removed from it.
132 virtual const MRegisterInfo *getRegisterInfo() const { return 0; }
134 /// getJITInfo - If this target supports a JIT, return information for it,
135 /// otherwise return null.
137 virtual TargetJITInfo *getJITInfo() { return 0; }
139 /// getInstrItineraryData - Returns instruction itinerary data for the target
140 /// or specific subtarget.
142 virtual const InstrItineraryData getInstrItineraryData() const {
143 return InstrItineraryData();
146 /// getRelocationModel - Returns the code generation relocation model. The
147 /// choices are static, PIC, and dynamic-no-pic, and target default.
148 static Reloc::Model getRelocationModel();
150 /// setRelocationModel - Sets the code generation relocation model.
151 static void setRelocationModel(Reloc::Model Model);
153 /// getCodeModel - Returns the code model. The choices are small, kernel,
154 /// medium, large, and target default.
155 static CodeModel::Model getCodeModel();
157 /// setCodeModel - Sets the code model.
158 static void setCodeModel(CodeModel::Model Model);
160 /// CodeGenFileType - These enums are meant to be passed into
161 /// addPassesToEmitFile to indicate what type of file to emit.
162 enum CodeGenFileType {
163 AssemblyFile, ObjectFile, DynamicLibrary
166 /// addPassesToEmitFile - Add passes to the specified pass manager to get
167 /// the specified file emitted. Typically this will involve several steps of
168 /// code generation. If Fast is set to true, the code generator should emit
169 /// code as fast as possible, without regard for compile time. This method
170 /// should return true if emission of this file type is not supported.
172 virtual bool addPassesToEmitFile(FunctionPassManager &PM, std::ostream &Out,
173 CodeGenFileType FileType, bool Fast) {
177 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
178 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
179 /// actually outputting the machine code and resolving things like the address
180 /// of functions. This method returns true if machine code emission is
183 virtual bool addPassesToEmitMachineCode(FunctionPassManager &PM,
184 MachineCodeEmitter &MCE, bool Fast) {
189 /// addPassesToEmitWholeFile - This method can be implemented by targets that
190 /// require having the entire module at once. This is not recommended, do not
192 virtual bool WantsWholeFile() const { return false; }
193 virtual bool addPassesToEmitWholeFile(PassManager &PM, std::ostream &Out,
194 CodeGenFileType FileType, bool Fast) {
199 /// LLVMTargetMachine - This class describes a target machine that is
200 /// implemented with the LLVM target-independent code generator.
202 class LLVMTargetMachine : public TargetMachine {
203 protected: // Can only create subclasses.
204 LLVMTargetMachine() { }
207 /// addPassesToEmitFile - Add passes to the specified pass manager to get
208 /// the specified file emitted. Typically this will involve several steps of
209 /// code generation. If Fast is set to true, the code generator should emit
210 /// code as fast as possible, without regard for compile time. This method
211 /// should return true if emission of this file type is not supported.
213 /// The default implementation of this method adds components from the
214 /// LLVM retargetable code generator, invoking the methods below to get
215 /// target-specific passes in standard locations.
217 virtual bool addPassesToEmitFile(FunctionPassManager &PM, std::ostream &Out,
218 CodeGenFileType FileType, bool Fast);
220 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
221 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
222 /// actually outputting the machine code and resolving things like the address
223 /// of functions. This method returns true if machine code emission is
226 virtual bool addPassesToEmitMachineCode(FunctionPassManager &PM,
227 MachineCodeEmitter &MCE, bool Fast);
229 /// Target-Independent Code Generator Pass Configuration Options.
231 /// addInstSelector - This method should add any "last minute" LLVM->LLVM
232 /// passes, then install an instruction selector pass, which converts from
233 /// LLVM code to machine instructions.
234 virtual bool addInstSelector(FunctionPassManager &PM, bool Fast) {
238 /// addPostRegAllocPasses - This method may be implemented by targets that
239 /// want to run passes after register allocation but before prolog-epilog
240 /// insertion. This should return true if -print-machineinstrs should print
241 /// after these passes.
242 virtual bool addPostRegAlloc(FunctionPassManager &PM, bool Fast) {
246 /// addPreEmitPass - This pass may be implemented by targets that want to run
247 /// passes immediately before machine code is emitted. This should return
248 /// true if -print-machineinstrs should print out the code after the passes.
249 virtual bool addPreEmitPass(FunctionPassManager &PM, bool Fast) {
254 /// addAssemblyEmitter - This pass should be overridden by the target to add
255 /// the asmprinter, if asm emission is supported. If this is not supported,
256 /// 'true' should be returned.
257 virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
262 /// addObjectWriter - This pass should be overridden by the target to add
263 /// the object-file writer, if supported. If this is not supported,
264 /// 'true' should be returned.
265 virtual bool addObjectWriter(FunctionPassManager &PM, bool Fast,
270 /// addCodeEmitter - This pass should be overridden by the target to add a
271 /// code emitter, if supported. If this is not supported, 'true' should be
273 virtual bool addCodeEmitter(FunctionPassManager &PM, bool Fast,
274 MachineCodeEmitter &MCE) {
279 } // End llvm namespace