1 //===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the TargetMachine and LLVMTargetMachine classes.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_TARGET_TARGETMACHINE_H
15 #define LLVM_TARGET_TARGETMACHINE_H
17 #include "llvm/Support/CodeGen.h"
18 #include "llvm/Target/TargetOptions.h"
19 #include "llvm/ADT/StringRef.h"
25 class InstrItineraryData;
30 class PassManagerBase;
33 class TargetELFWriterInfo;
34 class TargetFrameLowering;
35 class TargetInstrInfo;
36 class TargetIntrinsicInfo;
39 class TargetPassConfig;
40 class TargetRegisterInfo;
41 class TargetSelectionDAGInfo;
42 class TargetSubtargetInfo;
43 class formatted_raw_ostream;
46 //===----------------------------------------------------------------------===//
48 /// TargetMachine - Primary interface to the complete machine description for
49 /// the target machine. All target-specific information should be accessible
50 /// through this interface.
53 TargetMachine(const TargetMachine &); // DO NOT IMPLEMENT
54 void operator=(const TargetMachine &); // DO NOT IMPLEMENT
55 protected: // Can only create subclasses.
56 TargetMachine(const Target &T, StringRef TargetTriple,
57 StringRef CPU, StringRef FS, const TargetOptions &Options);
59 /// getSubtargetImpl - virtual method implemented by subclasses that returns
60 /// a reference to that target's TargetSubtargetInfo-derived member variable.
61 virtual const TargetSubtargetInfo *getSubtargetImpl() const { return 0; }
63 /// TheTarget - The Target that this machine was created for.
64 const Target &TheTarget;
66 /// TargetTriple, TargetCPU, TargetFS - Triple string, CPU name, and target
67 /// feature strings the TargetMachine instance is created with.
68 std::string TargetTriple;
69 std::string TargetCPU;
72 /// CodeGenInfo - Low level target information such as relocation model.
73 const MCCodeGenInfo *CodeGenInfo;
75 /// AsmInfo - Contains target specific asm information.
77 const MCAsmInfo *AsmInfo;
79 unsigned MCRelaxAll : 1;
80 unsigned MCNoExecStack : 1;
81 unsigned MCSaveTempLabels : 1;
82 unsigned MCUseLoc : 1;
83 unsigned MCUseCFI : 1;
84 unsigned MCUseDwarfDirectory : 1;
87 virtual ~TargetMachine();
89 const Target &getTarget() const { return TheTarget; }
91 const StringRef getTargetTriple() const { return TargetTriple; }
92 const StringRef getTargetCPU() const { return TargetCPU; }
93 const StringRef getTargetFeatureString() const { return TargetFS; }
95 TargetOptions Options;
97 // Interfaces to the major aspects of target machine information:
98 // -- Instruction opcode and operand information
99 // -- Pipelines and scheduling information
100 // -- Stack frame information
101 // -- Selection DAG lowering information
103 virtual const TargetInstrInfo *getInstrInfo() const { return 0; }
104 virtual const TargetFrameLowering *getFrameLowering() const { return 0; }
105 virtual const TargetLowering *getTargetLowering() const { return 0; }
106 virtual const TargetSelectionDAGInfo *getSelectionDAGInfo() const{ return 0; }
107 virtual const TargetData *getTargetData() const { return 0; }
109 /// getMCAsmInfo - Return target specific asm information.
111 const MCAsmInfo *getMCAsmInfo() const { return AsmInfo; }
113 /// getSubtarget - This method returns a pointer to the specified type of
114 /// TargetSubtargetInfo. In debug builds, it verifies that the object being
115 /// returned is of the correct type.
116 template<typename STC> const STC &getSubtarget() const {
117 return *static_cast<const STC*>(getSubtargetImpl());
120 /// getRegisterInfo - If register information is available, return it. If
121 /// not, return null. This is kept separate from RegInfo until RegInfo has
122 /// details of graph coloring register allocation removed from it.
124 virtual const TargetRegisterInfo *getRegisterInfo() const { return 0; }
126 /// getIntrinsicInfo - If intrinsic information is available, return it. If
127 /// not, return null.
129 virtual const TargetIntrinsicInfo *getIntrinsicInfo() const { return 0; }
131 /// getJITInfo - If this target supports a JIT, return information for it,
132 /// otherwise return null.
134 virtual TargetJITInfo *getJITInfo() { return 0; }
136 /// getInstrItineraryData - Returns instruction itinerary data for the target
137 /// or specific subtarget.
139 virtual const InstrItineraryData *getInstrItineraryData() const {
143 /// getELFWriterInfo - If this target supports an ELF writer, return
144 /// information for it, otherwise return null.
146 virtual const TargetELFWriterInfo *getELFWriterInfo() const { return 0; }
148 /// hasMCRelaxAll - Check whether all machine code instructions should be
150 bool hasMCRelaxAll() const { return MCRelaxAll; }
152 /// setMCRelaxAll - Set whether all machine code instructions should be
154 void setMCRelaxAll(bool Value) { MCRelaxAll = Value; }
156 /// hasMCSaveTempLabels - Check whether temporary labels will be preserved
157 /// (i.e., not treated as temporary).
158 bool hasMCSaveTempLabels() const { return MCSaveTempLabels; }
160 /// setMCSaveTempLabels - Set whether temporary labels will be preserved
161 /// (i.e., not treated as temporary).
162 void setMCSaveTempLabels(bool Value) { MCSaveTempLabels = Value; }
164 /// hasMCNoExecStack - Check whether an executable stack is not needed.
165 bool hasMCNoExecStack() const { return MCNoExecStack; }
167 /// setMCNoExecStack - Set whether an executabel stack is not needed.
168 void setMCNoExecStack(bool Value) { MCNoExecStack = Value; }
170 /// hasMCUseLoc - Check whether we should use dwarf's .loc directive.
171 bool hasMCUseLoc() const { return MCUseLoc; }
173 /// setMCUseLoc - Set whether all we should use dwarf's .loc directive.
174 void setMCUseLoc(bool Value) { MCUseLoc = Value; }
176 /// hasMCUseCFI - Check whether we should use dwarf's .cfi_* directives.
177 bool hasMCUseCFI() const { return MCUseCFI; }
179 /// setMCUseCFI - Set whether all we should use dwarf's .cfi_* directives.
180 void setMCUseCFI(bool Value) { MCUseCFI = Value; }
182 /// hasMCUseDwarfDirectory - Check whether we should use .file directives with
183 /// explicit directories.
184 bool hasMCUseDwarfDirectory() const { return MCUseDwarfDirectory; }
186 /// setMCUseDwarfDirectory - Set whether all we should use .file directives
187 /// with explicit directories.
188 void setMCUseDwarfDirectory(bool Value) { MCUseDwarfDirectory = Value; }
190 /// getRelocationModel - Returns the code generation relocation model. The
191 /// choices are static, PIC, and dynamic-no-pic, and target default.
192 Reloc::Model getRelocationModel() const;
194 /// getCodeModel - Returns the code model. The choices are small, kernel,
195 /// medium, large, and target default.
196 CodeModel::Model getCodeModel() const;
198 /// getOptLevel - Returns the optimization level: None, Less,
199 /// Default, or Aggressive.
200 CodeGenOpt::Level getOptLevel() const;
202 void setFastISel(bool Enable) { Options.EnableFastISel = Enable; }
204 bool shouldPrintMachineCode() const { return Options.PrintMachineCode; }
206 /// getAsmVerbosityDefault - Returns the default value of asm verbosity.
208 static bool getAsmVerbosityDefault();
210 /// setAsmVerbosityDefault - Set the default value of asm verbosity. Default
212 static void setAsmVerbosityDefault(bool);
214 /// getDataSections - Return true if data objects should be emitted into their
215 /// own section, corresponds to -fdata-sections.
216 static bool getDataSections();
218 /// getFunctionSections - Return true if functions should be emitted into
219 /// their own section, corresponding to -ffunction-sections.
220 static bool getFunctionSections();
222 /// setDataSections - Set if the data are emit into separate sections.
223 static void setDataSections(bool);
225 /// setFunctionSections - Set if the functions are emit into separate
227 static void setFunctionSections(bool);
229 /// CodeGenFileType - These enums are meant to be passed into
230 /// addPassesToEmitFile to indicate what type of file to emit, and returned by
231 /// it to indicate what type of file could actually be made.
232 enum CodeGenFileType {
235 CGFT_Null // Do not emit any output.
238 /// addPassesToEmitFile - Add passes to the specified pass manager to get the
239 /// specified file emitted. Typically this will involve several steps of code
240 /// generation. This method should return true if emission of this file type
241 /// is not supported, or false on success.
242 virtual bool addPassesToEmitFile(PassManagerBase &,
243 formatted_raw_ostream &,
245 bool /*DisableVerify*/ = true) {
249 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
250 /// get machine code emitted. This uses a JITCodeEmitter object to handle
251 /// actually outputting the machine code and resolving things like the address
252 /// of functions. This method returns true if machine code emission is
255 virtual bool addPassesToEmitMachineCode(PassManagerBase &,
257 bool /*DisableVerify*/ = true) {
261 /// addPassesToEmitMC - Add passes to the specified pass manager to get
262 /// machine code emitted with the MCJIT. This method returns true if machine
263 /// code is not supported. It fills the MCContext Ctx pointer which can be
264 /// used to build custom MCStreamer.
266 virtual bool addPassesToEmitMC(PassManagerBase &,
269 bool /*DisableVerify*/ = true) {
274 /// LLVMTargetMachine - This class describes a target machine that is
275 /// implemented with the LLVM target-independent code generator.
277 class LLVMTargetMachine : public TargetMachine {
278 protected: // Can only create subclasses.
279 LLVMTargetMachine(const Target &T, StringRef TargetTriple,
280 StringRef CPU, StringRef FS, TargetOptions Options,
281 Reloc::Model RM, CodeModel::Model CM,
282 CodeGenOpt::Level OL);
285 /// createPassConfig - Create a pass configuration object to be used by
286 /// addPassToEmitX methods for generating a pipeline of CodeGen passes.
287 virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
289 /// addPassesToEmitFile - Add passes to the specified pass manager to get the
290 /// specified file emitted. Typically this will involve several steps of code
292 virtual bool addPassesToEmitFile(PassManagerBase &PM,
293 formatted_raw_ostream &Out,
294 CodeGenFileType FileType,
295 bool DisableVerify = true);
297 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
298 /// get machine code emitted. This uses a JITCodeEmitter object to handle
299 /// actually outputting the machine code and resolving things like the address
300 /// of functions. This method returns true if machine code emission is
303 virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
305 bool DisableVerify = true);
307 /// addPassesToEmitMC - Add passes to the specified pass manager to get
308 /// machine code emitted with the MCJIT. This method returns true if machine
309 /// code is not supported. It fills the MCContext Ctx pointer which can be
310 /// used to build custom MCStreamer.
312 virtual bool addPassesToEmitMC(PassManagerBase &PM,
315 bool DisableVerify = true);
317 /// addCodeEmitter - This pass should be overridden by the target to add a
318 /// code emitter, if supported. If this is not supported, 'true' should be
320 virtual bool addCodeEmitter(PassManagerBase &,
326 } // End llvm namespace