1 //===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the TargetMachine and LLVMTargetMachine classes.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_TARGET_TARGETMACHINE_H
15 #define LLVM_TARGET_TARGETMACHINE_H
17 #include "llvm/Target/TargetInstrItineraries.h"
25 class TargetSubtarget;
26 class TargetInstrInfo;
29 class TargetFrameInfo;
30 class MachineCodeEmitter;
31 class TargetRegisterInfo;
33 class PassManagerBase;
36 class TargetMachOWriterInfo;
37 class TargetELFWriterInfo;
40 // Relocation model types.
45 PIC_, // Cannot be named PIC due to collision with -DPIC
71 // Stack canary model types.
72 namespace StackCanaries {
80 //===----------------------------------------------------------------------===//
82 /// TargetMachine - Primary interface to the complete machine description for
83 /// the target machine. All target-specific information should be accessible
84 /// through this interface.
87 TargetMachine(const TargetMachine &); // DO NOT IMPLEMENT
88 void operator=(const TargetMachine &); // DO NOT IMPLEMENT
89 protected: // Can only create subclasses.
90 TargetMachine() : AsmInfo(NULL) { }
92 /// getSubtargetImpl - virtual method implemented by subclasses that returns
93 /// a reference to that target's TargetSubtarget-derived member variable.
94 virtual const TargetSubtarget *getSubtargetImpl() const { return 0; }
96 /// AsmInfo - Contains target specific asm information.
98 mutable const TargetAsmInfo *AsmInfo;
100 /// createTargetAsmInfo - Create a new instance of target specific asm
102 virtual const TargetAsmInfo *createTargetAsmInfo() const { return NULL; }
105 virtual ~TargetMachine();
107 /// getModuleMatchQuality - This static method should be implemented by
108 /// targets to indicate how closely they match the specified module. This is
109 /// used by the LLC tool to determine which target to use when an explicit
110 /// -march option is not specified. If a target returns zero, it will never
111 /// be chosen without an explicit -march option.
112 static unsigned getModuleMatchQuality(const Module &) { return 0; }
114 /// getJITMatchQuality - This static method should be implemented by targets
115 /// that provide JIT capabilities to indicate how suitable they are for
116 /// execution on the current host. If a value of 0 is returned, the target
117 /// will not be used unless an explicit -march option is used.
118 static unsigned getJITMatchQuality() { return 0; }
120 // Interfaces to the major aspects of target machine information:
121 // -- Instruction opcode and operand information
122 // -- Pipelines and scheduling information
123 // -- Stack frame information
124 // -- Selection DAG lowering information
126 virtual const TargetInstrInfo *getInstrInfo() const { return 0; }
127 virtual const TargetFrameInfo *getFrameInfo() const { return 0; }
128 virtual TargetLowering *getTargetLowering() const { return 0; }
129 virtual const TargetData *getTargetData() const { return 0; }
132 /// getTargetAsmInfo - Return target specific asm information.
134 const TargetAsmInfo *getTargetAsmInfo() const {
135 if (!AsmInfo) AsmInfo = createTargetAsmInfo();
139 /// getSubtarget - This method returns a pointer to the specified type of
140 /// TargetSubtarget. In debug builds, it verifies that the object being
141 /// returned is of the correct type.
142 template<typename STC> const STC &getSubtarget() const {
143 const TargetSubtarget *TST = getSubtargetImpl();
144 assert(TST && dynamic_cast<const STC*>(TST) &&
145 "Not the right kind of subtarget!");
146 return *static_cast<const STC*>(TST);
149 /// getRegisterInfo - If register information is available, return it. If
150 /// not, return null. This is kept separate from RegInfo until RegInfo has
151 /// details of graph coloring register allocation removed from it.
153 virtual const TargetRegisterInfo *getRegisterInfo() const { return 0; }
155 /// getJITInfo - If this target supports a JIT, return information for it,
156 /// otherwise return null.
158 virtual TargetJITInfo *getJITInfo() { return 0; }
160 /// getInstrItineraryData - Returns instruction itinerary data for the target
161 /// or specific subtarget.
163 virtual const InstrItineraryData getInstrItineraryData() const {
164 return InstrItineraryData();
167 /// getMachOWriterInfo - If this target supports a Mach-O writer, return
168 /// information for it, otherwise return null.
170 virtual const TargetMachOWriterInfo *getMachOWriterInfo() const { return 0; }
172 /// getELFWriterInfo - If this target supports an ELF writer, return
173 /// information for it, otherwise return null.
175 virtual const TargetELFWriterInfo *getELFWriterInfo() const { return 0; }
177 /// getRelocationModel - Returns the code generation relocation model. The
178 /// choices are static, PIC, and dynamic-no-pic, and target default.
179 static Reloc::Model getRelocationModel();
181 /// setRelocationModel - Sets the code generation relocation model.
182 static void setRelocationModel(Reloc::Model Model);
184 /// getCodeModel - Returns the code model. The choices are small, kernel,
185 /// medium, large, and target default.
186 static CodeModel::Model getCodeModel();
188 /// setCodeModel - Sets the code model.
189 static void setCodeModel(CodeModel::Model Model);
191 /// CodeGenFileType - These enums are meant to be passed into
192 /// addPassesToEmitFile to indicate what type of file to emit.
193 enum CodeGenFileType {
194 AssemblyFile, ObjectFile, DynamicLibrary
197 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge
198 /// on this target. User flag overrides.
199 virtual bool getEnableTailMergeDefault() const { return true; }
201 /// addPassesToEmitFile - Add passes to the specified pass manager to get the
202 /// specified file emitted. Typically this will involve several steps of code
203 /// generation. If Fast is set to true, the code generator should emit code
204 /// as fast as possible, though the generated code may be less efficient.
205 /// This method should return FileModel::Error if emission of this file type
206 /// is not supported.
208 virtual FileModel::Model addPassesToEmitFile(PassManagerBase &,
212 return FileModel::None;
215 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
216 /// to be split up (e.g., to add an object writer pass), this method can be
217 /// used to finish up adding passes to emit the file, if necessary.
219 virtual bool addPassesToEmitFileFinish(PassManagerBase &,
220 MachineCodeEmitter *, bool /*Fast*/) {
224 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
225 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
226 /// actually outputting the machine code and resolving things like the address
227 /// of functions. This method returns true if machine code emission is
230 virtual bool addPassesToEmitMachineCode(PassManagerBase &,
231 MachineCodeEmitter &,
236 /// addPassesToEmitWholeFile - This method can be implemented by targets that
237 /// require having the entire module at once. This is not recommended, do not
239 virtual bool WantsWholeFile() const { return false; }
240 virtual bool addPassesToEmitWholeFile(PassManager &, raw_ostream &,
241 CodeGenFileType, bool /*Fast*/) {
246 /// LLVMTargetMachine - This class describes a target machine that is
247 /// implemented with the LLVM target-independent code generator.
249 class LLVMTargetMachine : public TargetMachine {
250 protected: // Can only create subclasses.
251 LLVMTargetMachine() { }
254 /// addPassesToEmitFile - Add passes to the specified pass manager to get the
255 /// specified file emitted. Typically this will involve several steps of code
256 /// generation. If Fast is set to true, the code generator should emit code
257 /// as fast as possible, though the generated code may be less efficient.
258 /// This method should return FileModel::Error if emission of this file type
259 /// is not supported.
261 /// The default implementation of this method adds components from the
262 /// LLVM retargetable code generator, invoking the methods below to get
263 /// target-specific passes in standard locations.
265 virtual FileModel::Model addPassesToEmitFile(PassManagerBase &PM,
267 CodeGenFileType FileType,
270 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
271 /// to be split up (e.g., to add an object writer pass), this method can be
272 /// used to finish up adding passes to emit the file, if necessary.
274 virtual bool addPassesToEmitFileFinish(PassManagerBase &PM,
275 MachineCodeEmitter *MCE, bool Fast);
277 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
278 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
279 /// actually outputting the machine code and resolving things like the address
280 /// of functions. This method returns true if machine code emission is
283 virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
284 MachineCodeEmitter &MCE, bool Fast);
286 /// Target-Independent Code Generator Pass Configuration Options.
288 /// addInstSelector - This method should add any "last minute" LLVM->LLVM
289 /// passes, then install an instruction selector pass, which converts from
290 /// LLVM code to machine instructions.
291 virtual bool addInstSelector(PassManagerBase &, bool /*Fast*/) {
295 /// addPreRegAllocPasses - This method may be implemented by targets that want
296 /// to run passes immediately before register allocation. This should return
297 /// true if -print-machineinstrs should print after these passes.
298 virtual bool addPreRegAlloc(PassManagerBase &, bool /*Fast*/) {
302 /// addPostRegAllocPasses - This method may be implemented by targets that
303 /// want to run passes after register allocation but before prolog-epilog
304 /// insertion. This should return true if -print-machineinstrs should print
305 /// after these passes.
306 virtual bool addPostRegAlloc(PassManagerBase &, bool /*Fast*/) {
310 /// addPreEmitPass - This pass may be implemented by targets that want to run
311 /// passes immediately before machine code is emitted. This should return
312 /// true if -print-machineinstrs should print out the code after the passes.
313 virtual bool addPreEmitPass(PassManagerBase &, bool /*Fast*/) {
318 /// addAssemblyEmitter - This pass should be overridden by the target to add
319 /// the asmprinter, if asm emission is supported. If this is not supported,
320 /// 'true' should be returned.
321 virtual bool addAssemblyEmitter(PassManagerBase &, bool /*Fast*/,
326 /// addCodeEmitter - This pass should be overridden by the target to add a
327 /// code emitter, if supported. If this is not supported, 'true' should be
328 /// returned. If DumpAsm is true, the generated assembly is printed to cerr.
329 virtual bool addCodeEmitter(PassManagerBase &, bool /*Fast*/,
330 bool /*DumpAsm*/, MachineCodeEmitter &) {
334 /// addSimpleCodeEmitter - This pass should be overridden by the target to add
335 /// a code emitter (without setting flags), if supported. If this is not
336 /// supported, 'true' should be returned. If DumpAsm is true, the generated
337 /// assembly is printed to cerr.
338 virtual bool addSimpleCodeEmitter(PassManagerBase &, bool /*Fast*/,
339 bool /*DumpAsm*/, MachineCodeEmitter &) {
343 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge
344 /// on this target. User flag overrides.
345 virtual bool getEnableTailMergeDefault() const { return true; }
348 } // End llvm namespace