1 //===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file describes the general parts of a Target machine.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_TARGET_TARGETMACHINE_H
15 #define LLVM_TARGET_TARGETMACHINE_H
17 #include "llvm/Target/TargetData.h"
22 class TargetInstrInfo;
23 class TargetInstrDescriptor;
25 class TargetSchedInfo;
27 class TargetFrameInfo;
28 class TargetCacheInfo;
29 class MachineCodeEmitter;
31 class FunctionPassManager;
34 class IntrinsicLowering;
36 //===----------------------------------------------------------------------===//
38 /// TargetMachine - Primary interface to the complete machine description for
39 /// the target machine. All target-specific information should be accessible
40 /// through this interface.
43 const std::string Name;
44 const TargetData DataLayout; // Calculates type size & alignment
45 IntrinsicLowering *IL; // Specifies how to lower intrinsic calls
47 TargetMachine(const TargetMachine&); // DO NOT IMPLEMENT
48 void operator=(const TargetMachine&); // DO NOT IMPLEMENT
49 protected: // Can only create subclasses...
50 TargetMachine(const std::string &name, IntrinsicLowering *IL,
51 bool LittleEndian = false,
52 unsigned char PtrSize = 8, unsigned char PtrAl = 8,
53 unsigned char DoubleAl = 8, unsigned char FloatAl = 4,
54 unsigned char LongAl = 8, unsigned char IntAl = 4,
55 unsigned char ShortAl = 2, unsigned char ByteAl = 1);
57 virtual ~TargetMachine();
59 const std::string &getName() const { return Name; }
61 // getIntrinsicLowering - This method returns a reference to an
62 // IntrinsicLowering instance which should be used by the code generator to
63 // lower unknown intrinsic functions to the equivalent LLVM expansion.
64 IntrinsicLowering &getIntrinsicLowering() const { return *IL; }
66 // Interfaces to the major aspects of target machine information:
67 // -- Instruction opcode and operand information
68 // -- Pipelines and scheduling information
69 // -- Register information
70 // -- Stack frame information
71 // -- Cache hierarchy information
72 // -- Machine-level optimization information (peephole only)
74 virtual const TargetInstrInfo& getInstrInfo() const = 0;
75 virtual const TargetSchedInfo& getSchedInfo() const = 0;
76 virtual const TargetRegInfo& getRegInfo() const = 0;
77 virtual const TargetFrameInfo& getFrameInfo() const = 0;
78 virtual const TargetCacheInfo& getCacheInfo() const = 0;
79 const TargetData &getTargetData() const { return DataLayout; }
81 /// getRegisterInfo - If register information is available, return it. If
82 /// not, return null. This is kept separate from RegInfo until RegInfo has
83 /// details of graph coloring register allocation removed from it.
85 virtual const MRegisterInfo* getRegisterInfo() const { return 0; }
87 /// getJITInfo - If this target supports a JIT, return information for it,
88 /// otherwise return null.
90 virtual TargetJITInfo *getJITInfo() { return 0; }
92 // Data storage information. FIXME, this should be moved out to sparc
95 virtual unsigned findOptimalStorageSize(const Type* ty) const;
97 /// addPassesToEmitAssembly - Add passes to the specified pass manager to get
98 /// assembly langage code emitted. Typically this will involve several steps
99 /// of code generation. This method should return true if assembly emission
100 /// is not supported.
102 virtual bool addPassesToEmitAssembly(PassManager &PM, std::ostream &Out) {
106 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
107 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
108 /// actually outputting the machine code and resolving things like the address
109 /// of functions. This method should returns true if machine code emission is
112 virtual bool addPassesToEmitMachineCode(FunctionPassManager &PM,
113 MachineCodeEmitter &MCE) {
118 } // End llvm namespace