1 //===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file describes the general parts of a Target machine.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_TARGET_TARGETMACHINE_H
15 #define LLVM_TARGET_TARGETMACHINE_H
17 #include "llvm/Target/TargetData.h"
20 class TargetInstrInfo;
21 class TargetInstrDescriptor;
22 class TargetSchedInfo;
24 class TargetFrameInfo;
25 class TargetCacheInfo;
26 class MachineCodeEmitter;
28 class FunctionPassManager;
32 //===----------------------------------------------------------------------===//
34 /// TargetMachine - Primary interface to the complete machine description for
35 /// the target machine. All target-specific information should be accessible
36 /// through this interface.
39 const std::string Name;
40 const TargetData DataLayout; // Calculates type size & alignment
42 TargetMachine(const TargetMachine&); // DO NOT IMPLEMENT
43 void operator=(const TargetMachine&); // DO NOT IMPLEMENT
45 TargetMachine(const std::string &name, // Can only create subclasses...
46 bool LittleEndian = false,
47 unsigned char PtrSize = 8, unsigned char PtrAl = 8,
48 unsigned char DoubleAl = 8, unsigned char FloatAl = 4,
49 unsigned char LongAl = 8, unsigned char IntAl = 4,
50 unsigned char ShortAl = 2, unsigned char ByteAl = 1)
51 : Name(name), DataLayout(name, LittleEndian,
52 PtrSize, PtrAl, DoubleAl, FloatAl, LongAl,
53 IntAl, ShortAl, ByteAl) {}
55 virtual ~TargetMachine() {}
57 const std::string &getName() const { return Name; }
59 // Interfaces to the major aspects of target machine information:
60 // -- Instruction opcode and operand information
61 // -- Pipelines and scheduling information
62 // -- Register information
63 // -- Stack frame information
64 // -- Cache hierarchy information
65 // -- Machine-level optimization information (peephole only)
67 virtual const TargetInstrInfo& getInstrInfo() const = 0;
68 virtual const TargetSchedInfo& getSchedInfo() const = 0;
69 virtual const TargetRegInfo& getRegInfo() const = 0;
70 virtual const TargetFrameInfo& getFrameInfo() const = 0;
71 virtual const TargetCacheInfo& getCacheInfo() const = 0;
72 const TargetData &getTargetData() const { return DataLayout; }
74 /// getRegisterInfo - If register information is available, return it. If
75 /// not, return null. This is kept separate from RegInfo until RegInfo has
76 /// details of graph coloring register allocation removed from it.
78 virtual const MRegisterInfo* getRegisterInfo() const { return 0; }
80 // Data storage information
82 virtual unsigned findOptimalStorageSize(const Type* ty) const;
84 /// addPassesToJITCompile - Add passes to the specified pass manager to
85 /// implement a fast dynamic compiler for this target. Return true if this is
86 /// not supported for this target.
88 virtual bool addPassesToJITCompile(FunctionPassManager &PM) { return true; }
90 /// addPassesToEmitAssembly - Add passes to the specified pass manager to get
91 /// assembly langage code emitted. Typically this will involve several steps
92 /// of code generation. This method should return true if assembly emission
95 virtual bool addPassesToEmitAssembly(PassManager &PM, std::ostream &Out) {
99 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
100 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
101 /// actually outputting the machine code and resolving things like the address
102 /// of functions. This method should returns true if machine code emission is
105 virtual bool addPassesToEmitMachineCode(FunctionPassManager &PM,
106 MachineCodeEmitter &MCE) {
110 /// replaceMachineCodeForFunction - Make it so that calling the
111 /// function whose machine code is at OLD turns into a call to NEW,
112 /// perhaps by overwriting OLD with a branch to NEW. FIXME: this is
115 virtual void replaceMachineCodeForFunction (void *Old, void *New) {
116 assert (0 && "Current target cannot replace machine code for functions");