1 //===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the TargetMachine and LLVMTargetMachine classes.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_TARGET_TARGETMACHINE_H
15 #define LLVM_TARGET_TARGETMACHINE_H
17 #include "llvm/Target/TargetInstrItineraries.h"
25 class TargetSubtarget;
26 class TargetInstrInfo;
27 class TargetIntrinsicInfo;
30 class TargetFrameInfo;
31 class MachineCodeEmitter;
33 class ObjectCodeEmitter;
34 class TargetRegisterInfo;
36 class PassManagerBase;
39 class TargetMachOWriterInfo;
40 class TargetELFWriterInfo;
41 class formatted_raw_ostream;
43 // Relocation model types.
48 PIC_, // Cannot be named PIC due to collision with -DPIC
74 // Code generation optimization level.
75 namespace CodeGenOpt {
84 // Possible float ABI settings. Used with FloatABIType in TargetOptions.h.
87 Default, // Target-specific (either soft of hard depending on triple, etc).
93 //===----------------------------------------------------------------------===//
95 /// TargetMachine - Primary interface to the complete machine description for
96 /// the target machine. All target-specific information should be accessible
97 /// through this interface.
100 TargetMachine(const TargetMachine &); // DO NOT IMPLEMENT
101 void operator=(const TargetMachine &); // DO NOT IMPLEMENT
102 protected: // Can only create subclasses.
103 TargetMachine(const Target &);
105 /// getSubtargetImpl - virtual method implemented by subclasses that returns
106 /// a reference to that target's TargetSubtarget-derived member variable.
107 virtual const TargetSubtarget *getSubtargetImpl() const { return 0; }
109 /// TheTarget - The Target that this machine was created for.
110 const Target &TheTarget;
112 /// AsmInfo - Contains target specific asm information.
114 mutable const TargetAsmInfo *AsmInfo;
116 /// createTargetAsmInfo - Create a new instance of target specific asm
118 virtual const TargetAsmInfo *createTargetAsmInfo() const { return 0; }
121 virtual ~TargetMachine();
123 const Target &getTarget() const { return TheTarget; }
125 // Interfaces to the major aspects of target machine information:
126 // -- Instruction opcode and operand information
127 // -- Pipelines and scheduling information
128 // -- Stack frame information
129 // -- Selection DAG lowering information
131 virtual const TargetInstrInfo *getInstrInfo() const { return 0; }
132 virtual const TargetFrameInfo *getFrameInfo() const { return 0; }
133 virtual TargetLowering *getTargetLowering() const { return 0; }
134 virtual const TargetData *getTargetData() const { return 0; }
136 /// getTargetAsmInfo - Return target specific asm information.
138 const TargetAsmInfo *getTargetAsmInfo() const {
139 if (!AsmInfo) AsmInfo = createTargetAsmInfo();
143 /// getSubtarget - This method returns a pointer to the specified type of
144 /// TargetSubtarget. In debug builds, it verifies that the object being
145 /// returned is of the correct type.
146 template<typename STC> const STC &getSubtarget() const {
147 const TargetSubtarget *TST = getSubtargetImpl();
148 assert(TST && dynamic_cast<const STC*>(TST) &&
149 "Not the right kind of subtarget!");
150 return *static_cast<const STC*>(TST);
153 /// getRegisterInfo - If register information is available, return it. If
154 /// not, return null. This is kept separate from RegInfo until RegInfo has
155 /// details of graph coloring register allocation removed from it.
157 virtual const TargetRegisterInfo *getRegisterInfo() const { return 0; }
159 /// getIntrinsicInfo - If intrinsic information is available, return it. If
160 /// not, return null.
162 virtual const TargetIntrinsicInfo *getIntrinsicInfo() const { return 0; }
164 /// getJITInfo - If this target supports a JIT, return information for it,
165 /// otherwise return null.
167 virtual TargetJITInfo *getJITInfo() { return 0; }
169 /// getInstrItineraryData - Returns instruction itinerary data for the target
170 /// or specific subtarget.
172 virtual const InstrItineraryData getInstrItineraryData() const {
173 return InstrItineraryData();
176 /// getMachOWriterInfo - If this target supports a Mach-O writer, return
177 /// information for it, otherwise return null.
179 virtual const TargetMachOWriterInfo *getMachOWriterInfo() const { return 0; }
181 /// getELFWriterInfo - If this target supports an ELF writer, return
182 /// information for it, otherwise return null.
184 virtual const TargetELFWriterInfo *getELFWriterInfo() const { return 0; }
186 /// getRelocationModel - Returns the code generation relocation model. The
187 /// choices are static, PIC, and dynamic-no-pic, and target default.
188 static Reloc::Model getRelocationModel();
190 /// setRelocationModel - Sets the code generation relocation model.
192 static void setRelocationModel(Reloc::Model Model);
194 /// getCodeModel - Returns the code model. The choices are small, kernel,
195 /// medium, large, and target default.
196 static CodeModel::Model getCodeModel();
198 /// setCodeModel - Sets the code model.
200 static void setCodeModel(CodeModel::Model Model);
202 /// getAsmVerbosityDefault - Returns the default value of asm verbosity.
204 static bool getAsmVerbosityDefault();
206 /// setAsmVerbosityDefault - Set the default value of asm verbosity. Default
208 static void setAsmVerbosityDefault(bool);
210 /// CodeGenFileType - These enums are meant to be passed into
211 /// addPassesToEmitFile to indicate what type of file to emit.
212 enum CodeGenFileType {
213 AssemblyFile, ObjectFile, DynamicLibrary
216 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge
217 /// on this target. User flag overrides.
218 virtual bool getEnableTailMergeDefault() const { return true; }
220 /// addPassesToEmitFile - Add passes to the specified pass manager to get the
221 /// specified file emitted. Typically this will involve several steps of code
222 /// generation. If Fast is set to true, the code generator should emit code
223 /// as fast as possible, though the generated code may be less efficient.
224 /// This method should return FileModel::Error if emission of this file type
225 /// is not supported.
227 virtual FileModel::Model addPassesToEmitFile(PassManagerBase &,
228 formatted_raw_ostream &,
231 return FileModel::None;
234 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
235 /// to be split up (e.g., to add an object writer pass), this method can be
236 /// used to finish up adding passes to emit the file, if necessary.
238 virtual bool addPassesToEmitFileFinish(PassManagerBase &,
239 MachineCodeEmitter *,
244 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
245 /// to be split up (e.g., to add an object writer pass), this method can be
246 /// used to finish up adding passes to emit the file, if necessary.
248 virtual bool addPassesToEmitFileFinish(PassManagerBase &,
254 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
255 /// to be split up (e.g., to add an object writer pass), this method can be
256 /// used to finish up adding passes to emit the file, if necessary.
258 virtual bool addPassesToEmitFileFinish(PassManagerBase &,
264 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
265 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
266 /// actually outputting the machine code and resolving things like the address
267 /// of functions. This method returns true if machine code emission is
270 virtual bool addPassesToEmitMachineCode(PassManagerBase &,
271 MachineCodeEmitter &,
276 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
277 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
278 /// actually outputting the machine code and resolving things like the address
279 /// of functions. This method returns true if machine code emission is
282 virtual bool addPassesToEmitMachineCode(PassManagerBase &,
288 /// addPassesToEmitWholeFile - This method can be implemented by targets that
289 /// require having the entire module at once. This is not recommended, do not
291 virtual bool WantsWholeFile() const { return false; }
292 virtual bool addPassesToEmitWholeFile(PassManager &, formatted_raw_ostream &,
299 /// LLVMTargetMachine - This class describes a target machine that is
300 /// implemented with the LLVM target-independent code generator.
302 class LLVMTargetMachine : public TargetMachine {
303 protected: // Can only create subclasses.
304 LLVMTargetMachine(const Target &T) : TargetMachine(T) { }
306 /// addCommonCodeGenPasses - Add standard LLVM codegen passes used for
307 /// both emitting to assembly files or machine code output.
309 bool addCommonCodeGenPasses(PassManagerBase &, CodeGenOpt::Level);
313 /// addPassesToEmitFile - Add passes to the specified pass manager to get the
314 /// specified file emitted. Typically this will involve several steps of code
315 /// generation. If OptLevel is None, the code generator should emit code as fast
316 /// as possible, though the generated code may be less efficient. This method
317 /// should return FileModel::Error if emission of this file type is not
320 /// The default implementation of this method adds components from the
321 /// LLVM retargetable code generator, invoking the methods below to get
322 /// target-specific passes in standard locations.
324 virtual FileModel::Model addPassesToEmitFile(PassManagerBase &PM,
325 formatted_raw_ostream &Out,
326 CodeGenFileType FileType,
329 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
330 /// to be split up (e.g., to add an object writer pass), this method can be
331 /// used to finish up adding passes to emit the file, if necessary.
333 virtual bool addPassesToEmitFileFinish(PassManagerBase &PM,
334 MachineCodeEmitter *MCE,
337 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
338 /// to be split up (e.g., to add an object writer pass), this method can be
339 /// used to finish up adding passes to emit the file, if necessary.
341 virtual bool addPassesToEmitFileFinish(PassManagerBase &PM,
345 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
346 /// to be split up (e.g., to add an object writer pass), this method can be
347 /// used to finish up adding passes to emit the file, if necessary.
349 virtual bool addPassesToEmitFileFinish(PassManagerBase &PM,
350 ObjectCodeEmitter *OCE,
353 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
354 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
355 /// actually outputting the machine code and resolving things like the address
356 /// of functions. This method returns true if machine code emission is
359 virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
360 MachineCodeEmitter &MCE,
363 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
364 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
365 /// actually outputting the machine code and resolving things like the address
366 /// of functions. This method returns true if machine code emission is
369 virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
373 /// Target-Independent Code Generator Pass Configuration Options.
375 /// addInstSelector - This method should add any "last minute" LLVM->LLVM
376 /// passes, then install an instruction selector pass, which converts from
377 /// LLVM code to machine instructions.
378 virtual bool addInstSelector(PassManagerBase &, CodeGenOpt::Level) {
382 /// addPreRegAllocPasses - This method may be implemented by targets that want
383 /// to run passes immediately before register allocation. This should return
384 /// true if -print-machineinstrs should print after these passes.
385 virtual bool addPreRegAlloc(PassManagerBase &, CodeGenOpt::Level) {
389 /// addPostRegAllocPasses - This method may be implemented by targets that
390 /// want to run passes after register allocation but before prolog-epilog
391 /// insertion. This should return true if -print-machineinstrs should print
392 /// after these passes.
393 virtual bool addPostRegAlloc(PassManagerBase &, CodeGenOpt::Level) {
397 /// addPreEmitPass - This pass may be implemented by targets that want to run
398 /// passes immediately before machine code is emitted. This should return
399 /// true if -print-machineinstrs should print out the code after the passes.
400 virtual bool addPreEmitPass(PassManagerBase &, CodeGenOpt::Level) {
405 /// addCodeEmitter - This pass should be overridden by the target to add a
406 /// code emitter, if supported. If this is not supported, 'true' should be
408 virtual bool addCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
409 MachineCodeEmitter &) {
413 /// addCodeEmitter - This pass should be overridden by the target to add a
414 /// code emitter, if supported. If this is not supported, 'true' should be
416 virtual bool addCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
421 /// addSimpleCodeEmitter - This pass should be overridden by the target to add
422 /// a code emitter (without setting flags), if supported. If this is not
423 /// supported, 'true' should be returned.
424 virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
425 MachineCodeEmitter &) {
429 /// addSimpleCodeEmitter - This pass should be overridden by the target to add
430 /// a code emitter (without setting flags), if supported. If this is not
431 /// supported, 'true' should be returned.
432 virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
437 /// addSimpleCodeEmitter - This pass should be overridden by the target to add
438 /// a code emitter (without setting flags), if supported. If this is not
439 /// supported, 'true' should be returned.
440 virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
441 ObjectCodeEmitter &) {
445 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge
446 /// on this target. User flag overrides.
447 virtual bool getEnableTailMergeDefault() const { return true; }
449 /// addAssemblyEmitter - Helper function which creates a target specific
450 /// assembly printer, if available.
452 /// \return Returns 'false' on success.
453 bool addAssemblyEmitter(PassManagerBase &, CodeGenOpt::Level,
454 bool /* VerboseAsmDefault */,
455 formatted_raw_ostream &);
458 } // End llvm namespace