1 //===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the TargetMachine and LLVMTargetMachine classes.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_TARGET_TARGETMACHINE_H
15 #define LLVM_TARGET_TARGETMACHINE_H
17 #include "llvm/Pass.h"
18 #include "llvm/Support/CodeGen.h"
19 #include "llvm/Target/TargetOptions.h"
20 #include "llvm/ADT/StringRef.h"
26 class InstrItineraryData;
32 class PassManagerBase;
35 class TargetELFWriterInfo;
36 class TargetFrameLowering;
37 class TargetInstrInfo;
38 class TargetIntrinsicInfo;
41 class TargetPassConfig;
42 class TargetRegisterInfo;
43 class TargetSelectionDAGInfo;
44 class TargetSubtargetInfo;
45 class formatted_raw_ostream;
48 //===----------------------------------------------------------------------===//
50 /// TargetMachine - Primary interface to the complete machine description for
51 /// the target machine. All target-specific information should be accessible
52 /// through this interface.
55 TargetMachine(const TargetMachine &); // DO NOT IMPLEMENT
56 void operator=(const TargetMachine &); // DO NOT IMPLEMENT
57 protected: // Can only create subclasses.
58 TargetMachine(const Target &T, StringRef TargetTriple,
59 StringRef CPU, StringRef FS, const TargetOptions &Options);
61 /// getSubtargetImpl - virtual method implemented by subclasses that returns
62 /// a reference to that target's TargetSubtargetInfo-derived member variable.
63 virtual const TargetSubtargetInfo *getSubtargetImpl() const { return 0; }
65 /// TheTarget - The Target that this machine was created for.
66 const Target &TheTarget;
68 /// TargetTriple, TargetCPU, TargetFS - Triple string, CPU name, and target
69 /// feature strings the TargetMachine instance is created with.
70 std::string TargetTriple;
71 std::string TargetCPU;
74 /// CodeGenInfo - Low level target information such as relocation model.
75 const MCCodeGenInfo *CodeGenInfo;
77 /// AsmInfo - Contains target specific asm information.
79 const MCAsmInfo *AsmInfo;
81 unsigned MCRelaxAll : 1;
82 unsigned MCNoExecStack : 1;
83 unsigned MCSaveTempLabels : 1;
84 unsigned MCUseLoc : 1;
85 unsigned MCUseCFI : 1;
86 unsigned MCUseDwarfDirectory : 1;
89 virtual ~TargetMachine();
91 const Target &getTarget() const { return TheTarget; }
93 const StringRef getTargetTriple() const { return TargetTriple; }
94 const StringRef getTargetCPU() const { return TargetCPU; }
95 const StringRef getTargetFeatureString() const { return TargetFS; }
97 TargetOptions Options;
99 // Interfaces to the major aspects of target machine information:
100 // -- Instruction opcode and operand information
101 // -- Pipelines and scheduling information
102 // -- Stack frame information
103 // -- Selection DAG lowering information
105 virtual const TargetInstrInfo *getInstrInfo() const { return 0; }
106 virtual const TargetFrameLowering *getFrameLowering() const { return 0; }
107 virtual const TargetLowering *getTargetLowering() const { return 0; }
108 virtual const TargetSelectionDAGInfo *getSelectionDAGInfo() const{ return 0; }
109 virtual const TargetData *getTargetData() const { return 0; }
111 /// getMCAsmInfo - Return target specific asm information.
113 const MCAsmInfo *getMCAsmInfo() const { return AsmInfo; }
115 /// getSubtarget - This method returns a pointer to the specified type of
116 /// TargetSubtargetInfo. In debug builds, it verifies that the object being
117 /// returned is of the correct type.
118 template<typename STC> const STC &getSubtarget() const {
119 return *static_cast<const STC*>(getSubtargetImpl());
122 /// getRegisterInfo - If register information is available, return it. If
123 /// not, return null. This is kept separate from RegInfo until RegInfo has
124 /// details of graph coloring register allocation removed from it.
126 virtual const TargetRegisterInfo *getRegisterInfo() const { return 0; }
128 /// getIntrinsicInfo - If intrinsic information is available, return it. If
129 /// not, return null.
131 virtual const TargetIntrinsicInfo *getIntrinsicInfo() const { return 0; }
133 /// getJITInfo - If this target supports a JIT, return information for it,
134 /// otherwise return null.
136 virtual TargetJITInfo *getJITInfo() { return 0; }
138 /// getInstrItineraryData - Returns instruction itinerary data for the target
139 /// or specific subtarget.
141 virtual const InstrItineraryData *getInstrItineraryData() const {
145 /// getELFWriterInfo - If this target supports an ELF writer, return
146 /// information for it, otherwise return null.
148 virtual const TargetELFWriterInfo *getELFWriterInfo() const { return 0; }
150 /// hasMCRelaxAll - Check whether all machine code instructions should be
152 bool hasMCRelaxAll() const { return MCRelaxAll; }
154 /// setMCRelaxAll - Set whether all machine code instructions should be
156 void setMCRelaxAll(bool Value) { MCRelaxAll = Value; }
158 /// hasMCSaveTempLabels - Check whether temporary labels will be preserved
159 /// (i.e., not treated as temporary).
160 bool hasMCSaveTempLabels() const { return MCSaveTempLabels; }
162 /// setMCSaveTempLabels - Set whether temporary labels will be preserved
163 /// (i.e., not treated as temporary).
164 void setMCSaveTempLabels(bool Value) { MCSaveTempLabels = Value; }
166 /// hasMCNoExecStack - Check whether an executable stack is not needed.
167 bool hasMCNoExecStack() const { return MCNoExecStack; }
169 /// setMCNoExecStack - Set whether an executabel stack is not needed.
170 void setMCNoExecStack(bool Value) { MCNoExecStack = Value; }
172 /// hasMCUseLoc - Check whether we should use dwarf's .loc directive.
173 bool hasMCUseLoc() const { return MCUseLoc; }
175 /// setMCUseLoc - Set whether all we should use dwarf's .loc directive.
176 void setMCUseLoc(bool Value) { MCUseLoc = Value; }
178 /// hasMCUseCFI - Check whether we should use dwarf's .cfi_* directives.
179 bool hasMCUseCFI() const { return MCUseCFI; }
181 /// setMCUseCFI - Set whether all we should use dwarf's .cfi_* directives.
182 void setMCUseCFI(bool Value) { MCUseCFI = Value; }
184 /// hasMCUseDwarfDirectory - Check whether we should use .file directives with
185 /// explicit directories.
186 bool hasMCUseDwarfDirectory() const { return MCUseDwarfDirectory; }
188 /// setMCUseDwarfDirectory - Set whether all we should use .file directives
189 /// with explicit directories.
190 void setMCUseDwarfDirectory(bool Value) { MCUseDwarfDirectory = Value; }
192 /// getRelocationModel - Returns the code generation relocation model. The
193 /// choices are static, PIC, and dynamic-no-pic, and target default.
194 Reloc::Model getRelocationModel() const;
196 /// getCodeModel - Returns the code model. The choices are small, kernel,
197 /// medium, large, and target default.
198 CodeModel::Model getCodeModel() const;
200 /// getTLSModel - Returns the TLS model which should be used for the given
202 TLSModel::Model getTLSModel(const GlobalValue *GV) const;
204 /// getOptLevel - Returns the optimization level: None, Less,
205 /// Default, or Aggressive.
206 CodeGenOpt::Level getOptLevel() const;
208 void setFastISel(bool Enable) { Options.EnableFastISel = Enable; }
210 bool shouldPrintMachineCode() const { return Options.PrintMachineCode; }
212 /// getAsmVerbosityDefault - Returns the default value of asm verbosity.
214 static bool getAsmVerbosityDefault();
216 /// setAsmVerbosityDefault - Set the default value of asm verbosity. Default
218 static void setAsmVerbosityDefault(bool);
220 /// getDataSections - Return true if data objects should be emitted into their
221 /// own section, corresponds to -fdata-sections.
222 static bool getDataSections();
224 /// getFunctionSections - Return true if functions should be emitted into
225 /// their own section, corresponding to -ffunction-sections.
226 static bool getFunctionSections();
228 /// setDataSections - Set if the data are emit into separate sections.
229 static void setDataSections(bool);
231 /// setFunctionSections - Set if the functions are emit into separate
233 static void setFunctionSections(bool);
235 /// CodeGenFileType - These enums are meant to be passed into
236 /// addPassesToEmitFile to indicate what type of file to emit, and returned by
237 /// it to indicate what type of file could actually be made.
238 enum CodeGenFileType {
241 CGFT_Null // Do not emit any output.
244 /// addPassesToEmitFile - Add passes to the specified pass manager to get the
245 /// specified file emitted. Typically this will involve several steps of code
246 /// generation. This method should return true if emission of this file type
247 /// is not supported, or false on success.
248 virtual bool addPassesToEmitFile(PassManagerBase &,
249 formatted_raw_ostream &,
251 bool /*DisableVerify*/ = true,
252 AnalysisID StartAfter = 0,
253 AnalysisID StopAfter = 0) {
257 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
258 /// get machine code emitted. This uses a JITCodeEmitter object to handle
259 /// actually outputting the machine code and resolving things like the address
260 /// of functions. This method returns true if machine code emission is
263 virtual bool addPassesToEmitMachineCode(PassManagerBase &,
265 bool /*DisableVerify*/ = true) {
269 /// addPassesToEmitMC - Add passes to the specified pass manager to get
270 /// machine code emitted with the MCJIT. This method returns true if machine
271 /// code is not supported. It fills the MCContext Ctx pointer which can be
272 /// used to build custom MCStreamer.
274 virtual bool addPassesToEmitMC(PassManagerBase &,
277 bool /*DisableVerify*/ = true) {
282 /// LLVMTargetMachine - This class describes a target machine that is
283 /// implemented with the LLVM target-independent code generator.
285 class LLVMTargetMachine : public TargetMachine {
286 protected: // Can only create subclasses.
287 LLVMTargetMachine(const Target &T, StringRef TargetTriple,
288 StringRef CPU, StringRef FS, TargetOptions Options,
289 Reloc::Model RM, CodeModel::Model CM,
290 CodeGenOpt::Level OL);
293 /// createPassConfig - Create a pass configuration object to be used by
294 /// addPassToEmitX methods for generating a pipeline of CodeGen passes.
295 virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
297 /// addPassesToEmitFile - Add passes to the specified pass manager to get the
298 /// specified file emitted. Typically this will involve several steps of code
300 virtual bool addPassesToEmitFile(PassManagerBase &PM,
301 formatted_raw_ostream &Out,
302 CodeGenFileType FileType,
303 bool DisableVerify = true,
304 AnalysisID StartAfter = 0,
305 AnalysisID StopAfter = 0);
307 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
308 /// get machine code emitted. This uses a JITCodeEmitter object to handle
309 /// actually outputting the machine code and resolving things like the address
310 /// of functions. This method returns true if machine code emission is
313 virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
315 bool DisableVerify = true);
317 /// addPassesToEmitMC - Add passes to the specified pass manager to get
318 /// machine code emitted with the MCJIT. This method returns true if machine
319 /// code is not supported. It fills the MCContext Ctx pointer which can be
320 /// used to build custom MCStreamer.
322 virtual bool addPassesToEmitMC(PassManagerBase &PM,
325 bool DisableVerify = true);
327 /// addCodeEmitter - This pass should be overridden by the target to add a
328 /// code emitter, if supported. If this is not supported, 'true' should be
330 virtual bool addCodeEmitter(PassManagerBase &,
336 } // End llvm namespace