1 //===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the TargetMachine and LLVMTargetMachine classes.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_TARGET_TARGETMACHINE_H
15 #define LLVM_TARGET_TARGETMACHINE_H
17 #include "llvm/Target/TargetInstrItineraries.h"
25 class TargetSubtarget;
26 class TargetInstrInfo;
27 class TargetIntrinsicInfo;
30 class TargetFrameInfo;
31 class MachineCodeEmitter;
33 class ObjectCodeEmitter;
34 class TargetRegisterInfo;
35 class PassManagerBase;
38 class TargetMachOWriterInfo;
39 class TargetELFWriterInfo;
40 class formatted_raw_ostream;
42 // Relocation model types.
47 PIC_, // Cannot be named PIC due to collision with -DPIC
73 // Code generation optimization level.
74 namespace CodeGenOpt {
83 // Possible float ABI settings. Used with FloatABIType in TargetOptions.h.
86 Default, // Target-specific (either soft of hard depending on triple, etc).
92 //===----------------------------------------------------------------------===//
94 /// TargetMachine - Primary interface to the complete machine description for
95 /// the target machine. All target-specific information should be accessible
96 /// through this interface.
99 TargetMachine(const TargetMachine &); // DO NOT IMPLEMENT
100 void operator=(const TargetMachine &); // DO NOT IMPLEMENT
101 protected: // Can only create subclasses.
102 TargetMachine(const Target &);
104 /// getSubtargetImpl - virtual method implemented by subclasses that returns
105 /// a reference to that target's TargetSubtarget-derived member variable.
106 virtual const TargetSubtarget *getSubtargetImpl() const { return 0; }
108 /// TheTarget - The Target that this machine was created for.
109 const Target &TheTarget;
111 /// AsmInfo - Contains target specific asm information.
113 mutable const TargetAsmInfo *AsmInfo;
115 /// createTargetAsmInfo - Create a new instance of target specific asm
117 virtual const TargetAsmInfo *createTargetAsmInfo() const { return 0; }
120 virtual ~TargetMachine();
122 const Target &getTarget() const { return TheTarget; }
124 // Interfaces to the major aspects of target machine information:
125 // -- Instruction opcode and operand information
126 // -- Pipelines and scheduling information
127 // -- Stack frame information
128 // -- Selection DAG lowering information
130 virtual const TargetInstrInfo *getInstrInfo() const { return 0; }
131 virtual const TargetFrameInfo *getFrameInfo() const { return 0; }
132 virtual TargetLowering *getTargetLowering() const { return 0; }
133 virtual const TargetData *getTargetData() const { return 0; }
135 /// getTargetAsmInfo - Return target specific asm information.
137 const TargetAsmInfo *getTargetAsmInfo() const {
138 if (!AsmInfo) AsmInfo = createTargetAsmInfo();
142 /// getSubtarget - This method returns a pointer to the specified type of
143 /// TargetSubtarget. In debug builds, it verifies that the object being
144 /// returned is of the correct type.
145 template<typename STC> const STC &getSubtarget() const {
146 const TargetSubtarget *TST = getSubtargetImpl();
147 assert(TST && dynamic_cast<const STC*>(TST) &&
148 "Not the right kind of subtarget!");
149 return *static_cast<const STC*>(TST);
152 /// getRegisterInfo - If register information is available, return it. If
153 /// not, return null. This is kept separate from RegInfo until RegInfo has
154 /// details of graph coloring register allocation removed from it.
156 virtual const TargetRegisterInfo *getRegisterInfo() const { return 0; }
158 /// getIntrinsicInfo - If intrinsic information is available, return it. If
159 /// not, return null.
161 virtual const TargetIntrinsicInfo *getIntrinsicInfo() const { return 0; }
163 /// getJITInfo - If this target supports a JIT, return information for it,
164 /// otherwise return null.
166 virtual TargetJITInfo *getJITInfo() { return 0; }
168 /// getInstrItineraryData - Returns instruction itinerary data for the target
169 /// or specific subtarget.
171 virtual const InstrItineraryData getInstrItineraryData() const {
172 return InstrItineraryData();
175 /// getMachOWriterInfo - If this target supports a Mach-O writer, return
176 /// information for it, otherwise return null.
178 virtual const TargetMachOWriterInfo *getMachOWriterInfo() const { return 0; }
180 /// getELFWriterInfo - If this target supports an ELF writer, return
181 /// information for it, otherwise return null.
183 virtual const TargetELFWriterInfo *getELFWriterInfo() const { return 0; }
185 /// getRelocationModel - Returns the code generation relocation model. The
186 /// choices are static, PIC, and dynamic-no-pic, and target default.
187 static Reloc::Model getRelocationModel();
189 /// setRelocationModel - Sets the code generation relocation model.
191 static void setRelocationModel(Reloc::Model Model);
193 /// getCodeModel - Returns the code model. The choices are small, kernel,
194 /// medium, large, and target default.
195 static CodeModel::Model getCodeModel();
197 /// setCodeModel - Sets the code model.
199 static void setCodeModel(CodeModel::Model Model);
201 /// getAsmVerbosityDefault - Returns the default value of asm verbosity.
203 static bool getAsmVerbosityDefault();
205 /// setAsmVerbosityDefault - Set the default value of asm verbosity. Default
207 static void setAsmVerbosityDefault(bool);
209 /// CodeGenFileType - These enums are meant to be passed into
210 /// addPassesToEmitFile to indicate what type of file to emit.
211 enum CodeGenFileType {
212 AssemblyFile, ObjectFile, DynamicLibrary
215 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge
216 /// on this target. User flag overrides.
217 virtual bool getEnableTailMergeDefault() const { return true; }
219 /// addPassesToEmitFile - Add passes to the specified pass manager to get the
220 /// specified file emitted. Typically this will involve several steps of code
221 /// generation. If Fast is set to true, the code generator should emit code
222 /// as fast as possible, though the generated code may be less efficient.
223 /// This method should return FileModel::Error if emission of this file type
224 /// is not supported.
226 virtual FileModel::Model addPassesToEmitFile(PassManagerBase &,
227 formatted_raw_ostream &,
230 return FileModel::None;
233 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
234 /// to be split up (e.g., to add an object writer pass), this method can be
235 /// used to finish up adding passes to emit the file, if necessary.
237 virtual bool addPassesToEmitFileFinish(PassManagerBase &,
238 MachineCodeEmitter *,
243 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
244 /// to be split up (e.g., to add an object writer pass), this method can be
245 /// used to finish up adding passes to emit the file, if necessary.
247 virtual bool addPassesToEmitFileFinish(PassManagerBase &,
253 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
254 /// to be split up (e.g., to add an object writer pass), this method can be
255 /// used to finish up adding passes to emit the file, if necessary.
257 virtual bool addPassesToEmitFileFinish(PassManagerBase &,
263 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
264 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
265 /// actually outputting the machine code and resolving things like the address
266 /// of functions. This method returns true if machine code emission is
269 virtual bool addPassesToEmitMachineCode(PassManagerBase &,
270 MachineCodeEmitter &,
275 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
276 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
277 /// actually outputting the machine code and resolving things like the address
278 /// of functions. This method returns true if machine code emission is
281 virtual bool addPassesToEmitMachineCode(PassManagerBase &,
287 /// addPassesToEmitWholeFile - This method can be implemented by targets that
288 /// require having the entire module at once. This is not recommended, do not
290 virtual bool WantsWholeFile() const { return false; }
291 virtual bool addPassesToEmitWholeFile(PassManager &, formatted_raw_ostream &,
298 /// LLVMTargetMachine - This class describes a target machine that is
299 /// implemented with the LLVM target-independent code generator.
301 class LLVMTargetMachine : public TargetMachine {
302 protected: // Can only create subclasses.
303 LLVMTargetMachine(const Target &T) : TargetMachine(T) { }
305 /// addCommonCodeGenPasses - Add standard LLVM codegen passes used for
306 /// both emitting to assembly files or machine code output.
308 bool addCommonCodeGenPasses(PassManagerBase &, CodeGenOpt::Level);
312 /// addPassesToEmitFile - Add passes to the specified pass manager to get the
313 /// specified file emitted. Typically this will involve several steps of code
314 /// generation. If OptLevel is None, the code generator should emit code as fast
315 /// as possible, though the generated code may be less efficient. This method
316 /// should return FileModel::Error if emission of this file type is not
319 /// The default implementation of this method adds components from the
320 /// LLVM retargetable code generator, invoking the methods below to get
321 /// target-specific passes in standard locations.
323 virtual FileModel::Model addPassesToEmitFile(PassManagerBase &PM,
324 formatted_raw_ostream &Out,
325 CodeGenFileType FileType,
328 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
329 /// to be split up (e.g., to add an object writer pass), this method can be
330 /// used to finish up adding passes to emit the file, if necessary.
332 virtual bool addPassesToEmitFileFinish(PassManagerBase &PM,
333 MachineCodeEmitter *MCE,
336 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
337 /// to be split up (e.g., to add an object writer pass), this method can be
338 /// used to finish up adding passes to emit the file, if necessary.
340 virtual bool addPassesToEmitFileFinish(PassManagerBase &PM,
344 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
345 /// to be split up (e.g., to add an object writer pass), this method can be
346 /// used to finish up adding passes to emit the file, if necessary.
348 virtual bool addPassesToEmitFileFinish(PassManagerBase &PM,
349 ObjectCodeEmitter *OCE,
352 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
353 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
354 /// actually outputting the machine code and resolving things like the address
355 /// of functions. This method returns true if machine code emission is
358 virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
359 MachineCodeEmitter &MCE,
362 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
363 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
364 /// actually outputting the machine code and resolving things like the address
365 /// of functions. This method returns true if machine code emission is
368 virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
372 /// Target-Independent Code Generator Pass Configuration Options.
374 /// addInstSelector - This method should add any "last minute" LLVM->LLVM
375 /// passes, then install an instruction selector pass, which converts from
376 /// LLVM code to machine instructions.
377 virtual bool addInstSelector(PassManagerBase &, CodeGenOpt::Level) {
381 /// addPreRegAllocPasses - This method may be implemented by targets that want
382 /// to run passes immediately before register allocation. This should return
383 /// true if -print-machineinstrs should print after these passes.
384 virtual bool addPreRegAlloc(PassManagerBase &, CodeGenOpt::Level) {
388 /// addPostRegAllocPasses - This method may be implemented by targets that
389 /// want to run passes after register allocation but before prolog-epilog
390 /// insertion. This should return true if -print-machineinstrs should print
391 /// after these passes.
392 virtual bool addPostRegAlloc(PassManagerBase &, CodeGenOpt::Level) {
396 /// addPreEmitPass - This pass may be implemented by targets that want to run
397 /// passes immediately before machine code is emitted. This should return
398 /// true if -print-machineinstrs should print out the code after the passes.
399 virtual bool addPreEmitPass(PassManagerBase &, CodeGenOpt::Level) {
404 /// addCodeEmitter - This pass should be overridden by the target to add a
405 /// code emitter, if supported. If this is not supported, 'true' should be
407 virtual bool addCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
408 MachineCodeEmitter &) {
412 /// addCodeEmitter - This pass should be overridden by the target to add a
413 /// code emitter, if supported. If this is not supported, 'true' should be
415 virtual bool addCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
420 /// addSimpleCodeEmitter - This pass should be overridden by the target to add
421 /// a code emitter (without setting flags), if supported. If this is not
422 /// supported, 'true' should be returned.
423 virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
424 MachineCodeEmitter &) {
428 /// addSimpleCodeEmitter - This pass should be overridden by the target to add
429 /// a code emitter (without setting flags), if supported. If this is not
430 /// supported, 'true' should be returned.
431 virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
436 /// addSimpleCodeEmitter - This pass should be overridden by the target to add
437 /// a code emitter (without setting flags), if supported. If this is not
438 /// supported, 'true' should be returned.
439 virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
440 ObjectCodeEmitter &) {
444 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge
445 /// on this target. User flag overrides.
446 virtual bool getEnableTailMergeDefault() const { return true; }
448 /// addAssemblyEmitter - Helper function which creates a target specific
449 /// assembly printer, if available.
451 /// \return Returns 'false' on success.
452 bool addAssemblyEmitter(PassManagerBase &, CodeGenOpt::Level,
453 bool /* VerboseAsmDefault */,
454 formatted_raw_ostream &);
457 } // End llvm namespace