1 //===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the TargetMachine and LLVMTargetMachine classes.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_TARGET_TARGETMACHINE_H
15 #define LLVM_TARGET_TARGETMACHINE_H
17 #include "llvm/ADT/StringRef.h"
18 #include "llvm/Pass.h"
19 #include "llvm/Support/CodeGen.h"
20 #include "llvm/Target/TargetOptions.h"
26 class InstrItineraryData;
32 class PassManagerBase;
35 class TargetLibraryInfo;
36 class TargetFrameLowering;
37 class TargetInstrInfo;
38 class TargetIntrinsicInfo;
41 class TargetPassConfig;
42 class TargetRegisterInfo;
43 class TargetSelectionDAGInfo;
44 class TargetSubtargetInfo;
45 class ScalarTargetTransformInfo;
46 class VectorTargetTransformInfo;
47 class formatted_raw_ostream;
50 //===----------------------------------------------------------------------===//
52 /// TargetMachine - Primary interface to the complete machine description for
53 /// the target machine. All target-specific information should be accessible
54 /// through this interface.
57 TargetMachine(const TargetMachine &) LLVM_DELETED_FUNCTION;
58 void operator=(const TargetMachine &) LLVM_DELETED_FUNCTION;
59 protected: // Can only create subclasses.
60 TargetMachine(const Target &T, StringRef TargetTriple,
61 StringRef CPU, StringRef FS, const TargetOptions &Options);
63 /// TheTarget - The Target that this machine was created for.
64 const Target &TheTarget;
66 /// TargetTriple, TargetCPU, TargetFS - Triple string, CPU name, and target
67 /// feature strings the TargetMachine instance is created with.
68 std::string TargetTriple;
69 std::string TargetCPU;
72 /// CodeGenInfo - Low level target information such as relocation model.
73 const MCCodeGenInfo *CodeGenInfo;
75 /// AsmInfo - Contains target specific asm information.
77 const MCAsmInfo *AsmInfo;
79 unsigned MCRelaxAll : 1;
80 unsigned MCNoExecStack : 1;
81 unsigned MCSaveTempLabels : 1;
82 unsigned MCUseLoc : 1;
83 unsigned MCUseCFI : 1;
84 unsigned MCUseDwarfDirectory : 1;
87 virtual ~TargetMachine();
89 const Target &getTarget() const { return TheTarget; }
91 const StringRef getTargetTriple() const { return TargetTriple; }
92 const StringRef getTargetCPU() const { return TargetCPU; }
93 const StringRef getTargetFeatureString() const { return TargetFS; }
95 /// getSubtargetImpl - virtual method implemented by subclasses that returns
96 /// a reference to that target's TargetSubtargetInfo-derived member variable.
97 virtual const TargetSubtargetInfo *getSubtargetImpl() const { return 0; }
99 mutable TargetOptions Options;
101 /// \brief Reset the target options based on the function's attributes.
102 void resetTargetOptions(const MachineFunction *MF) const;
104 // Interfaces to the major aspects of target machine information:
105 // -- Instruction opcode and operand information
106 // -- Pipelines and scheduling information
107 // -- Stack frame information
108 // -- Selection DAG lowering information
110 virtual const TargetInstrInfo *getInstrInfo() const { return 0; }
111 virtual const TargetFrameLowering *getFrameLowering() const { return 0; }
112 virtual const TargetLowering *getTargetLowering() const { return 0; }
113 virtual const TargetSelectionDAGInfo *getSelectionDAGInfo() const{ return 0; }
114 virtual const DataLayout *getDataLayout() const { return 0; }
116 /// getMCAsmInfo - Return target specific asm information.
118 const MCAsmInfo *getMCAsmInfo() const { return AsmInfo; }
120 /// getSubtarget - This method returns a pointer to the specified type of
121 /// TargetSubtargetInfo. In debug builds, it verifies that the object being
122 /// returned is of the correct type.
123 template<typename STC> const STC &getSubtarget() const {
124 return *static_cast<const STC*>(getSubtargetImpl());
127 /// getRegisterInfo - If register information is available, return it. If
128 /// not, return null. This is kept separate from RegInfo until RegInfo has
129 /// details of graph coloring register allocation removed from it.
131 virtual const TargetRegisterInfo *getRegisterInfo() const { return 0; }
133 /// getIntrinsicInfo - If intrinsic information is available, return it. If
134 /// not, return null.
136 virtual const TargetIntrinsicInfo *getIntrinsicInfo() const { return 0; }
138 /// getJITInfo - If this target supports a JIT, return information for it,
139 /// otherwise return null.
141 virtual TargetJITInfo *getJITInfo() { return 0; }
143 /// getInstrItineraryData - Returns instruction itinerary data for the target
144 /// or specific subtarget.
146 virtual const InstrItineraryData *getInstrItineraryData() const {
150 /// hasMCRelaxAll - Check whether all machine code instructions should be
152 bool hasMCRelaxAll() const { return MCRelaxAll; }
154 /// setMCRelaxAll - Set whether all machine code instructions should be
156 void setMCRelaxAll(bool Value) { MCRelaxAll = Value; }
158 /// hasMCSaveTempLabels - Check whether temporary labels will be preserved
159 /// (i.e., not treated as temporary).
160 bool hasMCSaveTempLabels() const { return MCSaveTempLabels; }
162 /// setMCSaveTempLabels - Set whether temporary labels will be preserved
163 /// (i.e., not treated as temporary).
164 void setMCSaveTempLabels(bool Value) { MCSaveTempLabels = Value; }
166 /// hasMCNoExecStack - Check whether an executable stack is not needed.
167 bool hasMCNoExecStack() const { return MCNoExecStack; }
169 /// setMCNoExecStack - Set whether an executabel stack is not needed.
170 void setMCNoExecStack(bool Value) { MCNoExecStack = Value; }
172 /// hasMCUseLoc - Check whether we should use dwarf's .loc directive.
173 bool hasMCUseLoc() const { return MCUseLoc; }
175 /// setMCUseLoc - Set whether all we should use dwarf's .loc directive.
176 void setMCUseLoc(bool Value) { MCUseLoc = Value; }
178 /// hasMCUseCFI - Check whether we should use dwarf's .cfi_* directives.
179 bool hasMCUseCFI() const { return MCUseCFI; }
181 /// setMCUseCFI - Set whether all we should use dwarf's .cfi_* directives.
182 void setMCUseCFI(bool Value) { MCUseCFI = Value; }
184 /// hasMCUseDwarfDirectory - Check whether we should use .file directives with
185 /// explicit directories.
186 bool hasMCUseDwarfDirectory() const { return MCUseDwarfDirectory; }
188 /// setMCUseDwarfDirectory - Set whether all we should use .file directives
189 /// with explicit directories.
190 void setMCUseDwarfDirectory(bool Value) { MCUseDwarfDirectory = Value; }
192 /// getRelocationModel - Returns the code generation relocation model. The
193 /// choices are static, PIC, and dynamic-no-pic, and target default.
194 Reloc::Model getRelocationModel() const;
196 /// getCodeModel - Returns the code model. The choices are small, kernel,
197 /// medium, large, and target default.
198 CodeModel::Model getCodeModel() const;
200 /// getTLSModel - Returns the TLS model which should be used for the given
202 TLSModel::Model getTLSModel(const GlobalValue *GV) const;
204 /// getOptLevel - Returns the optimization level: None, Less,
205 /// Default, or Aggressive.
206 CodeGenOpt::Level getOptLevel() const;
208 void setFastISel(bool Enable) { Options.EnableFastISel = Enable; }
210 bool shouldPrintMachineCode() const { return Options.PrintMachineCode; }
212 /// getAsmVerbosityDefault - Returns the default value of asm verbosity.
214 static bool getAsmVerbosityDefault();
216 /// setAsmVerbosityDefault - Set the default value of asm verbosity. Default
218 static void setAsmVerbosityDefault(bool);
220 /// getDataSections - Return true if data objects should be emitted into their
221 /// own section, corresponds to -fdata-sections.
222 static bool getDataSections();
224 /// getFunctionSections - Return true if functions should be emitted into
225 /// their own section, corresponding to -ffunction-sections.
226 static bool getFunctionSections();
228 /// setDataSections - Set if the data are emit into separate sections.
229 static void setDataSections(bool);
231 /// setFunctionSections - Set if the functions are emit into separate
233 static void setFunctionSections(bool);
235 /// \brief Register analysis passes for this target with a pass manager.
236 virtual void addAnalysisPasses(PassManagerBase &) {}
238 /// CodeGenFileType - These enums are meant to be passed into
239 /// addPassesToEmitFile to indicate what type of file to emit, and returned by
240 /// it to indicate what type of file could actually be made.
241 enum CodeGenFileType {
244 CGFT_Null // Do not emit any output.
247 /// addPassesToEmitFile - Add passes to the specified pass manager to get the
248 /// specified file emitted. Typically this will involve several steps of code
249 /// generation. This method should return true if emission of this file type
250 /// is not supported, or false on success.
251 virtual bool addPassesToEmitFile(PassManagerBase &,
252 formatted_raw_ostream &,
254 bool /*DisableVerify*/ = true,
255 AnalysisID StartAfter = 0,
256 AnalysisID StopAfter = 0) {
260 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
261 /// get machine code emitted. This uses a JITCodeEmitter object to handle
262 /// actually outputting the machine code and resolving things like the address
263 /// of functions. This method returns true if machine code emission is
266 virtual bool addPassesToEmitMachineCode(PassManagerBase &,
268 bool /*DisableVerify*/ = true) {
272 /// addPassesToEmitMC - Add passes to the specified pass manager to get
273 /// machine code emitted with the MCJIT. This method returns true if machine
274 /// code is not supported. It fills the MCContext Ctx pointer which can be
275 /// used to build custom MCStreamer.
277 virtual bool addPassesToEmitMC(PassManagerBase &,
280 bool /*DisableVerify*/ = true) {
285 /// LLVMTargetMachine - This class describes a target machine that is
286 /// implemented with the LLVM target-independent code generator.
288 class LLVMTargetMachine : public TargetMachine {
289 protected: // Can only create subclasses.
290 LLVMTargetMachine(const Target &T, StringRef TargetTriple,
291 StringRef CPU, StringRef FS, TargetOptions Options,
292 Reloc::Model RM, CodeModel::Model CM,
293 CodeGenOpt::Level OL);
296 /// \brief Register analysis passes for this target with a pass manager.
298 /// This registers target independent analysis passes.
299 virtual void addAnalysisPasses(PassManagerBase &PM);
301 /// createPassConfig - Create a pass configuration object to be used by
302 /// addPassToEmitX methods for generating a pipeline of CodeGen passes.
303 virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
305 /// addPassesToEmitFile - Add passes to the specified pass manager to get the
306 /// specified file emitted. Typically this will involve several steps of code
308 virtual bool addPassesToEmitFile(PassManagerBase &PM,
309 formatted_raw_ostream &Out,
310 CodeGenFileType FileType,
311 bool DisableVerify = true,
312 AnalysisID StartAfter = 0,
313 AnalysisID StopAfter = 0);
315 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
316 /// get machine code emitted. This uses a JITCodeEmitter object to handle
317 /// actually outputting the machine code and resolving things like the address
318 /// of functions. This method returns true if machine code emission is
321 virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
323 bool DisableVerify = true);
325 /// addPassesToEmitMC - Add passes to the specified pass manager to get
326 /// machine code emitted with the MCJIT. This method returns true if machine
327 /// code is not supported. It fills the MCContext Ctx pointer which can be
328 /// used to build custom MCStreamer.
330 virtual bool addPassesToEmitMC(PassManagerBase &PM,
333 bool DisableVerify = true);
335 /// addCodeEmitter - This pass should be overridden by the target to add a
336 /// code emitter, if supported. If this is not supported, 'true' should be
338 virtual bool addCodeEmitter(PassManagerBase &,
344 } // End llvm namespace